ea20.c 9.0 KB

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  1. /*
  2. * (C) Copyright 2010
  3. * Stefano Babic, DENX Software Engineering, sbabic@denx.de
  4. *
  5. * Based on da850evm.c, original Copyrights follow:
  6. *
  7. * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
  8. *
  9. * Based on da830evm.c. Original Copyrights follow:
  10. *
  11. * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
  12. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  27. */
  28. #include <common.h>
  29. #include <i2c.h>
  30. #include <net.h>
  31. #include <netdev.h>
  32. #include <asm/arch/hardware.h>
  33. #include <asm/arch/emif_defs.h>
  34. #include <asm/arch/emac_defs.h>
  35. #include <asm/io.h>
  36. #include <asm/arch/davinci_misc.h>
  37. #include <asm/arch/gpio.h>
  38. #include <asm/arch/da8xx-fb.h>
  39. DECLARE_GLOBAL_DATA_PTR;
  40. static const struct da8xx_panel lcd_panel = {
  41. /* Casio COM57H531x */
  42. .name = "Casio_COM57H531x",
  43. .width = 640,
  44. .height = 480,
  45. .hfp = 12,
  46. .hbp = 144,
  47. .hsw = 30,
  48. .vfp = 10,
  49. .vbp = 35,
  50. .vsw = 3,
  51. .pxl_clk = 25000000,
  52. .invert_pxl_clk = 0,
  53. };
  54. /* SPI0 pin muxer settings */
  55. static const struct pinmux_config spi1_pins[] = {
  56. { pinmux(5), 1, 1 },
  57. { pinmux(5), 1, 2 },
  58. { pinmux(5), 1, 4 },
  59. { pinmux(5), 1, 5 }
  60. };
  61. /* I2C pin muxer settings */
  62. static const struct pinmux_config i2c_pins[] = {
  63. { pinmux(4), 2, 2 },
  64. { pinmux(4), 2, 3 }
  65. };
  66. /* UART0 pin muxer settings */
  67. static const struct pinmux_config uart_pins[] = {
  68. { pinmux(3), 2, 7 },
  69. { pinmux(3), 2, 6 },
  70. { pinmux(3), 2, 4 },
  71. { pinmux(3), 2, 5 }
  72. };
  73. #ifdef CONFIG_DRIVER_TI_EMAC
  74. #define HAS_RMII 1
  75. static const struct pinmux_config emac_pins[] = {
  76. { pinmux(14), 8, 2 },
  77. { pinmux(14), 8, 3 },
  78. { pinmux(14), 8, 4 },
  79. { pinmux(14), 8, 5 },
  80. { pinmux(14), 8, 6 },
  81. { pinmux(14), 8, 7 },
  82. { pinmux(15), 8, 1 },
  83. { pinmux(4), 8, 0 },
  84. { pinmux(4), 8, 1 }
  85. };
  86. #endif
  87. #ifdef CONFIG_NAND_DAVINCI
  88. const struct pinmux_config nand_pins[] = {
  89. { pinmux(7), 1, 0}, /* CS2 */
  90. { pinmux(7), 0, 1}, /* CS3 in three state*/
  91. { pinmux(7), 1, 4 }, /* EMA_WE */
  92. { pinmux(7), 1, 5 }, /* EMA_OE */
  93. { pinmux(9), 1, 0 }, /* EMA_D[7] */
  94. { pinmux(9), 1, 1 }, /* EMA_D[6] */
  95. { pinmux(9), 1, 2 }, /* EMA_D[5] */
  96. { pinmux(9), 1, 3 }, /* EMA_D[4] */
  97. { pinmux(9), 1, 4 }, /* EMA_D[3] */
  98. { pinmux(9), 1, 5 }, /* EMA_D[2] */
  99. { pinmux(9), 1, 6 }, /* EMA_D[1] */
  100. { pinmux(9), 1, 7 }, /* EMA_D[0] */
  101. { pinmux(12), 1, 5 }, /* EMA_A[2] */
  102. { pinmux(12), 1, 6 }, /* EMA_A[1] */
  103. { pinmux(6), 1, 0 } /* EMA_CLK */
  104. };
  105. #endif
  106. const struct pinmux_config gpio_pins[] = {
  107. { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/
  108. { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/
  109. { pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/
  110. { pinmux(19), 8, 5 }, /* GPIO6[1] DISP_ON */
  111. { pinmux(14), 8, 1 } /* GPIO6[6] LCD_B_PWR*/
  112. };
  113. const struct pinmux_config lcd_pins[] = {
  114. { pinmux(17), 2, 1 }, /* LCD_D_0 */
  115. { pinmux(17), 2, 0 }, /* LCD_D_1 */
  116. { pinmux(16), 2, 7 }, /* LCD_D_2 */
  117. { pinmux(16), 2, 6 }, /* LCD_D_3 */
  118. { pinmux(16), 2, 5 }, /* LCD_D_4 */
  119. { pinmux(16), 2, 4 }, /* LCD_D_5 */
  120. { pinmux(16), 2, 3 }, /* LCD_D_6 */
  121. { pinmux(16), 2, 2 }, /* LCD_D_7 */
  122. { pinmux(18), 2, 1 }, /* LCD_D_8 */
  123. { pinmux(18), 2, 0 }, /* LCD_D_9 */
  124. { pinmux(17), 2, 7 }, /* LCD_D_10 */
  125. { pinmux(17), 2, 6 }, /* LCD_D_11 */
  126. { pinmux(17), 2, 5 }, /* LCD_D_12 */
  127. { pinmux(17), 2, 4 }, /* LCD_D_13 */
  128. { pinmux(17), 2, 3 }, /* LCD_D_14 */
  129. { pinmux(17), 2, 2 }, /* LCD_D_15 */
  130. { pinmux(18), 2, 6 }, /* LCD_PCLK */
  131. { pinmux(19), 2, 0 }, /* LCD_HSYNC */
  132. { pinmux(19), 2, 1 }, /* LCD_VSYNC */
  133. { pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */
  134. };
  135. const struct pinmux_config halten_pin[] = {
  136. { pinmux(3), 4, 2 } /* GPIO8[6] HALTEN */
  137. };
  138. static const struct pinmux_resource pinmuxes[] = {
  139. #ifdef CONFIG_SPI_FLASH
  140. PINMUX_ITEM(spi1_pins),
  141. #endif
  142. PINMUX_ITEM(uart_pins),
  143. PINMUX_ITEM(i2c_pins),
  144. #ifdef CONFIG_NAND_DAVINCI
  145. PINMUX_ITEM(nand_pins),
  146. #endif
  147. #ifdef CONFIG_VIDEO
  148. PINMUX_ITEM(lcd_pins),
  149. #endif
  150. };
  151. static const struct lpsc_resource lpsc[] = {
  152. { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
  153. { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
  154. { DAVINCI_LPSC_EMAC }, /* image download */
  155. { DAVINCI_LPSC_UART0 }, /* console */
  156. { DAVINCI_LPSC_GPIO },
  157. { DAVINCI_LPSC_LCDC }, /* LCD */
  158. };
  159. int board_early_init_f(void)
  160. {
  161. struct davinci_gpio *gpio6_base =
  162. (struct davinci_gpio *)DAVINCI_GPIO_BANK67;
  163. /* PinMux for GPIO */
  164. if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
  165. return 1;
  166. /* Set the RESETOUTn low */
  167. writel((readl(&gpio6_base->set_data) & ~(1 << 15)),
  168. &gpio6_base->set_data);
  169. writel((readl(&gpio6_base->dir) & ~(1 << 15)), &gpio6_base->dir);
  170. /* Set U0_SW0 low for UART0 as console*/
  171. writel((readl(&gpio6_base->set_data) & ~(1 << 10)),
  172. &gpio6_base->set_data);
  173. writel((readl(&gpio6_base->dir) & ~(1 << 10)), &gpio6_base->dir);
  174. /* Set U0_SW1 low for UART0 as console*/
  175. writel((readl(&gpio6_base->set_data) & ~(1 << 12)),
  176. &gpio6_base->set_data);
  177. writel((readl(&gpio6_base->dir) & ~(1 << 12)), &gpio6_base->dir);
  178. /* Set LCD_B_PWR low to power down LCD Backlight*/
  179. writel((readl(&gpio6_base->set_data) & ~(1 << 6)),
  180. &gpio6_base->set_data);
  181. writel((readl(&gpio6_base->dir) & ~(1 << 6)), &gpio6_base->dir);
  182. /* Set DISP_ON low to disable LCD output*/
  183. writel((readl(&gpio6_base->set_data) & ~(1 << 1)),
  184. &gpio6_base->set_data);
  185. writel((readl(&gpio6_base->dir) & ~(1 << 1)), &gpio6_base->dir);
  186. #ifndef CONFIG_USE_IRQ
  187. irq_init();
  188. #endif
  189. /*
  190. * NAND CS setup - cycle counts based on da850evm NAND timings in the
  191. * Linux kernel @ 25MHz EMIFA
  192. */
  193. #ifdef CONFIG_NAND_DAVINCI
  194. writel((DAVINCI_ABCR_WSETUP(0) |
  195. DAVINCI_ABCR_WSTROBE(1) |
  196. DAVINCI_ABCR_WHOLD(0) |
  197. DAVINCI_ABCR_RSETUP(0) |
  198. DAVINCI_ABCR_RSTROBE(1) |
  199. DAVINCI_ABCR_RHOLD(0) |
  200. DAVINCI_ABCR_TA(0) |
  201. DAVINCI_ABCR_ASIZE_8BIT),
  202. &davinci_emif_regs->ab1cr); /* CS2 */
  203. #endif
  204. /*
  205. * Power on required peripherals
  206. * ARM does not have access by default to PSC0 and PSC1
  207. * assuming here that the DSP bootloader has set the IOPU
  208. * such that PSC access is available to ARM
  209. */
  210. if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
  211. return 1;
  212. /* setup the SUSPSRC for ARM to control emulation suspend */
  213. writel(readl(&davinci_syscfg_regs->suspsrc) &
  214. ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
  215. DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
  216. DAVINCI_SYSCFG_SUSPSRC_UART0),
  217. &davinci_syscfg_regs->suspsrc);
  218. /* configure pinmux settings */
  219. if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
  220. return 1;
  221. #ifdef CONFIG_DRIVER_TI_EMAC
  222. if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
  223. return 1;
  224. davinci_emac_mii_mode_sel(HAS_RMII);
  225. #endif /* CONFIG_DRIVER_TI_EMAC */
  226. /* enable the console UART */
  227. writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
  228. DAVINCI_UART_PWREMU_MGMT_UTRST),
  229. &davinci_uart0_ctrl_regs->pwremu_mgmt);
  230. /*
  231. * Reconfigure the LCDC priority to the highest to ensure that
  232. * the throughput/latency requirements for the LCDC are met.
  233. */
  234. writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff,
  235. &davinci_syscfg_regs->mstpri[2]);
  236. /* Set LCD_B_PWR low to power up LCD Backlight*/
  237. writel((readl(&gpio6_base->set_data) | (1 << 6)),
  238. &gpio6_base->set_data);
  239. /* Set DISP_ON low to disable LCD output*/
  240. writel((readl(&gpio6_base->set_data) | (1 << 1)),
  241. &gpio6_base->set_data);
  242. return 0;
  243. }
  244. int board_init(void)
  245. {
  246. /* arch number of the board */
  247. gd->bd->bi_arch_number = MACH_TYPE_EA20;
  248. /* address of boot parameters */
  249. gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
  250. da8xx_video_init(&lcd_panel, 16);
  251. return 0;
  252. }
  253. #ifdef BOARD_LATE_INIT
  254. int board_late_init(void)
  255. {
  256. struct davinci_gpio *gpio8_base =
  257. (struct davinci_gpio *)DAVINCI_GPIO_BANK8;
  258. /* PinMux for HALTEN */
  259. if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0)
  260. return 1;
  261. /* Set HALTEN to high */
  262. writel((readl(&gpio8_base->set_data) | (1 << 6)),
  263. &gpio8_base->set_data);
  264. writel((readl(&gpio8_base->dir) & ~(1 << 6)), &gpio8_base->dir);
  265. setenv("stdout", "serial");
  266. return 0;
  267. }
  268. #endif /* BOARD_LATE_INIT */
  269. #ifdef CONFIG_DRIVER_TI_EMAC
  270. /*
  271. * Initializes on-board ethernet controllers.
  272. */
  273. int board_eth_init(bd_t *bis)
  274. {
  275. if (!davinci_emac_initialize()) {
  276. printf("Error: Ethernet init failed!\n");
  277. return -1;
  278. }
  279. /*
  280. * This board has a RMII PHY. However, the MDC line on the SOM
  281. * must not be disabled (there is no MII PHY on the
  282. * baseboard) via the GPIO2[6], because this pin
  283. * disables at the same time the SPI flash.
  284. */
  285. return 0;
  286. }
  287. #endif /* CONFIG_DRIVER_TI_EMAC */