evm.c 4.4 KB

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  1. /*
  2. * evm.c
  3. *
  4. * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <common.h>
  16. #include <errno.h>
  17. #include <asm/io.h>
  18. #include <asm/arch/cpu.h>
  19. #include <asm/arch/hardware.h>
  20. #include <asm/arch/common_def.h>
  21. #include <i2c.h>
  22. #include <miiphy.h>
  23. #include <cpsw.h>
  24. DECLARE_GLOBAL_DATA_PTR;
  25. #define UART_RESET (0x1 << 1)
  26. #define UART_CLK_RUNNING_MASK 0x1
  27. #define UART_SMART_IDLE_EN (0x1 << 0x3)
  28. /* MII mode defines */
  29. #define MII_MODE_ENABLE 0x0
  30. #define RGMII_MODE_ENABLE 0xA
  31. struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
  32. /*
  33. * I2C Address of on-board EEPROM
  34. */
  35. #define I2C_BASE_BOARD_ADDR 0x50
  36. #define NO_OF_MAC_ADDR 3
  37. #define ETH_ALEN 6
  38. #define NAME_LEN 8
  39. struct am335x_baseboard_id {
  40. unsigned int magic;
  41. char name[NAME_LEN];
  42. char version[4];
  43. char serial[12];
  44. char config[32];
  45. char mac_addr[NO_OF_MAC_ADDR][ETH_ALEN];
  46. };
  47. static struct am335x_baseboard_id header;
  48. static inline int board_is_bone(void)
  49. {
  50. return !strncmp(header.name, "A335BONE", NAME_LEN);
  51. }
  52. /*
  53. * Read header information from EEPROM into global structure.
  54. */
  55. int read_eeprom(void)
  56. {
  57. /* Check if baseboard eeprom is available */
  58. if (i2c_probe(I2C_BASE_BOARD_ADDR)) {
  59. printf("Could not probe the EEPROM; something fundamentally "
  60. "wrong on the I2C bus.\n");
  61. return -ENODEV;
  62. }
  63. /* read the eeprom using i2c */
  64. if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 2, (uchar *)&header,
  65. sizeof(header))) {
  66. printf("Could not read the EEPROM; something fundamentally"
  67. " wrong on the I2C bus.\n");
  68. return -EIO;
  69. }
  70. if (header.magic != 0xEE3355AA) {
  71. /*
  72. * read the eeprom using i2c again,
  73. * but use only a 1 byte address
  74. */
  75. if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 1, (uchar *)&header,
  76. sizeof(header))) {
  77. printf("Could not read the EEPROM; something "
  78. "fundamentally wrong on the I2C bus.\n");
  79. return -EIO;
  80. }
  81. if (header.magic != 0xEE3355AA) {
  82. printf("Incorrect magic number in EEPROM\n");
  83. return -EINVAL;
  84. }
  85. }
  86. return 0;
  87. }
  88. /*
  89. * Basic board specific setup
  90. */
  91. int board_init(void)
  92. {
  93. enable_uart0_pin_mux();
  94. enable_i2c0_pin_mux();
  95. enable_i2c1_pin_mux();
  96. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  97. if (read_eeprom() < 0)
  98. printf("Could not get board ID.\n");
  99. gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
  100. return 0;
  101. }
  102. #ifdef CONFIG_DRIVER_TI_CPSW
  103. static void cpsw_control(int enabled)
  104. {
  105. /* VTP can be added here */
  106. return;
  107. }
  108. static struct cpsw_slave_data cpsw_slaves[] = {
  109. {
  110. .slave_reg_ofs = 0x208,
  111. .sliver_reg_ofs = 0xd80,
  112. .phy_id = 0,
  113. },
  114. {
  115. .slave_reg_ofs = 0x308,
  116. .sliver_reg_ofs = 0xdc0,
  117. .phy_id = 1,
  118. },
  119. };
  120. static struct cpsw_platform_data cpsw_data = {
  121. .mdio_base = AM335X_CPSW_MDIO_BASE,
  122. .cpsw_base = AM335X_CPSW_BASE,
  123. .mdio_div = 0xff,
  124. .channels = 8,
  125. .cpdma_reg_ofs = 0x800,
  126. .slaves = 1,
  127. .slave_data = cpsw_slaves,
  128. .ale_reg_ofs = 0xd00,
  129. .ale_entries = 1024,
  130. .host_port_reg_ofs = 0x108,
  131. .hw_stats_reg_ofs = 0x900,
  132. .mac_control = (1 << 5),
  133. .control = cpsw_control,
  134. .host_port_num = 0,
  135. .version = CPSW_CTRL_VERSION_2,
  136. };
  137. int board_eth_init(bd_t *bis)
  138. {
  139. uint8_t mac_addr[6];
  140. uint32_t mac_hi, mac_lo;
  141. if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
  142. debug("<ethaddr> not set. Reading from E-fuse\n");
  143. /* try reading mac address from efuse */
  144. mac_lo = readl(&cdev->macid0l);
  145. mac_hi = readl(&cdev->macid0h);
  146. mac_addr[0] = mac_hi & 0xFF;
  147. mac_addr[1] = (mac_hi & 0xFF00) >> 8;
  148. mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
  149. mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
  150. mac_addr[4] = mac_lo & 0xFF;
  151. mac_addr[5] = (mac_lo & 0xFF00) >> 8;
  152. if (is_valid_ether_addr(mac_addr))
  153. eth_setenv_enetaddr("ethaddr", mac_addr);
  154. else
  155. return -1;
  156. }
  157. if (board_is_bone()) {
  158. enable_mii1_pin_mux();
  159. writel(MII_MODE_ENABLE, &cdev->miisel);
  160. cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
  161. PHY_INTERFACE_MODE_MII;
  162. } else {
  163. enable_rgmii1_pin_mux();
  164. writel(RGMII_MODE_ENABLE, &cdev->miisel);
  165. cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
  166. PHY_INTERFACE_MODE_RGMII;
  167. }
  168. return cpsw_register(&cpsw_data);
  169. }
  170. #endif