i2c.c 10 KB

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  1. /*
  2. * (C) Copyright 2000
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * Hacked for the DB64360 board by Ingo.Assmus@keymile.com
  24. * extra improvments by Brain Waite
  25. * for cpci750 by reinhard.arlt@esd-electronics.com
  26. */
  27. #include <common.h>
  28. #include <mpc8xx.h>
  29. #include <malloc.h>
  30. #include <i2c.h>
  31. #include "../../Marvell/include/mv_gen_reg.h"
  32. #include "../../Marvell/include/core.h"
  33. #define I2C_DELAY 100
  34. #undef DEBUG_I2C
  35. #ifdef DEBUG_I2C
  36. #define DP(x) x
  37. #else
  38. #define DP(x)
  39. #endif
  40. /* Assuming that there is only one master on the bus (us) */
  41. void i2c_init (int speed, int slaveaddr)
  42. {
  43. unsigned int n, m, freq, margin, power;
  44. unsigned int actualN = 0, actualM = 0;
  45. unsigned int minMargin = 0xffffffff;
  46. unsigned int tclk = CONFIG_SYS_TCLK;
  47. unsigned int i2cFreq = speed; /* 100000 max. Fast mode not supported */
  48. DP (puts ("i2c_init\n"));
  49. /* gtI2cMasterInit */
  50. for (n = 0; n < 8; n++) {
  51. for (m = 0; m < 16; m++) {
  52. power = 2 << n; /* power = 2^(n+1) */
  53. freq = tclk / (10 * (m + 1) * power);
  54. if (i2cFreq > freq)
  55. margin = i2cFreq - freq;
  56. else
  57. margin = freq - i2cFreq;
  58. if (margin < minMargin) {
  59. minMargin = margin;
  60. actualN = n;
  61. actualM = m;
  62. }
  63. }
  64. }
  65. DP (puts ("setup i2c bus\n"));
  66. /* Setup bus */
  67. /* gtI2cReset */
  68. GT_REG_WRITE (I2C_SOFT_RESET, 0);
  69. asm(" sync");
  70. GT_REG_WRITE (I2C_CONTROL, 0);
  71. asm(" sync");
  72. DP (puts ("set baudrate\n"));
  73. GT_REG_WRITE (I2C_STATUS_BAUDE_RATE, (actualM << 3) | actualN);
  74. asm(" sync");
  75. DP (puts ("udelay...\n"));
  76. udelay (I2C_DELAY);
  77. GT_REG_WRITE (I2C_CONTROL, (0x1 << 2) | (0x1 << 6));
  78. asm(" sync");
  79. }
  80. static uchar i2c_select_device (uchar dev_addr, uchar read, int ten_bit)
  81. {
  82. unsigned int status, data, bits = 7;
  83. unsigned int control;
  84. int count = 0;
  85. DP (puts ("i2c_select_device\n"));
  86. /* Output slave address */
  87. if (ten_bit) {
  88. bits = 10;
  89. }
  90. GT_REG_READ (I2C_CONTROL, &control);
  91. control |= (0x1 << 2);
  92. GT_REG_WRITE (I2C_CONTROL, control);
  93. asm(" sync");
  94. GT_REG_READ (I2C_CONTROL, &control);
  95. control |= (0x1 << 5); /* generate the I2C_START_BIT */
  96. GT_REG_WRITE (I2C_CONTROL, control);
  97. asm(" sync");
  98. RESET_REG_BITS (I2C_CONTROL, (0x01 << 3));
  99. asm(" sync");
  100. GT_REG_READ (I2C_CONTROL, &status);
  101. while ((status & 0x08) != 0x08) {
  102. GT_REG_READ (I2C_CONTROL, &status);
  103. }
  104. count = 0;
  105. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  106. while (((status & 0xff) != 0x08) && ((status & 0xff) != 0x10)){
  107. if (count > 200) {
  108. #ifdef DEBUG_I2C
  109. printf ("Failed to set startbit: 0x%02x\n", status);
  110. #endif
  111. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  112. asm(" sync");
  113. return (status);
  114. }
  115. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  116. count++;
  117. }
  118. DP (puts ("i2c_select_device:write addr byte\n"));
  119. /* assert the address */
  120. data = (dev_addr << 1);
  121. /* set the read bit */
  122. data |= read;
  123. GT_REG_WRITE (I2C_DATA, data);
  124. asm(" sync");
  125. RESET_REG_BITS (I2C_CONTROL, BIT3);
  126. asm(" sync");
  127. GT_REG_READ (I2C_CONTROL, &status);
  128. while ((status & 0x08) != 0x08) {
  129. GT_REG_READ (I2C_CONTROL, &status);
  130. }
  131. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  132. count = 0;
  133. while (((status & 0xff) != 0x40) && ((status & 0xff) != 0x18)) {
  134. if (count > 200) {
  135. #ifdef DEBUG_I2C
  136. printf ("Failed to write address: 0x%02x\n", status);
  137. #endif
  138. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  139. return (status);
  140. }
  141. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  142. asm(" sync");
  143. count++;
  144. }
  145. if (bits == 10) {
  146. printf ("10 bit I2C addressing not yet implemented\n");
  147. return (0xff);
  148. }
  149. return (0);
  150. }
  151. static uchar i2c_get_data (uchar * return_data, int len)
  152. {
  153. unsigned int data, status;
  154. int count = 0;
  155. DP (puts ("i2c_get_data\n"));
  156. while (len) {
  157. RESET_REG_BITS (I2C_CONTROL, BIT3);
  158. asm(" sync");
  159. /* Get and return the data */
  160. GT_REG_READ (I2C_CONTROL, &status);
  161. while ((status & 0x08) != 0x08) {
  162. GT_REG_READ (I2C_CONTROL, &status);
  163. }
  164. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  165. count++;
  166. while ((status & 0xff) != 0x50) {
  167. if (count > 20) {
  168. #ifdef DEBUG_I2C
  169. printf ("Failed to get data len status: 0x%02x\n", status);
  170. #endif
  171. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  172. asm(" sync");
  173. return 0;
  174. }
  175. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  176. count++;
  177. }
  178. GT_REG_READ (I2C_DATA, &data);
  179. len--;
  180. *return_data = (uchar) data;
  181. return_data++;
  182. }
  183. RESET_REG_BITS (I2C_CONTROL, BIT2 | BIT3);
  184. asm(" sync");
  185. count = 0;
  186. GT_REG_READ (I2C_CONTROL, &status);
  187. while ((status & 0x08) != 0x08) {
  188. GT_REG_READ (I2C_CONTROL, &status);
  189. }
  190. while ((status & 0xff) != 0x58) {
  191. if (count > 2000) {
  192. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  193. return (status);
  194. }
  195. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  196. count++;
  197. }
  198. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /* stop */
  199. asm(" sync");
  200. RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
  201. asm(" sync");
  202. return (0);
  203. }
  204. static uchar i2c_write_data (unsigned int *data, int len)
  205. {
  206. unsigned int status;
  207. int count;
  208. unsigned int temp;
  209. unsigned int *temp_ptr = data;
  210. DP (puts ("i2c_write_data\n"));
  211. while (len) {
  212. count = 0;
  213. temp = (unsigned int) (*temp_ptr);
  214. GT_REG_WRITE (I2C_DATA, temp);
  215. asm(" sync");
  216. RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
  217. asm(" sync");
  218. GT_REG_READ (I2C_CONTROL, &status);
  219. while ((status & 0x08) != 0x08) {
  220. GT_REG_READ (I2C_CONTROL, &status);
  221. }
  222. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  223. count++;
  224. while ((status & 0xff) != 0x28) {
  225. if (count > 200) {
  226. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  227. asm(" sync");
  228. return (status);
  229. }
  230. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  231. count++;
  232. }
  233. len--;
  234. temp_ptr++;
  235. }
  236. return (0);
  237. }
  238. static uchar i2c_write_byte (unsigned char *data, int len)
  239. {
  240. unsigned int status;
  241. int count;
  242. unsigned int temp;
  243. unsigned char *temp_ptr = data;
  244. DP (puts ("i2c_write_byte\n"));
  245. while (len) {
  246. count = 0;
  247. /* Set and assert the data */
  248. temp = *temp_ptr;
  249. GT_REG_WRITE (I2C_DATA, temp);
  250. asm(" sync");
  251. RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
  252. asm(" sync");
  253. GT_REG_READ (I2C_CONTROL, &status);
  254. while ((status & 0x08) != 0x08) {
  255. GT_REG_READ (I2C_CONTROL, &status);
  256. }
  257. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  258. count++;
  259. while ((status & 0xff) != 0x28) {
  260. if (count > 200) {
  261. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
  262. asm(" sync");
  263. return (status);
  264. }
  265. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
  266. count++;
  267. }
  268. len--;
  269. temp_ptr++;
  270. }
  271. return (0);
  272. }
  273. static uchar
  274. i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit,
  275. int alen)
  276. {
  277. uchar status;
  278. unsigned int table[2];
  279. table[1] = (offset ) & 0x0ff; /* low byte */
  280. table[0] = (offset >> 8) & 0x0ff; /* high byte */
  281. DP (puts ("i2c_set_dev_offset\n"));
  282. status = i2c_select_device (dev_addr, 0, ten_bit);
  283. if (status) {
  284. #ifdef DEBUG_I2C
  285. 22 printf ("Failed to select device setting offset: 0x%02x\n",
  286. status);
  287. #endif
  288. return status;
  289. }
  290. /* check the address offset length */
  291. if (alen == 0)
  292. /* no address offset */
  293. return (0);
  294. else if (alen == 1) {
  295. /* 1 byte address offset */
  296. status = i2c_write_data (&offset, 1);
  297. if (status) {
  298. #ifdef DEBUG_I2C
  299. printf ("Failed to write data: 0x%02x\n", status);
  300. #endif
  301. return status;
  302. }
  303. } else if (alen == 2) {
  304. /* 2 bytes address offset */
  305. status = i2c_write_data (table, 2);
  306. if (status) {
  307. #ifdef DEBUG_I2C
  308. printf ("Failed to write data: 0x%02x\n", status);
  309. #endif
  310. return status;
  311. }
  312. } else {
  313. /* address offset unknown or not supported */
  314. printf ("Address length offset %d is not supported\n", alen);
  315. return 1;
  316. }
  317. return 0; /* sucessful completion */
  318. }
  319. int
  320. i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
  321. int len)
  322. {
  323. uchar status = 0;
  324. unsigned int i2cFreq = CONFIG_SYS_I2C_SPEED;
  325. DP (puts ("i2c_read\n"));
  326. /* set the i2c frequency */
  327. i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
  328. status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
  329. if (status) {
  330. #ifdef DEBUG_I2C
  331. printf ("Failed to set slave address & offset: 0x%02x\n",
  332. status);
  333. #endif
  334. return status;
  335. }
  336. status = i2c_select_device (dev_addr, 1, 0);
  337. if (status) {
  338. #ifdef DEBUG_I2C
  339. printf ("Failed to select device for data read: 0x%02x\n",
  340. status);
  341. #endif
  342. return status;
  343. }
  344. status = i2c_get_data (data, len);
  345. if (status) {
  346. #ifdef DEBUG_I2C
  347. printf ("Data not read: 0x%02x\n", status);
  348. #endif
  349. return status;
  350. }
  351. return 0;
  352. }
  353. void i2c_stop (void)
  354. {
  355. GT_REG_WRITE (I2C_CONTROL, (0x1 << 4));
  356. asm(" sync");
  357. }
  358. int
  359. i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
  360. int len)
  361. {
  362. uchar status = 0;
  363. unsigned int i2cFreq = CONFIG_SYS_I2C_SPEED;
  364. DP (puts ("i2c_write\n"));
  365. /* set the i2c frequency */
  366. i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
  367. status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
  368. if (status) {
  369. #ifdef DEBUG_I2C
  370. printf ("Failed to set slave address & offset: 0x%02x\n",
  371. status);
  372. #endif
  373. return status;
  374. }
  375. status = i2c_write_byte (data, len); /* write the data */
  376. if (status) {
  377. #ifdef DEBUG_I2C
  378. printf ("Data not written: 0x%02x\n", status);
  379. #endif
  380. return status;
  381. }
  382. /* issue a stop bit */
  383. i2c_stop ();
  384. return 0;
  385. }
  386. int i2c_probe (uchar chip)
  387. {
  388. #ifdef DEBUG_I2C
  389. unsigned int i2c_status;
  390. #endif
  391. uchar status = 0;
  392. unsigned int i2cFreq = CONFIG_SYS_I2C_SPEED;
  393. DP (puts ("i2c_probe\n"));
  394. /* set the i2c frequency */
  395. i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
  396. status = i2c_set_dev_offset (chip, 0, 0, 0); /* send the slave address + no offset */
  397. if (status) {
  398. #ifdef DEBUG_I2C
  399. printf ("Failed to set slave address: 0x%02x\n", status);
  400. #endif
  401. return (int) status;
  402. }
  403. #ifdef DEBUG_I2C
  404. GT_REG_READ (I2C_STATUS_BAUDE_RATE, &i2c_status);
  405. printf ("address %#x returned %#x\n", chip, i2c_status);
  406. #endif
  407. /* issue a stop bit */
  408. i2c_stop ();
  409. return 0; /* successful completion */
  410. }