u-boot.lds.S 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138
  1. /*
  2. * U-boot - u-boot.lds.S
  3. *
  4. * Copyright (c) 2005-2008 Analog Device Inc.
  5. *
  6. * (C) Copyright 2000-2004
  7. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <config.h>
  28. #include <asm/blackfin.h>
  29. #undef ALIGN
  30. /* If we don't actually load anything into L1 data, this will avoid
  31. * a syntax error. If we do actually load something into L1 data,
  32. * we'll get a linker memory load error (which is what we'd want).
  33. * This is here in the first place so we can quickly test building
  34. * for different CPU's which may lack non-cache L1 data.
  35. */
  36. #ifndef L1_DATA_B_SRAM
  37. # define L1_DATA_B_SRAM CFG_MONITOR_BASE
  38. # define L1_DATA_B_SRAM_SIZE 0
  39. #endif
  40. OUTPUT_ARCH(bfin)
  41. /* The 0xC offset is so we don't clobber the tiny LDR jump block. */
  42. MEMORY
  43. {
  44. ram : ORIGIN = CFG_MONITOR_BASE, LENGTH = CFG_MONITOR_LEN
  45. l1_code : ORIGIN = L1_INST_SRAM+0xC, LENGTH = L1_INST_SRAM_SIZE
  46. l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
  47. }
  48. SECTIONS
  49. {
  50. .text :
  51. {
  52. #ifdef ENV_IS_EMBEDDED
  53. /* WARNING - the following is hand-optimized to fit within
  54. * the sector before the environment sector. If it throws
  55. * an error during compilation remove an object here to get
  56. * it linked after the configuration sector.
  57. */
  58. cpu/blackfin/start.o (.text)
  59. cpu/blackfin/traps.o (.text)
  60. cpu/blackfin/interrupt.o (.text)
  61. cpu/blackfin/serial.o (.text)
  62. common/dlmalloc.o (.text)
  63. lib_generic/crc32.o (.text)
  64. lib_generic/zlib.o (.text)
  65. board/bf533-ezkit/bf533-ezkit.o (.text)
  66. . = DEFINED(env_offset) ? env_offset : .;
  67. common/environment.o (.text)
  68. #endif
  69. *(.text .text.*)
  70. } >ram
  71. .rodata :
  72. {
  73. . = ALIGN(4);
  74. *(.rodata .rodata.*)
  75. *(.rodata1)
  76. *(.eh_frame)
  77. . = ALIGN(4);
  78. } >ram
  79. .data :
  80. {
  81. . = ALIGN(256);
  82. *(.data .data.*)
  83. *(.data1)
  84. *(.sdata)
  85. *(.sdata2)
  86. *(.dynamic)
  87. CONSTRUCTORS
  88. } >ram
  89. .u_boot_cmd :
  90. {
  91. ___u_boot_cmd_start = .;
  92. *(.u_boot_cmd)
  93. ___u_boot_cmd_end = .;
  94. } >ram
  95. .text_l1 :
  96. {
  97. . = ALIGN(4);
  98. __stext_l1 = .;
  99. *(.l1.text)
  100. . = ALIGN(4);
  101. __etext_l1 = .;
  102. } >l1_code AT>ram
  103. __stext_l1_lma = LOADADDR(.text_l1);
  104. .data_l1 :
  105. {
  106. . = ALIGN(4);
  107. __sdata_l1 = .;
  108. *(.l1.data)
  109. *(.l1.bss)
  110. . = ALIGN(4);
  111. __edata_l1 = .;
  112. } >l1_data AT>ram
  113. __sdata_l1_lma = LOADADDR(.data_l1);
  114. .bss :
  115. {
  116. . = ALIGN(4);
  117. __bss_start = .;
  118. *(.sbss) *(.scommon)
  119. *(.dynbss)
  120. *(.bss .bss.*)
  121. *(COMMON)
  122. __bss_end = .;
  123. } >ram
  124. }