syslib.c 2.3 KB

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  1. /*
  2. * (C) Copyright 2008
  3. * Texas Instruments, <www.ti.com>
  4. *
  5. * Richard Woodruff <r-woodruff2@ti.com>
  6. * Syed Mohammed Khasim <khasim@ti.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/io.h>
  25. #include <asm/arch/sys_proto.h>
  26. /************************************************************
  27. * sdelay() - simple spin loop. Will be constant time as
  28. * its generally used in bypass conditions only. This
  29. * is necessary until timers are accessible.
  30. *
  31. * not inline to increase chances its in cache when called
  32. *************************************************************/
  33. void sdelay(unsigned long loops)
  34. {
  35. __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
  36. "bne 1b":"=r" (loops):"0"(loops));
  37. }
  38. /*****************************************************************
  39. * sr32 - clear & set a value in a bit range for a 32 bit address
  40. *****************************************************************/
  41. void sr32(void *addr, u32 start_bit, u32 num_bits, u32 value)
  42. {
  43. u32 tmp, msk = 0;
  44. msk = 1 << num_bits;
  45. --msk;
  46. tmp = readl((u32)addr) & ~(msk << start_bit);
  47. tmp |= value << start_bit;
  48. writel(tmp, (u32)addr);
  49. }
  50. /*********************************************************************
  51. * wait_on_value() - common routine to allow waiting for changes in
  52. * volatile regs.
  53. *********************************************************************/
  54. u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr,
  55. u32 bound)
  56. {
  57. u32 i = 0, val;
  58. do {
  59. ++i;
  60. val = readl((u32)read_addr) & read_bit_mask;
  61. if (val == match_value)
  62. return 1;
  63. if (i == bound)
  64. return 0;
  65. } while (1);
  66. }