actux4.c 3.7 KB

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  1. /*
  2. * (C) Copyright 2007
  3. * Michael Schwingen, michael@schwingen.org
  4. *
  5. * (C) Copyright 2006
  6. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  7. *
  8. * (C) Copyright 2002
  9. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  10. *
  11. * (C) Copyright 2002
  12. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  13. * Marius Groeger <mgroeger@sysgo.de>
  14. *
  15. * See file CREDITS for list of people who contributed to this
  16. * project.
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License as
  20. * published by the Free Software Foundation; either version 2 of
  21. * the License, or (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31. * MA 02111-1307 USA
  32. */
  33. #include <common.h>
  34. #include <command.h>
  35. #include <malloc.h>
  36. #include <asm/arch/ixp425.h>
  37. #include <asm/io.h>
  38. #include <miiphy.h>
  39. #ifdef CONFIG_PCI
  40. #include <pci.h>
  41. #include <asm/arch/ixp425pci.h>
  42. #endif
  43. #include "actux4_hw.h"
  44. DECLARE_GLOBAL_DATA_PTR;
  45. int board_early_init_f(void)
  46. {
  47. writel(0xbd113c42, IXP425_EXP_CS1);
  48. return 0;
  49. }
  50. int board_init(void)
  51. {
  52. /* adress of boot parameters */
  53. gd->bd->bi_boot_params = 0x00000100;
  54. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_nPWRON);
  55. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_nPWRON);
  56. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
  57. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
  58. /* led not populated on board*/
  59. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED3);
  60. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED3);
  61. /* middle LED */
  62. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED2);
  63. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED2);
  64. /* right LED */
  65. /* weak pulldown = LED weak on */
  66. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_LED1);
  67. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED1);
  68. /* Setup GPIO's for Interrupt inputs */
  69. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTA);
  70. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTB);
  71. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTC);
  72. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RTCINT);
  73. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA);
  74. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB);
  75. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTA);
  76. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTB);
  77. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTC);
  78. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RTCINT);
  79. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA);
  80. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB);
  81. /* Setup GPIO's for 33MHz clock output */
  82. writel(0x011001FF, IXP425_GPIO_GPCLKR);
  83. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
  84. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
  85. udelay(10000);
  86. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
  87. udelay(10000);
  88. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
  89. udelay(10000);
  90. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
  91. return 0;
  92. }
  93. /* Check Board Identity */
  94. int checkboard(void)
  95. {
  96. puts("Board: AcTux-4\n");
  97. return 0;
  98. }
  99. int dram_init(void)
  100. {
  101. gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
  102. return 0;
  103. }
  104. #ifdef CONFIG_PCI
  105. struct pci_controller hose;
  106. void pci_init_board(void)
  107. {
  108. pci_ixp_init(&hose);
  109. }
  110. #endif
  111. /*
  112. * Hardcoded flash setup:
  113. * Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus.
  114. * Flash 1 is an Intel *16 flash using the CFI driver.
  115. */
  116. ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
  117. {
  118. if (banknum == 0) { /* non-CFI boot flash */
  119. info->portwidth = 1;
  120. info->chipwidth = 1;
  121. info->interface = FLASH_CFI_X8;
  122. return 1;
  123. } else
  124. return 0;
  125. }