timer.c 4.8 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Alex Zuepke <azu@sysgo.de>
  9. *
  10. * (C) Copyright 2002
  11. * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  12. *
  13. * (C) Copyright 2009
  14. * Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
  15. *
  16. * See file CREDITS for list of people who contributed to this
  17. * project.
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License as
  21. * published by the Free Software Foundation; either version 2 of
  22. * the License, or (at your option) any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  32. * MA 02111-1307 USA
  33. */
  34. #include <common.h>
  35. #include <div64.h>
  36. #include <asm/io.h>
  37. #include <asm/arch/imx-regs.h>
  38. /* General purpose timers bitfields */
  39. #define GPTCR_SWR (1 << 15) /* Software reset */
  40. #define GPTCR_FRR (1 << 8) /* Freerun / restart */
  41. #define GPTCR_CLKSOURCE_32 (4 << 1) /* Clock source */
  42. #define GPTCR_TEN 1 /* Timer enable */
  43. static ulong timestamp;
  44. static ulong lastinc;
  45. /*
  46. * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
  47. * "tick" is internal timer period
  48. */
  49. #ifdef CONFIG_MX27_TIMER_HIGH_PRECISION
  50. /* ~0.4% error - measured with stop-watch on 100s boot-delay */
  51. static inline unsigned long long tick_to_time(unsigned long long tick)
  52. {
  53. tick *= CONFIG_SYS_HZ;
  54. do_div(tick, CONFIG_MX27_CLK32);
  55. return tick;
  56. }
  57. static inline unsigned long long time_to_tick(unsigned long long time)
  58. {
  59. time *= CONFIG_MX27_CLK32;
  60. do_div(time, CONFIG_SYS_HZ);
  61. return time;
  62. }
  63. static inline unsigned long long us_to_tick(unsigned long long us)
  64. {
  65. us = us * CONFIG_MX27_CLK32 + 999999;
  66. do_div(us, 1000000);
  67. return us;
  68. }
  69. #else
  70. /* ~2% error */
  71. #define TICK_PER_TIME ((CONFIG_MX27_CLK32 + CONFIG_SYS_HZ / 2) / \
  72. CONFIG_SYS_HZ)
  73. #define US_PER_TICK (1000000 / CONFIG_MX27_CLK32)
  74. static inline unsigned long long tick_to_time(unsigned long long tick)
  75. {
  76. do_div(tick, TICK_PER_TIME);
  77. return tick;
  78. }
  79. static inline unsigned long long time_to_tick(unsigned long long time)
  80. {
  81. return time * TICK_PER_TIME;
  82. }
  83. static inline unsigned long long us_to_tick(unsigned long long us)
  84. {
  85. us += US_PER_TICK - 1;
  86. do_div(us, US_PER_TICK);
  87. return us;
  88. }
  89. #endif
  90. /* nothing really to do with interrupts, just starts up a counter. */
  91. /* The 32768Hz 32-bit timer overruns in 131072 seconds */
  92. int timer_init(void)
  93. {
  94. int i;
  95. struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
  96. struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
  97. /* setup GP Timer 1 */
  98. writel(GPTCR_SWR, &regs->gpt_tctl);
  99. writel(readl(&pll->pccr0) | PCCR0_GPT1_EN, &pll->pccr0);
  100. writel(readl(&pll->pccr1) | PCCR1_PERCLK1_EN, &pll->pccr1);
  101. for (i = 0; i < 100; i++)
  102. writel(0, &regs->gpt_tctl); /* We have no udelay by now */
  103. writel(0, &regs->gpt_tprer); /* 32Khz */
  104. /* Freerun Mode, PERCLK1 input */
  105. writel(readl(&regs->gpt_tctl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
  106. &regs->gpt_tctl);
  107. writel(readl(&regs->gpt_tctl) | GPTCR_TEN, &regs->gpt_tctl);
  108. return 0;
  109. }
  110. void reset_timer_masked(void)
  111. {
  112. struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
  113. /* reset time */
  114. /* capture current incrementer value time */
  115. lastinc = readl(&regs->gpt_tcn);
  116. timestamp = 0; /* start "advancing" time stamp from 0 */
  117. }
  118. void reset_timer(void)
  119. {
  120. reset_timer_masked();
  121. }
  122. unsigned long long get_ticks (void)
  123. {
  124. struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
  125. ulong now = readl(&regs->gpt_tcn); /* current tick value */
  126. if (now >= lastinc) {
  127. /*
  128. * normal mode (non roll)
  129. * move stamp forward with absolut diff ticks
  130. */
  131. timestamp += (now - lastinc);
  132. } else {
  133. /* we have rollover of incrementer */
  134. timestamp += (0xFFFFFFFF - lastinc) + now;
  135. }
  136. lastinc = now;
  137. return timestamp;
  138. }
  139. ulong get_timer_masked (void)
  140. {
  141. /*
  142. * get_ticks() returns a long long (64 bit), it wraps in
  143. * 2^64 / CONFIG_MX27_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
  144. * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
  145. * 5 * 10^6 days - long enough.
  146. */
  147. return tick_to_time(get_ticks());
  148. }
  149. ulong get_timer (ulong base)
  150. {
  151. return get_timer_masked () - base;
  152. }
  153. void set_timer (ulong t)
  154. {
  155. timestamp = time_to_tick(t);
  156. }
  157. /* delay x useconds AND preserve advance timstamp value */
  158. void udelay (unsigned long usec)
  159. {
  160. unsigned long long tmp;
  161. ulong tmo;
  162. tmo = us_to_tick(usec);
  163. tmp = get_ticks() + tmo; /* get current timestamp */
  164. while (get_ticks() < tmp) /* loop till event */
  165. /*NOP*/;
  166. }