cmd_ide.c 42 KB

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  1. /*
  2. * (C) Copyright 2000-2011
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #include <ide.h>
  44. #include <ata.h>
  45. #ifdef CONFIG_STATUS_LED
  46. # include <status_led.h>
  47. #endif
  48. #ifdef __PPC__
  49. # define EIEIO __asm__ volatile ("eieio")
  50. # define SYNC __asm__ volatile ("sync")
  51. #else
  52. # define EIEIO /* nothing */
  53. # define SYNC /* nothing */
  54. #endif
  55. /* ------------------------------------------------------------------------- */
  56. /* Current I/O Device */
  57. static int curr_device = -1;
  58. /* Current offset for IDE0 / IDE1 bus access */
  59. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  60. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  61. CONFIG_SYS_ATA_IDE0_OFFSET,
  62. #endif
  63. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  64. CONFIG_SYS_ATA_IDE1_OFFSET,
  65. #endif
  66. };
  67. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  68. block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  69. /* ------------------------------------------------------------------------- */
  70. #ifdef CONFIG_IDE_LED
  71. # if !defined(CONFIG_BMS2003) && \
  72. !defined(CONFIG_CPC45) && \
  73. !defined(CONFIG_KUP4K) && \
  74. !defined(CONFIG_KUP4X)
  75. static void ide_led (uchar led, uchar status);
  76. #else
  77. extern void ide_led (uchar led, uchar status);
  78. #endif
  79. #else
  80. #define ide_led(a,b) /* dummy */
  81. #endif
  82. #ifdef CONFIG_IDE_RESET
  83. static void ide_reset (void);
  84. #else
  85. #define ide_reset() /* dummy */
  86. #endif
  87. static void ide_ident (block_dev_desc_t *dev_desc);
  88. static uchar ide_wait (int dev, ulong t);
  89. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  90. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  91. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  92. static void input_data(int dev, ulong *sect_buf, int words);
  93. static void output_data(int dev, const ulong *sect_buf, int words);
  94. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  95. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  96. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  97. #endif
  98. #ifdef CONFIG_ATAPI
  99. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  100. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  101. #endif
  102. /* ------------------------------------------------------------------------- */
  103. int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
  104. {
  105. int rcode = 0;
  106. switch (argc) {
  107. case 0:
  108. case 1:
  109. return CMD_RET_USAGE;
  110. case 2:
  111. if (strncmp(argv[1], "res", 3) == 0) {
  112. puts("\nReset IDE"
  113. #ifdef CONFIG_IDE_8xx_DIRECT
  114. " on PCMCIA " PCMCIA_SLOT_MSG
  115. #endif
  116. ": ");
  117. ide_init();
  118. return 0;
  119. } else if (strncmp(argv[1], "inf", 3) == 0) {
  120. int i;
  121. putc('\n');
  122. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  123. if (ide_dev_desc[i].type == DEV_TYPE_UNKNOWN)
  124. continue; /* list only known devices */
  125. printf("IDE device %d: ", i);
  126. dev_print(&ide_dev_desc[i]);
  127. }
  128. return 0;
  129. } else if (strncmp(argv[1], "dev", 3) == 0) {
  130. if ((curr_device < 0)
  131. || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
  132. puts("\nno IDE devices available\n");
  133. return 1;
  134. }
  135. printf("\nIDE device %d: ", curr_device);
  136. dev_print(&ide_dev_desc[curr_device]);
  137. return 0;
  138. } else if (strncmp(argv[1], "part", 4) == 0) {
  139. int dev, ok;
  140. for (ok = 0, dev = 0;
  141. dev < CONFIG_SYS_IDE_MAXDEVICE;
  142. ++dev) {
  143. if (ide_dev_desc[dev].part_type !=
  144. PART_TYPE_UNKNOWN) {
  145. ++ok;
  146. if (dev)
  147. putc('\n');
  148. print_part(&ide_dev_desc[dev]);
  149. }
  150. }
  151. if (!ok) {
  152. puts("\nno IDE devices available\n");
  153. rcode++;
  154. }
  155. return rcode;
  156. }
  157. return CMD_RET_USAGE;
  158. case 3:
  159. if (strncmp(argv[1], "dev", 3) == 0) {
  160. int dev = (int) simple_strtoul(argv[2], NULL, 10);
  161. printf("\nIDE device %d: ", dev);
  162. if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
  163. puts("unknown device\n");
  164. return 1;
  165. }
  166. dev_print(&ide_dev_desc[dev]);
  167. /*ide_print (dev); */
  168. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
  169. return 1;
  170. curr_device = dev;
  171. puts("... is now current device\n");
  172. return 0;
  173. } else if (strncmp(argv[1], "part", 4) == 0) {
  174. int dev = (int) simple_strtoul(argv[2], NULL, 10);
  175. if (ide_dev_desc[dev].part_type != PART_TYPE_UNKNOWN) {
  176. print_part(&ide_dev_desc[dev]);
  177. } else {
  178. printf("\nIDE device %d not available\n",
  179. dev);
  180. rcode = 1;
  181. }
  182. return rcode;
  183. }
  184. return CMD_RET_USAGE;
  185. default:
  186. /* at least 4 args */
  187. if (strcmp(argv[1], "read") == 0) {
  188. ulong addr = simple_strtoul(argv[2], NULL, 16);
  189. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  190. ulong n;
  191. #ifdef CONFIG_SYS_64BIT_LBA
  192. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  193. printf("\nIDE read: device %d block # %lld, count %ld ... ",
  194. curr_device, blk, cnt);
  195. #else
  196. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  197. printf("\nIDE read: device %d block # %ld, count %ld ... ",
  198. curr_device, blk, cnt);
  199. #endif
  200. n = ide_dev_desc[curr_device].block_read(curr_device,
  201. blk, cnt,
  202. (ulong *)addr);
  203. /* flush cache after read */
  204. flush_cache(addr,
  205. cnt * ide_dev_desc[curr_device].blksz);
  206. printf("%ld blocks read: %s\n",
  207. n, (n == cnt) ? "OK" : "ERROR");
  208. if (n == cnt)
  209. return 0;
  210. else
  211. return 1;
  212. } else if (strcmp(argv[1], "write") == 0) {
  213. ulong addr = simple_strtoul(argv[2], NULL, 16);
  214. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  215. ulong n;
  216. #ifdef CONFIG_SYS_64BIT_LBA
  217. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  218. printf("\nIDE write: device %d block # %lld, count %ld ... ",
  219. curr_device, blk, cnt);
  220. #else
  221. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  222. printf("\nIDE write: device %d block # %ld, count %ld ... ",
  223. curr_device, blk, cnt);
  224. #endif
  225. n = ide_write(curr_device, blk, cnt, (ulong *) addr);
  226. printf("%ld blocks written: %s\n",
  227. n, (n == cnt) ? "OK" : "ERROR");
  228. if (n == cnt)
  229. return 0;
  230. else
  231. return 1;
  232. } else {
  233. return CMD_RET_USAGE;
  234. }
  235. return rcode;
  236. }
  237. }
  238. int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
  239. {
  240. return common_diskboot(cmdtp, "ide", argc, argv);
  241. }
  242. /* ------------------------------------------------------------------------- */
  243. inline void __ide_outb(int dev, int port, unsigned char val)
  244. {
  245. debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  246. dev, port, val,
  247. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  248. #if defined(CONFIG_IDE_AHB)
  249. if (port) {
  250. /* write command */
  251. ide_write_register(dev, port, val);
  252. } else {
  253. /* write data */
  254. outb(val, (ATA_CURR_BASE(dev)));
  255. }
  256. #else
  257. outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  258. #endif
  259. }
  260. void ide_outb(int dev, int port, unsigned char val)
  261. __attribute__ ((weak, alias("__ide_outb")));
  262. inline unsigned char __ide_inb(int dev, int port)
  263. {
  264. uchar val;
  265. #if defined(CONFIG_IDE_AHB)
  266. val = ide_read_register(dev, port);
  267. #else
  268. val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  269. #endif
  270. debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  271. dev, port,
  272. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  273. return val;
  274. }
  275. unsigned char ide_inb(int dev, int port)
  276. __attribute__ ((weak, alias("__ide_inb")));
  277. #ifdef CONFIG_TUNE_PIO
  278. inline int __ide_set_piomode(int pio_mode)
  279. {
  280. return 0;
  281. }
  282. inline int ide_set_piomode(int pio_mode)
  283. __attribute__ ((weak, alias("__ide_set_piomode")));
  284. #endif
  285. void ide_init(void)
  286. {
  287. unsigned char c;
  288. int i, bus;
  289. #ifdef CONFIG_IDE_8xx_PCCARD
  290. extern int ide_devices_found; /* Initialized in check_ide_device() */
  291. #endif /* CONFIG_IDE_8xx_PCCARD */
  292. #ifdef CONFIG_IDE_PREINIT
  293. WATCHDOG_RESET();
  294. if (ide_preinit()) {
  295. puts("ide_preinit failed\n");
  296. return;
  297. }
  298. #endif /* CONFIG_IDE_PREINIT */
  299. WATCHDOG_RESET();
  300. /*
  301. * Reset the IDE just to be sure.
  302. * Light LED's to show
  303. */
  304. ide_led((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  305. /* ATAPI Drives seems to need a proper IDE Reset */
  306. ide_reset();
  307. #ifdef CONFIG_IDE_INIT_POSTRESET
  308. WATCHDOG_RESET();
  309. if (ide_init_postreset()) {
  310. puts("ide_preinit_postreset failed\n");
  311. return;
  312. }
  313. #endif /* CONFIG_IDE_INIT_POSTRESET */
  314. /*
  315. * Wait for IDE to get ready.
  316. * According to spec, this can take up to 31 seconds!
  317. */
  318. for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
  319. int dev =
  320. bus * (CONFIG_SYS_IDE_MAXDEVICE /
  321. CONFIG_SYS_IDE_MAXBUS);
  322. #ifdef CONFIG_IDE_8xx_PCCARD
  323. /* Skip non-ide devices from probing */
  324. if ((ide_devices_found & (1 << bus)) == 0) {
  325. ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  326. continue;
  327. }
  328. #endif
  329. printf("Bus %d: ", bus);
  330. ide_bus_ok[bus] = 0;
  331. /* Select device
  332. */
  333. udelay(100000); /* 100 ms */
  334. ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  335. udelay(100000); /* 100 ms */
  336. i = 0;
  337. do {
  338. udelay(10000); /* 10 ms */
  339. c = ide_inb(dev, ATA_STATUS);
  340. i++;
  341. if (i > (ATA_RESET_TIME * 100)) {
  342. puts("** Timeout **\n");
  343. /* LED's off */
  344. ide_led((LED_IDE1 | LED_IDE2), 0);
  345. return;
  346. }
  347. if ((i >= 100) && ((i % 100) == 0))
  348. putc('.');
  349. } while (c & ATA_STAT_BUSY);
  350. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  351. puts("not available ");
  352. debug("Status = 0x%02X ", c);
  353. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  354. } else if ((c & ATA_STAT_READY) == 0) {
  355. puts("not available ");
  356. debug("Status = 0x%02X ", c);
  357. #endif
  358. } else {
  359. puts("OK ");
  360. ide_bus_ok[bus] = 1;
  361. }
  362. WATCHDOG_RESET();
  363. }
  364. putc('\n');
  365. ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  366. curr_device = -1;
  367. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  368. #ifdef CONFIG_IDE_LED
  369. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  370. #endif
  371. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  372. ide_dev_desc[i].if_type = IF_TYPE_IDE;
  373. ide_dev_desc[i].dev = i;
  374. ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
  375. ide_dev_desc[i].blksz = 0;
  376. ide_dev_desc[i].lba = 0;
  377. ide_dev_desc[i].block_read = ide_read;
  378. ide_dev_desc[i].block_write = ide_write;
  379. if (!ide_bus_ok[IDE_BUS(i)])
  380. continue;
  381. ide_led(led, 1); /* LED on */
  382. ide_ident(&ide_dev_desc[i]);
  383. ide_led(led, 0); /* LED off */
  384. dev_print(&ide_dev_desc[i]);
  385. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  386. /* initialize partition type */
  387. init_part(&ide_dev_desc[i]);
  388. if (curr_device < 0)
  389. curr_device = i;
  390. }
  391. }
  392. WATCHDOG_RESET();
  393. }
  394. /* ------------------------------------------------------------------------- */
  395. #ifdef CONFIG_PARTITIONS
  396. block_dev_desc_t *ide_get_dev(int dev)
  397. {
  398. return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  399. }
  400. #endif
  401. /* ------------------------------------------------------------------------- */
  402. /* We only need to swap data if we are running on a big endian cpu. */
  403. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  404. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SOC_AU1X00)
  405. #define input_swap_data(x,y,z) input_data(x,y,z)
  406. #else
  407. static void input_swap_data(int dev, ulong *sect_buf, int words)
  408. {
  409. #if defined(CONFIG_CPC45)
  410. uchar i;
  411. volatile uchar *pbuf_even =
  412. (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
  413. volatile uchar *pbuf_odd =
  414. (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
  415. ushort *dbuf = (ushort *) sect_buf;
  416. while (words--) {
  417. for (i = 0; i < 2; i++) {
  418. *(((uchar *) (dbuf)) + 1) = *pbuf_even;
  419. *(uchar *) dbuf = *pbuf_odd;
  420. dbuf += 1;
  421. }
  422. }
  423. #else
  424. volatile ushort *pbuf =
  425. (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
  426. ushort *dbuf = (ushort *) sect_buf;
  427. debug("in input swap data base for read is %lx\n",
  428. (unsigned long) pbuf);
  429. while (words--) {
  430. #ifdef __MIPS__
  431. *dbuf++ = swab16p((u16 *) pbuf);
  432. *dbuf++ = swab16p((u16 *) pbuf);
  433. #elif defined(CONFIG_PCS440EP)
  434. *dbuf++ = *pbuf;
  435. *dbuf++ = *pbuf;
  436. #else
  437. *dbuf++ = ld_le16(pbuf);
  438. *dbuf++ = ld_le16(pbuf);
  439. #endif /* !MIPS */
  440. }
  441. #endif
  442. }
  443. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  444. #if defined(CONFIG_IDE_SWAP_IO)
  445. static void output_data(int dev, const ulong *sect_buf, int words)
  446. {
  447. #if defined(CONFIG_CPC45)
  448. uchar *dbuf;
  449. volatile uchar *pbuf_even;
  450. volatile uchar *pbuf_odd;
  451. pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
  452. pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
  453. dbuf = (uchar *) sect_buf;
  454. while (words--) {
  455. EIEIO;
  456. *pbuf_even = *dbuf++;
  457. EIEIO;
  458. *pbuf_odd = *dbuf++;
  459. EIEIO;
  460. *pbuf_even = *dbuf++;
  461. EIEIO;
  462. *pbuf_odd = *dbuf++;
  463. }
  464. #else
  465. ushort *dbuf;
  466. volatile ushort *pbuf;
  467. pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
  468. dbuf = (ushort *) sect_buf;
  469. while (words--) {
  470. #if defined(CONFIG_PCS440EP)
  471. /* not tested, because CF was write protected */
  472. EIEIO;
  473. *pbuf = ld_le16(dbuf++);
  474. EIEIO;
  475. *pbuf = ld_le16(dbuf++);
  476. #else
  477. EIEIO;
  478. *pbuf = *dbuf++;
  479. EIEIO;
  480. *pbuf = *dbuf++;
  481. #endif
  482. }
  483. #endif
  484. }
  485. #else /* ! CONFIG_IDE_SWAP_IO */
  486. static void output_data(int dev, const ulong *sect_buf, int words)
  487. {
  488. #if defined(CONFIG_IDE_AHB)
  489. ide_write_data(dev, sect_buf, words);
  490. #else
  491. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  492. #endif
  493. }
  494. #endif /* CONFIG_IDE_SWAP_IO */
  495. #if defined(CONFIG_IDE_SWAP_IO)
  496. static void input_data(int dev, ulong *sect_buf, int words)
  497. {
  498. #if defined(CONFIG_CPC45)
  499. uchar *dbuf;
  500. volatile uchar *pbuf_even;
  501. volatile uchar *pbuf_odd;
  502. pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
  503. pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
  504. dbuf = (uchar *) sect_buf;
  505. while (words--) {
  506. *dbuf++ = *pbuf_even;
  507. EIEIO;
  508. SYNC;
  509. *dbuf++ = *pbuf_odd;
  510. EIEIO;
  511. SYNC;
  512. *dbuf++ = *pbuf_even;
  513. EIEIO;
  514. SYNC;
  515. *dbuf++ = *pbuf_odd;
  516. EIEIO;
  517. SYNC;
  518. }
  519. #else
  520. ushort *dbuf;
  521. volatile ushort *pbuf;
  522. pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
  523. dbuf = (ushort *) sect_buf;
  524. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  525. while (words--) {
  526. #if defined(CONFIG_PCS440EP)
  527. EIEIO;
  528. *dbuf++ = ld_le16(pbuf);
  529. EIEIO;
  530. *dbuf++ = ld_le16(pbuf);
  531. #else
  532. EIEIO;
  533. *dbuf++ = *pbuf;
  534. EIEIO;
  535. *dbuf++ = *pbuf;
  536. #endif
  537. }
  538. #endif
  539. }
  540. #else /* ! CONFIG_IDE_SWAP_IO */
  541. static void input_data(int dev, ulong *sect_buf, int words)
  542. {
  543. #if defined(CONFIG_IDE_AHB)
  544. ide_read_data(dev, sect_buf, words);
  545. #else
  546. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  547. #endif
  548. }
  549. #endif /* CONFIG_IDE_SWAP_IO */
  550. /* -------------------------------------------------------------------------
  551. */
  552. static void ide_ident(block_dev_desc_t *dev_desc)
  553. {
  554. unsigned char c;
  555. hd_driveid_t iop;
  556. #ifdef CONFIG_ATAPI
  557. int retries = 0;
  558. #endif
  559. #ifdef CONFIG_TUNE_PIO
  560. int pio_mode;
  561. #endif
  562. #if 0
  563. int mode, cycle_time;
  564. #endif
  565. int device;
  566. device = dev_desc->dev;
  567. printf(" Device %d: ", device);
  568. ide_led(DEVICE_LED(device), 1); /* LED on */
  569. /* Select device
  570. */
  571. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  572. dev_desc->if_type = IF_TYPE_IDE;
  573. #ifdef CONFIG_ATAPI
  574. retries = 0;
  575. /* Warning: This will be tricky to read */
  576. while (retries <= 1) {
  577. /* check signature */
  578. if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
  579. (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
  580. (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
  581. (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
  582. /* ATAPI Signature found */
  583. dev_desc->if_type = IF_TYPE_ATAPI;
  584. /*
  585. * Start Ident Command
  586. */
  587. ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
  588. /*
  589. * Wait for completion - ATAPI devices need more time
  590. * to become ready
  591. */
  592. c = ide_wait(device, ATAPI_TIME_OUT);
  593. } else
  594. #endif
  595. {
  596. /*
  597. * Start Ident Command
  598. */
  599. ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
  600. /*
  601. * Wait for completion
  602. */
  603. c = ide_wait(device, IDE_TIME_OUT);
  604. }
  605. ide_led(DEVICE_LED(device), 0); /* LED off */
  606. if (((c & ATA_STAT_DRQ) == 0) ||
  607. ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
  608. #ifdef CONFIG_ATAPI
  609. {
  610. /*
  611. * Need to soft reset the device
  612. * in case it's an ATAPI...
  613. */
  614. debug("Retrying...\n");
  615. ide_outb(device, ATA_DEV_HD,
  616. ATA_LBA | ATA_DEVICE(device));
  617. udelay(100000);
  618. ide_outb(device, ATA_COMMAND, 0x08);
  619. udelay(500000); /* 500 ms */
  620. }
  621. /*
  622. * Select device
  623. */
  624. ide_outb(device, ATA_DEV_HD,
  625. ATA_LBA | ATA_DEVICE(device));
  626. retries++;
  627. #else
  628. return;
  629. #endif
  630. }
  631. #ifdef CONFIG_ATAPI
  632. else
  633. break;
  634. } /* see above - ugly to read */
  635. if (retries == 2) /* Not found */
  636. return;
  637. #endif
  638. input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
  639. ident_cpy((unsigned char *) dev_desc->revision, iop.fw_rev,
  640. sizeof(dev_desc->revision));
  641. ident_cpy((unsigned char *) dev_desc->vendor, iop.model,
  642. sizeof(dev_desc->vendor));
  643. ident_cpy((unsigned char *) dev_desc->product, iop.serial_no,
  644. sizeof(dev_desc->product));
  645. #ifdef __LITTLE_ENDIAN
  646. /*
  647. * firmware revision, model, and serial number have Big Endian Byte
  648. * order in Word. Convert all three to little endian.
  649. *
  650. * See CF+ and CompactFlash Specification Revision 2.0:
  651. * 6.2.1.6: Identify Drive, Table 39 for more details
  652. */
  653. strswab(dev_desc->revision);
  654. strswab(dev_desc->vendor);
  655. strswab(dev_desc->product);
  656. #endif /* __LITTLE_ENDIAN */
  657. if ((iop.config & 0x0080) == 0x0080)
  658. dev_desc->removable = 1;
  659. else
  660. dev_desc->removable = 0;
  661. #ifdef CONFIG_TUNE_PIO
  662. /* Mode 0 - 2 only, are directly determined by word 51. */
  663. pio_mode = iop.tPIO;
  664. if (pio_mode > 2) {
  665. printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
  666. /* Force it to dead slow, and hope for the best... */
  667. pio_mode = 0;
  668. }
  669. /* Any CompactFlash Storage Card that supports PIO mode 3 or above
  670. * shall set bit 1 of word 53 to one and support the fields contained
  671. * in words 64 through 70.
  672. */
  673. if (iop.field_valid & 0x02) {
  674. /*
  675. * Mode 3 and above are possible. Check in order from slow
  676. * to fast, so we wind up with the highest mode allowed.
  677. */
  678. if (iop.eide_pio_modes & 0x01)
  679. pio_mode = 3;
  680. if (iop.eide_pio_modes & 0x02)
  681. pio_mode = 4;
  682. if (ata_id_is_cfa((u16 *)&iop)) {
  683. if ((iop.cf_advanced_caps & 0x07) == 0x01)
  684. pio_mode = 5;
  685. if ((iop.cf_advanced_caps & 0x07) == 0x02)
  686. pio_mode = 6;
  687. }
  688. }
  689. /* System-specific, depends on bus speeds, etc. */
  690. ide_set_piomode(pio_mode);
  691. #endif /* CONFIG_TUNE_PIO */
  692. #if 0
  693. /*
  694. * Drive PIO mode autoselection
  695. */
  696. mode = iop.tPIO;
  697. printf("tPIO = 0x%02x = %d\n", mode, mode);
  698. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  699. mode = 2;
  700. debug("Override tPIO -> 2\n");
  701. }
  702. if (iop.field_valid & 2) { /* drive implements ATA2? */
  703. debug("Drive implements ATA2\n");
  704. if (iop.capability & 8) { /* drive supports use_iordy? */
  705. cycle_time = iop.eide_pio_iordy;
  706. } else {
  707. cycle_time = iop.eide_pio;
  708. }
  709. debug("cycle time = %d\n", cycle_time);
  710. mode = 4;
  711. if (cycle_time > 120)
  712. mode = 3; /* 120 ns for PIO mode 4 */
  713. if (cycle_time > 180)
  714. mode = 2; /* 180 ns for PIO mode 3 */
  715. if (cycle_time > 240)
  716. mode = 1; /* 240 ns for PIO mode 4 */
  717. if (cycle_time > 383)
  718. mode = 0; /* 383 ns for PIO mode 4 */
  719. }
  720. printf("PIO mode to use: PIO %d\n", mode);
  721. #endif /* 0 */
  722. #ifdef CONFIG_ATAPI
  723. if (dev_desc->if_type == IF_TYPE_ATAPI) {
  724. atapi_inquiry(dev_desc);
  725. return;
  726. }
  727. #endif /* CONFIG_ATAPI */
  728. #ifdef __BIG_ENDIAN
  729. /* swap shorts */
  730. dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
  731. #else /* ! __BIG_ENDIAN */
  732. /*
  733. * do not swap shorts on little endian
  734. *
  735. * See CF+ and CompactFlash Specification Revision 2.0:
  736. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  737. */
  738. dev_desc->lba = iop.lba_capacity;
  739. #endif /* __BIG_ENDIAN */
  740. #ifdef CONFIG_LBA48
  741. if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
  742. dev_desc->lba48 = 1;
  743. dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
  744. ((unsigned long long) iop.lba48_capacity[1] << 16) |
  745. ((unsigned long long) iop.lba48_capacity[2] << 32) |
  746. ((unsigned long long) iop.lba48_capacity[3] << 48);
  747. } else {
  748. dev_desc->lba48 = 0;
  749. }
  750. #endif /* CONFIG_LBA48 */
  751. /* assuming HD */
  752. dev_desc->type = DEV_TYPE_HARDDISK;
  753. dev_desc->blksz = ATA_BLOCKSIZE;
  754. dev_desc->lun = 0; /* just to fill something in... */
  755. #if 0 /* only used to test the powersaving mode,
  756. * if enabled, the drive goes after 5 sec
  757. * in standby mode */
  758. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  759. c = ide_wait(device, IDE_TIME_OUT);
  760. ide_outb(device, ATA_SECT_CNT, 1);
  761. ide_outb(device, ATA_LBA_LOW, 0);
  762. ide_outb(device, ATA_LBA_MID, 0);
  763. ide_outb(device, ATA_LBA_HIGH, 0);
  764. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  765. ide_outb(device, ATA_COMMAND, 0xe3);
  766. udelay(50);
  767. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  768. #endif
  769. }
  770. /* ------------------------------------------------------------------------- */
  771. ulong ide_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  772. {
  773. ulong n = 0;
  774. unsigned char c;
  775. unsigned char pwrsave = 0; /* power save */
  776. #ifdef CONFIG_LBA48
  777. unsigned char lba48 = 0;
  778. if (blknr & 0x0000fffff0000000ULL) {
  779. /* more than 28 bits used, use 48bit mode */
  780. lba48 = 1;
  781. }
  782. #endif
  783. debug("ide_read dev %d start %lX, blocks %lX buffer at %lX\n",
  784. device, blknr, blkcnt, (ulong) buffer);
  785. ide_led(DEVICE_LED(device), 1); /* LED on */
  786. /* Select device
  787. */
  788. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  789. c = ide_wait(device, IDE_TIME_OUT);
  790. if (c & ATA_STAT_BUSY) {
  791. printf("IDE read: device %d not ready\n", device);
  792. goto IDE_READ_E;
  793. }
  794. /* first check if the drive is in Powersaving mode, if yes,
  795. * increase the timeout value */
  796. ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  797. udelay(50);
  798. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  799. if (c & ATA_STAT_BUSY) {
  800. printf("IDE read: device %d not ready\n", device);
  801. goto IDE_READ_E;
  802. }
  803. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  804. printf("No Powersaving mode %X\n", c);
  805. } else {
  806. c = ide_inb(device, ATA_SECT_CNT);
  807. debug("Powersaving %02X\n", c);
  808. if (c == 0)
  809. pwrsave = 1;
  810. }
  811. while (blkcnt-- > 0) {
  812. c = ide_wait(device, IDE_TIME_OUT);
  813. if (c & ATA_STAT_BUSY) {
  814. printf("IDE read: device %d not ready\n", device);
  815. break;
  816. }
  817. #ifdef CONFIG_LBA48
  818. if (lba48) {
  819. /* write high bits */
  820. ide_outb(device, ATA_SECT_CNT, 0);
  821. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  822. #ifdef CONFIG_SYS_64BIT_LBA
  823. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  824. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  825. #else
  826. ide_outb(device, ATA_LBA_MID, 0);
  827. ide_outb(device, ATA_LBA_HIGH, 0);
  828. #endif
  829. }
  830. #endif
  831. ide_outb(device, ATA_SECT_CNT, 1);
  832. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  833. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  834. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  835. #ifdef CONFIG_LBA48
  836. if (lba48) {
  837. ide_outb(device, ATA_DEV_HD,
  838. ATA_LBA | ATA_DEVICE(device));
  839. ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
  840. } else
  841. #endif
  842. {
  843. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  844. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  845. ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
  846. }
  847. udelay(50);
  848. if (pwrsave) {
  849. /* may take up to 4 sec */
  850. c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
  851. pwrsave = 0;
  852. } else {
  853. /* can't take over 500 ms */
  854. c = ide_wait(device, IDE_TIME_OUT);
  855. }
  856. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  857. ATA_STAT_DRQ) {
  858. #if defined(CONFIG_SYS_64BIT_LBA)
  859. printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n",
  860. device, blknr, c);
  861. #else
  862. printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  863. device, (ulong) blknr, c);
  864. #endif
  865. break;
  866. }
  867. input_data(device, buffer, ATA_SECTORWORDS);
  868. (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
  869. ++n;
  870. ++blknr;
  871. buffer += ATA_BLOCKSIZE;
  872. }
  873. IDE_READ_E:
  874. ide_led(DEVICE_LED(device), 0); /* LED off */
  875. return (n);
  876. }
  877. /* ------------------------------------------------------------------------- */
  878. ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, const void *buffer)
  879. {
  880. ulong n = 0;
  881. unsigned char c;
  882. #ifdef CONFIG_LBA48
  883. unsigned char lba48 = 0;
  884. if (blknr & 0x0000fffff0000000ULL) {
  885. /* more than 28 bits used, use 48bit mode */
  886. lba48 = 1;
  887. }
  888. #endif
  889. ide_led(DEVICE_LED(device), 1); /* LED on */
  890. /* Select device
  891. */
  892. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  893. while (blkcnt-- > 0) {
  894. c = ide_wait(device, IDE_TIME_OUT);
  895. if (c & ATA_STAT_BUSY) {
  896. printf("IDE read: device %d not ready\n", device);
  897. goto WR_OUT;
  898. }
  899. #ifdef CONFIG_LBA48
  900. if (lba48) {
  901. /* write high bits */
  902. ide_outb(device, ATA_SECT_CNT, 0);
  903. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  904. #ifdef CONFIG_SYS_64BIT_LBA
  905. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  906. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  907. #else
  908. ide_outb(device, ATA_LBA_MID, 0);
  909. ide_outb(device, ATA_LBA_HIGH, 0);
  910. #endif
  911. }
  912. #endif
  913. ide_outb(device, ATA_SECT_CNT, 1);
  914. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  915. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  916. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  917. #ifdef CONFIG_LBA48
  918. if (lba48) {
  919. ide_outb(device, ATA_DEV_HD,
  920. ATA_LBA | ATA_DEVICE(device));
  921. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  922. } else
  923. #endif
  924. {
  925. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  926. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  927. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
  928. }
  929. udelay(50);
  930. /* can't take over 500 ms */
  931. c = ide_wait(device, IDE_TIME_OUT);
  932. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  933. ATA_STAT_DRQ) {
  934. #if defined(CONFIG_SYS_64BIT_LBA)
  935. printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n",
  936. device, blknr, c);
  937. #else
  938. printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  939. device, (ulong) blknr, c);
  940. #endif
  941. goto WR_OUT;
  942. }
  943. output_data(device, buffer, ATA_SECTORWORDS);
  944. c = ide_inb(device, ATA_STATUS); /* clear IRQ */
  945. ++n;
  946. ++blknr;
  947. buffer += ATA_BLOCKSIZE;
  948. }
  949. WR_OUT:
  950. ide_led(DEVICE_LED(device), 0); /* LED off */
  951. return (n);
  952. }
  953. /* ------------------------------------------------------------------------- */
  954. /*
  955. * copy src to dest, skipping leading and trailing blanks and null
  956. * terminate the string
  957. * "len" is the size of available memory including the terminating '\0'
  958. */
  959. static void ident_cpy(unsigned char *dst, unsigned char *src,
  960. unsigned int len)
  961. {
  962. unsigned char *end, *last;
  963. last = dst;
  964. end = src + len - 1;
  965. /* reserve space for '\0' */
  966. if (len < 2)
  967. goto OUT;
  968. /* skip leading white space */
  969. while ((*src) && (src < end) && (*src == ' '))
  970. ++src;
  971. /* copy string, omitting trailing white space */
  972. while ((*src) && (src < end)) {
  973. *dst++ = *src;
  974. if (*src++ != ' ')
  975. last = dst;
  976. }
  977. OUT:
  978. *last = '\0';
  979. }
  980. /* ------------------------------------------------------------------------- */
  981. /*
  982. * Wait until Busy bit is off, or timeout (in ms)
  983. * Return last status
  984. */
  985. static uchar ide_wait(int dev, ulong t)
  986. {
  987. ulong delay = 10 * t; /* poll every 100 us */
  988. uchar c;
  989. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  990. udelay(100);
  991. if (delay-- == 0)
  992. break;
  993. }
  994. return (c);
  995. }
  996. /* ------------------------------------------------------------------------- */
  997. #ifdef CONFIG_IDE_RESET
  998. extern void ide_set_reset(int idereset);
  999. static void ide_reset(void)
  1000. {
  1001. #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
  1002. volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
  1003. #endif
  1004. int i;
  1005. curr_device = -1;
  1006. for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
  1007. ide_bus_ok[i] = 0;
  1008. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
  1009. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1010. ide_set_reset(1); /* assert reset */
  1011. /* the reset signal shall be asserted for et least 25 us */
  1012. udelay(25);
  1013. WATCHDOG_RESET();
  1014. #ifdef CONFIG_SYS_PB_12V_ENABLE
  1015. /* 12V Enable output OFF */
  1016. immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1017. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1018. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1019. immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
  1020. /* wait 500 ms for the voltage to stabilize */
  1021. for (i = 0; i < 500; ++i)
  1022. udelay(1000);
  1023. /* 12V Enable output ON */
  1024. immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE;
  1025. #endif /* CONFIG_SYS_PB_12V_ENABLE */
  1026. #ifdef CONFIG_SYS_PB_IDE_MOTOR
  1027. /* configure IDE Motor voltage monitor pin as input */
  1028. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1029. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1030. immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1031. /* wait up to 1 s for the motor voltage to stabilize */
  1032. for (i = 0; i < 1000; ++i) {
  1033. if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
  1034. break;
  1035. }
  1036. udelay(1000);
  1037. }
  1038. if (i == 1000) { /* Timeout */
  1039. printf("\nWarning: 5V for IDE Motor missing\n");
  1040. #ifdef CONFIG_STATUS_LED
  1041. #ifdef STATUS_LED_YELLOW
  1042. status_led_set(STATUS_LED_YELLOW, STATUS_LED_ON);
  1043. #endif
  1044. #ifdef STATUS_LED_GREEN
  1045. status_led_set(STATUS_LED_GREEN, STATUS_LED_OFF);
  1046. #endif
  1047. #endif /* CONFIG_STATUS_LED */
  1048. }
  1049. #endif /* CONFIG_SYS_PB_IDE_MOTOR */
  1050. WATCHDOG_RESET();
  1051. /* de-assert RESET signal */
  1052. ide_set_reset(0);
  1053. /* wait 250 ms */
  1054. for (i = 0; i < 250; ++i)
  1055. udelay(1000);
  1056. }
  1057. #endif /* CONFIG_IDE_RESET */
  1058. /* ------------------------------------------------------------------------- */
  1059. #if defined(CONFIG_IDE_LED) && \
  1060. !defined(CONFIG_CPC45) && \
  1061. !defined(CONFIG_KUP4K) && \
  1062. !defined(CONFIG_KUP4X)
  1063. static uchar led_buffer; /* Buffer for current LED status */
  1064. static void ide_led(uchar led, uchar status)
  1065. {
  1066. uchar *led_port = LED_PORT;
  1067. if (status) /* switch LED on */
  1068. led_buffer |= led;
  1069. else /* switch LED off */
  1070. led_buffer &= ~led;
  1071. *led_port = led_buffer;
  1072. }
  1073. #endif /* CONFIG_IDE_LED */
  1074. #if defined(CONFIG_OF_IDE_FIXUP)
  1075. int ide_device_present(int dev)
  1076. {
  1077. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  1078. return 0;
  1079. return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
  1080. }
  1081. #endif
  1082. /* ------------------------------------------------------------------------- */
  1083. #ifdef CONFIG_ATAPI
  1084. /****************************************************************************
  1085. * ATAPI Support
  1086. */
  1087. #if defined(CONFIG_IDE_SWAP_IO)
  1088. /* since ATAPI may use commands with not 4 bytes alligned length
  1089. * we have our own transfer functions, 2 bytes alligned */
  1090. static void output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1091. {
  1092. #if defined(CONFIG_CPC45)
  1093. uchar *dbuf;
  1094. volatile uchar *pbuf_even;
  1095. volatile uchar *pbuf_odd;
  1096. pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
  1097. pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
  1098. while (shorts--) {
  1099. EIEIO;
  1100. *pbuf_even = *dbuf++;
  1101. EIEIO;
  1102. *pbuf_odd = *dbuf++;
  1103. }
  1104. #else
  1105. ushort *dbuf;
  1106. volatile ushort *pbuf;
  1107. pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
  1108. dbuf = (ushort *) sect_buf;
  1109. debug("in output data shorts base for read is %lx\n",
  1110. (unsigned long) pbuf);
  1111. while (shorts--) {
  1112. EIEIO;
  1113. *pbuf = *dbuf++;
  1114. }
  1115. #endif
  1116. }
  1117. static void input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1118. {
  1119. #if defined(CONFIG_CPC45)
  1120. uchar *dbuf;
  1121. volatile uchar *pbuf_even;
  1122. volatile uchar *pbuf_odd;
  1123. pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
  1124. pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
  1125. while (shorts--) {
  1126. EIEIO;
  1127. *dbuf++ = *pbuf_even;
  1128. EIEIO;
  1129. *dbuf++ = *pbuf_odd;
  1130. }
  1131. #else
  1132. ushort *dbuf;
  1133. volatile ushort *pbuf;
  1134. pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
  1135. dbuf = (ushort *) sect_buf;
  1136. debug("in input data shorts base for read is %lx\n",
  1137. (unsigned long) pbuf);
  1138. while (shorts--) {
  1139. EIEIO;
  1140. *dbuf++ = *pbuf;
  1141. }
  1142. #endif
  1143. }
  1144. #else /* ! CONFIG_IDE_SWAP_IO */
  1145. static void output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1146. {
  1147. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  1148. }
  1149. static void input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1150. {
  1151. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  1152. }
  1153. #endif /* CONFIG_IDE_SWAP_IO */
  1154. /*
  1155. * Wait until (Status & mask) == res, or timeout (in ms)
  1156. * Return last status
  1157. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1158. * and then they set their DRQ Bit
  1159. */
  1160. static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
  1161. {
  1162. ulong delay = 10 * t; /* poll every 100 us */
  1163. uchar c;
  1164. /* prevents to read the status before valid */
  1165. c = ide_inb(dev, ATA_DEV_CTL);
  1166. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1167. /* break if error occurs (doesn't make sense to wait more) */
  1168. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
  1169. break;
  1170. udelay(100);
  1171. if (delay-- == 0)
  1172. break;
  1173. }
  1174. return (c);
  1175. }
  1176. /*
  1177. * issue an atapi command
  1178. */
  1179. unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
  1180. unsigned char *buffer, int buflen)
  1181. {
  1182. unsigned char c, err, mask, res;
  1183. int n;
  1184. ide_led(DEVICE_LED(device), 1); /* LED on */
  1185. /* Select device
  1186. */
  1187. mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
  1188. res = 0;
  1189. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1190. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  1191. if ((c & mask) != res) {
  1192. printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
  1193. c);
  1194. err = 0xFF;
  1195. goto AI_OUT;
  1196. }
  1197. /* write taskfile */
  1198. ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1199. ide_outb(device, ATA_SECT_CNT, 0);
  1200. ide_outb(device, ATA_SECT_NUM, 0);
  1201. ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
  1202. ide_outb(device, ATA_CYL_HIGH,
  1203. (unsigned char) ((buflen >> 8) & 0xFF));
  1204. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1205. ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1206. udelay(50);
  1207. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  1208. res = ATA_STAT_DRQ;
  1209. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  1210. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1211. printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
  1212. device, c);
  1213. err = 0xFF;
  1214. goto AI_OUT;
  1215. }
  1216. /* write command block */
  1217. output_data_shorts(device, (unsigned short *) ccb, ccblen / 2);
  1218. /* ATAPI Command written wait for completition */
  1219. udelay(5000); /* device must set bsy */
  1220. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  1221. /*
  1222. * if no data wait for DRQ = 0 BSY = 0
  1223. * if data wait for DRQ = 1 BSY = 0
  1224. */
  1225. res = 0;
  1226. if (buflen)
  1227. res = ATA_STAT_DRQ;
  1228. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  1229. if ((c & mask) != res) {
  1230. if (c & ATA_STAT_ERR) {
  1231. err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
  1232. debug("atapi_issue 1 returned sense key %X status %02X\n",
  1233. err, c);
  1234. } else {
  1235. printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
  1236. ccb[0], c);
  1237. err = 0xFF;
  1238. }
  1239. goto AI_OUT;
  1240. }
  1241. n = ide_inb(device, ATA_CYL_HIGH);
  1242. n <<= 8;
  1243. n += ide_inb(device, ATA_CYL_LOW);
  1244. if (n > buflen) {
  1245. printf("ERROR, transfer bytes %d requested only %d\n", n,
  1246. buflen);
  1247. err = 0xff;
  1248. goto AI_OUT;
  1249. }
  1250. if ((n == 0) && (buflen < 0)) {
  1251. printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
  1252. err = 0xff;
  1253. goto AI_OUT;
  1254. }
  1255. if (n != buflen) {
  1256. debug("WARNING, transfer bytes %d not equal with requested %d\n",
  1257. n, buflen);
  1258. }
  1259. if (n != 0) { /* data transfer */
  1260. debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
  1261. /* we transfer shorts */
  1262. n >>= 1;
  1263. /* ok now decide if it is an in or output */
  1264. if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
  1265. debug("Write to device\n");
  1266. output_data_shorts(device, (unsigned short *) buffer,
  1267. n);
  1268. } else {
  1269. debug("Read from device @ %p shorts %d\n", buffer, n);
  1270. input_data_shorts(device, (unsigned short *) buffer,
  1271. n);
  1272. }
  1273. }
  1274. udelay(5000); /* seems that some CD ROMs need this... */
  1275. mask = ATA_STAT_BUSY | ATA_STAT_ERR;
  1276. res = 0;
  1277. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  1278. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1279. err = (ide_inb(device, ATA_ERROR_REG) >> 4);
  1280. debug("atapi_issue 2 returned sense key %X status %X\n", err,
  1281. c);
  1282. } else {
  1283. err = 0;
  1284. }
  1285. AI_OUT:
  1286. ide_led(DEVICE_LED(device), 0); /* LED off */
  1287. return (err);
  1288. }
  1289. /*
  1290. * sending the command to atapi_issue. If an status other than good
  1291. * returns, an request_sense will be issued
  1292. */
  1293. #define ATAPI_DRIVE_NOT_READY 100
  1294. #define ATAPI_UNIT_ATTN 10
  1295. unsigned char atapi_issue_autoreq(int device,
  1296. unsigned char *ccb,
  1297. int ccblen,
  1298. unsigned char *buffer, int buflen)
  1299. {
  1300. unsigned char sense_data[18], sense_ccb[12];
  1301. unsigned char res, key, asc, ascq;
  1302. int notready, unitattn;
  1303. unitattn = ATAPI_UNIT_ATTN;
  1304. notready = ATAPI_DRIVE_NOT_READY;
  1305. retry:
  1306. res = atapi_issue(device, ccb, ccblen, buffer, buflen);
  1307. if (res == 0)
  1308. return 0; /* Ok */
  1309. if (res == 0xFF)
  1310. return 0xFF; /* error */
  1311. debug("(auto_req)atapi_issue returned sense key %X\n", res);
  1312. memset(sense_ccb, 0, sizeof(sense_ccb));
  1313. memset(sense_data, 0, sizeof(sense_data));
  1314. sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
  1315. sense_ccb[4] = 18; /* allocation Length */
  1316. res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
  1317. key = (sense_data[2] & 0xF);
  1318. asc = (sense_data[12]);
  1319. ascq = (sense_data[13]);
  1320. debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
  1321. debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1322. sense_data[0], key, asc, ascq);
  1323. if ((key == 0))
  1324. return 0; /* ok device ready */
  1325. if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
  1326. if (unitattn-- > 0) {
  1327. udelay(200 * 1000);
  1328. goto retry;
  1329. }
  1330. printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
  1331. goto error;
  1332. }
  1333. if ((asc == 0x4) && (ascq == 0x1)) {
  1334. /* not ready, but will be ready soon */
  1335. if (notready-- > 0) {
  1336. udelay(200 * 1000);
  1337. goto retry;
  1338. }
  1339. printf("Drive not ready, tried %d times\n",
  1340. ATAPI_DRIVE_NOT_READY);
  1341. goto error;
  1342. }
  1343. if (asc == 0x3a) {
  1344. debug("Media not present\n");
  1345. goto error;
  1346. }
  1347. printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
  1348. ascq);
  1349. error:
  1350. debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
  1351. return (0xFF);
  1352. }
  1353. static void atapi_inquiry(block_dev_desc_t *dev_desc)
  1354. {
  1355. unsigned char ccb[12]; /* Command descriptor block */
  1356. unsigned char iobuf[64]; /* temp buf */
  1357. unsigned char c;
  1358. int device;
  1359. device = dev_desc->dev;
  1360. dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
  1361. dev_desc->block_read = atapi_read;
  1362. memset(ccb, 0, sizeof(ccb));
  1363. memset(iobuf, 0, sizeof(iobuf));
  1364. ccb[0] = ATAPI_CMD_INQUIRY;
  1365. ccb[4] = 40; /* allocation Legnth */
  1366. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 40);
  1367. debug("ATAPI_CMD_INQUIRY returned %x\n", c);
  1368. if (c != 0)
  1369. return;
  1370. /* copy device ident strings */
  1371. ident_cpy((unsigned char *) dev_desc->vendor, &iobuf[8], 8);
  1372. ident_cpy((unsigned char *) dev_desc->product, &iobuf[16], 16);
  1373. ident_cpy((unsigned char *) dev_desc->revision, &iobuf[32], 5);
  1374. dev_desc->lun = 0;
  1375. dev_desc->lba = 0;
  1376. dev_desc->blksz = 0;
  1377. dev_desc->type = iobuf[0] & 0x1f;
  1378. if ((iobuf[1] & 0x80) == 0x80)
  1379. dev_desc->removable = 1;
  1380. else
  1381. dev_desc->removable = 0;
  1382. memset(ccb, 0, sizeof(ccb));
  1383. memset(iobuf, 0, sizeof(iobuf));
  1384. ccb[0] = ATAPI_CMD_START_STOP;
  1385. ccb[4] = 0x03; /* start */
  1386. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
  1387. debug("ATAPI_CMD_START_STOP returned %x\n", c);
  1388. if (c != 0)
  1389. return;
  1390. memset(ccb, 0, sizeof(ccb));
  1391. memset(iobuf, 0, sizeof(iobuf));
  1392. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
  1393. debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
  1394. if (c != 0)
  1395. return;
  1396. memset(ccb, 0, sizeof(ccb));
  1397. memset(iobuf, 0, sizeof(iobuf));
  1398. ccb[0] = ATAPI_CMD_READ_CAP;
  1399. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 8);
  1400. debug("ATAPI_CMD_READ_CAP returned %x\n", c);
  1401. if (c != 0)
  1402. return;
  1403. debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1404. iobuf[0], iobuf[1], iobuf[2], iobuf[3],
  1405. iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
  1406. dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
  1407. ((unsigned long) iobuf[1] << 16) +
  1408. ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
  1409. dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
  1410. ((unsigned long) iobuf[5] << 16) +
  1411. ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
  1412. #ifdef CONFIG_LBA48
  1413. /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1414. dev_desc->lba48 = 0;
  1415. #endif
  1416. return;
  1417. }
  1418. /*
  1419. * atapi_read:
  1420. * we transfer only one block per command, since the multiple DRQ per
  1421. * command is not yet implemented
  1422. */
  1423. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1424. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1425. #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
  1426. ulong atapi_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1427. {
  1428. ulong n = 0;
  1429. unsigned char ccb[12]; /* Command descriptor block */
  1430. ulong cnt;
  1431. debug("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1432. device, blknr, blkcnt, (ulong) buffer);
  1433. do {
  1434. if (blkcnt > ATAPI_READ_MAX_BLOCK)
  1435. cnt = ATAPI_READ_MAX_BLOCK;
  1436. else
  1437. cnt = blkcnt;
  1438. ccb[0] = ATAPI_CMD_READ_12;
  1439. ccb[1] = 0; /* reserved */
  1440. ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
  1441. ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
  1442. ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
  1443. ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
  1444. ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
  1445. ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
  1446. ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
  1447. ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
  1448. ccb[10] = 0; /* reserved */
  1449. ccb[11] = 0; /* reserved */
  1450. if (atapi_issue_autoreq(device, ccb, 12,
  1451. (unsigned char *) buffer,
  1452. cnt * ATAPI_READ_BLOCK_SIZE)
  1453. == 0xFF) {
  1454. return (n);
  1455. }
  1456. n += cnt;
  1457. blkcnt -= cnt;
  1458. blknr += cnt;
  1459. buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
  1460. } while (blkcnt > 0);
  1461. return (n);
  1462. }
  1463. /* ------------------------------------------------------------------------- */
  1464. #endif /* CONFIG_ATAPI */
  1465. U_BOOT_CMD(ide, 5, 1, do_ide,
  1466. "IDE sub-system",
  1467. "reset - reset IDE controller\n"
  1468. "ide info - show available IDE devices\n"
  1469. "ide device [dev] - show or set current device\n"
  1470. "ide part [dev] - print partition table of one or all IDE devices\n"
  1471. "ide read addr blk# cnt\n"
  1472. "ide write addr blk# cnt - read/write `cnt'"
  1473. " blocks starting at block `blk#'\n"
  1474. " to/from memory address `addr'");
  1475. U_BOOT_CMD(diskboot, 3, 1, do_diskboot,
  1476. "boot from IDE device", "loadAddr dev:part");