board.c 6.6 KB

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  1. /*
  2. *
  3. * Common functions for OMAP4 based boards
  4. *
  5. * (C) Copyright 2010
  6. * Texas Instruments, <www.ti.com>
  7. *
  8. * Author :
  9. * Aneesh V <aneesh@ti.com>
  10. * Steve Sakoman <steve@sakoman.com>
  11. *
  12. * See file CREDITS for list of people who contributed to this
  13. * project.
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License as
  17. * published by the Free Software Foundation; either version 2 of
  18. * the License, or (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28. * MA 02111-1307 USA
  29. */
  30. #include <common.h>
  31. #include <asm/armv7.h>
  32. #include <asm/arch/cpu.h>
  33. #include <asm/arch/sys_proto.h>
  34. #include <asm/sizes.h>
  35. #include <asm/arch/emif.h>
  36. #include "omap4_mux_data.h"
  37. DECLARE_GLOBAL_DATA_PTR;
  38. u32 *const omap4_revision = (u32 *)OMAP4_SRAM_SCRATCH_OMAP4_REV;
  39. #ifdef CONFIG_SPL_BUILD
  40. /*
  41. * We use static variables because global data is not ready yet.
  42. * Initialized data is available in SPL right from the beginning.
  43. * We would not typically need to save these parameters in regular
  44. * U-Boot. This is needed only in SPL at the moment.
  45. */
  46. u32 omap4_boot_device = BOOT_DEVICE_MMC1;
  47. u32 omap4_boot_mode = MMCSD_MODE_FAT;
  48. u32 omap_boot_device(void)
  49. {
  50. return omap4_boot_device;
  51. }
  52. u32 omap_boot_mode(void)
  53. {
  54. return omap4_boot_mode;
  55. }
  56. #endif
  57. void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
  58. {
  59. int i;
  60. struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
  61. for (i = 0; i < size; i++, pad++)
  62. writew(pad->val, base + pad->offset);
  63. }
  64. static void set_muxconf_regs_essential(void)
  65. {
  66. do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential,
  67. sizeof(core_padconf_array_essential) /
  68. sizeof(struct pad_conf_entry));
  69. do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential,
  70. sizeof(wkup_padconf_array_essential) /
  71. sizeof(struct pad_conf_entry));
  72. }
  73. static void set_mux_conf_regs(void)
  74. {
  75. switch (omap4_hw_init_context()) {
  76. case OMAP_INIT_CONTEXT_SPL:
  77. set_muxconf_regs_essential();
  78. break;
  79. case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
  80. set_muxconf_regs_non_essential();
  81. break;
  82. case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
  83. case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
  84. set_muxconf_regs_essential();
  85. set_muxconf_regs_non_essential();
  86. break;
  87. }
  88. }
  89. static u32 cortex_a9_rev(void)
  90. {
  91. unsigned int rev;
  92. /* Read Main ID Register (MIDR) */
  93. asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
  94. return rev;
  95. }
  96. static void init_omap4_revision(void)
  97. {
  98. /*
  99. * For some of the ES2/ES1 boards ID_CODE is not reliable:
  100. * Also, ES1 and ES2 have different ARM revisions
  101. * So use ARM revision for identification
  102. */
  103. unsigned int arm_rev = cortex_a9_rev();
  104. switch (arm_rev) {
  105. case MIDR_CORTEX_A9_R0P1:
  106. *omap4_revision = OMAP4430_ES1_0;
  107. break;
  108. case MIDR_CORTEX_A9_R1P2:
  109. switch (readl(CONTROL_ID_CODE)) {
  110. case OMAP4_CONTROL_ID_CODE_ES2_0:
  111. *omap4_revision = OMAP4430_ES2_0;
  112. break;
  113. case OMAP4_CONTROL_ID_CODE_ES2_1:
  114. *omap4_revision = OMAP4430_ES2_1;
  115. break;
  116. case OMAP4_CONTROL_ID_CODE_ES2_2:
  117. *omap4_revision = OMAP4430_ES2_2;
  118. break;
  119. default:
  120. *omap4_revision = OMAP4430_ES2_0;
  121. break;
  122. }
  123. break;
  124. case MIDR_CORTEX_A9_R1P3:
  125. *omap4_revision = OMAP4430_ES2_3;
  126. break;
  127. default:
  128. *omap4_revision = OMAP4430_SILICON_ID_INVALID;
  129. break;
  130. }
  131. }
  132. void omap_rev_string(char *omap4_rev_string)
  133. {
  134. u32 omap4_rev = omap_revision();
  135. u32 omap4_variant = (omap4_rev & 0xFFFF0000) >> 16;
  136. u32 major_rev = (omap4_rev & 0x00000F00) >> 8;
  137. u32 minor_rev = (omap4_rev & 0x000000F0) >> 4;
  138. sprintf(omap4_rev_string, "OMAP%x ES%x.%x", omap4_variant, major_rev,
  139. minor_rev);
  140. }
  141. /*
  142. * Routine: s_init
  143. * Description: Does early system init of watchdog, muxing, andclocks
  144. * Watchdog disable is done always. For the rest what gets done
  145. * depends on the boot mode in which this function is executed
  146. * 1. s_init of SPL running from SRAM
  147. * 2. s_init of U-Boot running from FLASH
  148. * 3. s_init of U-Boot loaded to SDRAM by SPL
  149. * 4. s_init of U-Boot loaded to SDRAM by ROM code using the
  150. * Configuration Header feature
  151. * Please have a look at the respective functions to see what gets
  152. * done in each of these cases
  153. * This function is called with SRAM stack.
  154. */
  155. void s_init(void)
  156. {
  157. init_omap4_revision();
  158. watchdog_init();
  159. set_mux_conf_regs();
  160. #ifdef CONFIG_SPL_BUILD
  161. preloader_console_init();
  162. #endif
  163. prcm_init();
  164. #ifdef CONFIG_SPL_BUILD
  165. /* For regular u-boot sdram_init() is called from dram_init() */
  166. sdram_init();
  167. #endif
  168. }
  169. /*
  170. * Routine: wait_for_command_complete
  171. * Description: Wait for posting to finish on watchdog
  172. */
  173. void wait_for_command_complete(struct watchdog *wd_base)
  174. {
  175. int pending = 1;
  176. do {
  177. pending = readl(&wd_base->wwps);
  178. } while (pending);
  179. }
  180. /*
  181. * Routine: watchdog_init
  182. * Description: Shut down watch dogs
  183. */
  184. void watchdog_init(void)
  185. {
  186. struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
  187. writel(WD_UNLOCK1, &wd2_base->wspr);
  188. wait_for_command_complete(wd2_base);
  189. writel(WD_UNLOCK2, &wd2_base->wspr);
  190. }
  191. /*
  192. * This function finds the SDRAM size available in the system
  193. * based on DMM section configurations
  194. * This is needed because the size of memory installed may be
  195. * different on different versions of the board
  196. */
  197. u32 omap4_sdram_size(void)
  198. {
  199. u32 section, i, total_size = 0, size, addr;
  200. for (i = 0; i < 4; i++) {
  201. section = __raw_readl(OMAP44XX_DMM_LISA_MAP_BASE + i*4);
  202. addr = section & OMAP44XX_SYS_ADDR_MASK;
  203. /* See if the address is valid */
  204. if ((addr >= OMAP44XX_DRAM_ADDR_SPACE_START) &&
  205. (addr < OMAP44XX_DRAM_ADDR_SPACE_END)) {
  206. size = ((section & OMAP44XX_SYS_SIZE_MASK) >>
  207. OMAP44XX_SYS_SIZE_SHIFT);
  208. size = 1 << size;
  209. size *= SZ_16M;
  210. total_size += size;
  211. }
  212. }
  213. return total_size;
  214. }
  215. /*
  216. * Routine: dram_init
  217. * Description: sets uboots idea of sdram size
  218. */
  219. int dram_init(void)
  220. {
  221. sdram_init();
  222. gd->ram_size = omap4_sdram_size();
  223. return 0;
  224. }
  225. /*
  226. * Print board information
  227. */
  228. int checkboard(void)
  229. {
  230. puts(sysinfo.board_string);
  231. return 0;
  232. }
  233. /*
  234. * This function is called by start_armboot. You can reliably use static
  235. * data. Any boot-time function that require static data should be
  236. * called from here
  237. */
  238. int arch_cpu_init(void)
  239. {
  240. return 0;
  241. }
  242. #ifndef CONFIG_SYS_L2CACHE_OFF
  243. void v7_outer_cache_enable(void)
  244. {
  245. set_pl310_ctrl_reg(1);
  246. }
  247. void v7_outer_cache_disable(void)
  248. {
  249. set_pl310_ctrl_reg(0);
  250. }
  251. #endif