miiphyutil.c 4.3 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * This provides a bit-banged interface to the ethernet MII management
  25. * channel.
  26. */
  27. #include <common.h>
  28. #include <miiphy.h>
  29. #if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
  30. /*****************************************************************************
  31. *
  32. * Read the OUI, manufacture's model number, and revision number.
  33. *
  34. * OUI: 22 bits (unsigned int)
  35. * Model: 6 bits (unsigned char)
  36. * Revision: 4 bits (unsigned char)
  37. *
  38. * Returns:
  39. * 0 on success
  40. */
  41. int miiphy_info (unsigned char addr,
  42. unsigned int *oui,
  43. unsigned char *model, unsigned char *rev)
  44. {
  45. unsigned int reg = 0;
  46. unsigned short tmp;
  47. if (miiphy_read (addr, PHY_PHYIDR2, &tmp) != 0) {
  48. #ifdef DEBUG
  49. printf ("PHY ID register 2 read failed\n");
  50. #endif
  51. return (-1);
  52. }
  53. reg = tmp;
  54. #ifdef DEBUG
  55. printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
  56. #endif
  57. if (reg == 0xFFFF) {
  58. /* No physical device present at this address */
  59. return (-1);
  60. }
  61. if (miiphy_read (addr, PHY_PHYIDR1, &tmp) != 0) {
  62. #ifdef DEBUG
  63. printf ("PHY ID register 1 read failed\n");
  64. #endif
  65. return (-1);
  66. }
  67. reg |= tmp << 16;
  68. #ifdef DEBUG
  69. printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
  70. #endif
  71. *oui = ( reg >> 10);
  72. *model = (unsigned char) ((reg >> 4) & 0x0000003F);
  73. *rev = (unsigned char) ( reg & 0x0000000F);
  74. return (0);
  75. }
  76. /*****************************************************************************
  77. *
  78. * Reset the PHY.
  79. * Returns:
  80. * 0 on success
  81. */
  82. int miiphy_reset (unsigned char addr)
  83. {
  84. unsigned short reg;
  85. int loop_cnt;
  86. if (miiphy_write (addr, PHY_BMCR, 0x8000) != 0) {
  87. #ifdef DEBUG
  88. printf ("PHY reset failed\n");
  89. #endif
  90. return (-1);
  91. }
  92. /*
  93. * Poll the control register for the reset bit to go to 0 (it is
  94. * auto-clearing). This should happen within 0.5 seconds per the
  95. * IEEE spec.
  96. */
  97. loop_cnt = 0;
  98. reg = 0x8000;
  99. while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
  100. if (miiphy_read (addr, PHY_BMCR, &reg) != 0) {
  101. # ifdef DEBUG
  102. printf ("PHY status read failed\n");
  103. # endif
  104. return (-1);
  105. }
  106. }
  107. if ((reg & 0x8000) == 0) {
  108. return (0);
  109. } else {
  110. printf ("PHY reset timed out\n");
  111. return (-1);
  112. }
  113. return (0);
  114. }
  115. /*****************************************************************************
  116. *
  117. * Determine the ethernet speed (10/100).
  118. */
  119. int miiphy_speed (unsigned char addr)
  120. {
  121. unsigned short reg;
  122. if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
  123. printf ("PHY speed1 read failed, assuming 10bT\n");
  124. return (_10BASET);
  125. }
  126. if ((reg & PHY_ANLPAR_100) != 0) {
  127. return (_100BASET);
  128. } else {
  129. return (_10BASET);
  130. }
  131. }
  132. /*****************************************************************************
  133. *
  134. * Determine full/half duplex.
  135. */
  136. int miiphy_duplex (unsigned char addr)
  137. {
  138. unsigned short reg;
  139. if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
  140. printf ("PHY duplex read failed, assuming half duplex\n");
  141. return (HALF);
  142. }
  143. if ((reg & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) != 0) {
  144. return (FULL);
  145. } else {
  146. return (HALF);
  147. }
  148. }
  149. #ifdef CFG_FAULT_ECHO_LINK_DOWN
  150. /*****************************************************************************
  151. *
  152. * Determine link status
  153. */
  154. int miiphy_link (unsigned char addr)
  155. {
  156. unsigned short reg;
  157. if (miiphy_read (addr, PHY_BMSR, &reg)) {
  158. printf ("PHY_BMSR read failed, assuming no link\n");
  159. return (0);
  160. }
  161. /* Determine if a link is active */
  162. if ((reg & PHY_BMSR_LS) != 0) {
  163. return (1);
  164. } else {
  165. return (0);
  166. }
  167. }
  168. #endif
  169. #endif /* CONFIG_MII || (CONFIG_COMMANDS & CFG_CMD_MII) */