mmc.h 10 KB

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  1. /*
  2. * Copyright 2008,2010 Freescale Semiconductor, Inc
  3. * Andy Fleming
  4. *
  5. * Based (loosely) on the Linux code
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #ifndef _MMC_H_
  26. #define _MMC_H_
  27. #include <linux/list.h>
  28. #include <linux/compiler.h>
  29. #define SD_VERSION_SD 0x20000
  30. #define SD_VERSION_3 (SD_VERSION_SD | 0x300)
  31. #define SD_VERSION_2 (SD_VERSION_SD | 0x200)
  32. #define SD_VERSION_1_0 (SD_VERSION_SD | 0x100)
  33. #define SD_VERSION_1_10 (SD_VERSION_SD | 0x10a)
  34. #define MMC_VERSION_MMC 0x10000
  35. #define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC)
  36. #define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x102)
  37. #define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x104)
  38. #define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x202)
  39. #define MMC_VERSION_3 (MMC_VERSION_MMC | 0x300)
  40. #define MMC_VERSION_4 (MMC_VERSION_MMC | 0x400)
  41. #define MMC_VERSION_4_1 (MMC_VERSION_MMC | 0x401)
  42. #define MMC_VERSION_4_2 (MMC_VERSION_MMC | 0x402)
  43. #define MMC_VERSION_4_3 (MMC_VERSION_MMC | 0x403)
  44. #define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429)
  45. #define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405)
  46. #define MMC_MODE_HS 0x001
  47. #define MMC_MODE_HS_52MHz 0x010
  48. #define MMC_MODE_4BIT 0x100
  49. #define MMC_MODE_8BIT 0x200
  50. #define MMC_MODE_SPI 0x400
  51. #define MMC_MODE_HC 0x800
  52. #define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT)
  53. #define MMC_MODE_WIDTH_BITS_SHIFT 8
  54. #define SD_DATA_4BIT 0x00040000
  55. #define IS_SD(x) (x->version & SD_VERSION_SD)
  56. #define MMC_DATA_READ 1
  57. #define MMC_DATA_WRITE 2
  58. #define NO_CARD_ERR -16 /* No SD/MMC card inserted */
  59. #define UNUSABLE_ERR -17 /* Unusable Card */
  60. #define COMM_ERR -18 /* Communications Error */
  61. #define TIMEOUT -19
  62. #define IN_PROGRESS -20 /* operation is in progress */
  63. #define MMC_CMD_GO_IDLE_STATE 0
  64. #define MMC_CMD_SEND_OP_COND 1
  65. #define MMC_CMD_ALL_SEND_CID 2
  66. #define MMC_CMD_SET_RELATIVE_ADDR 3
  67. #define MMC_CMD_SET_DSR 4
  68. #define MMC_CMD_SWITCH 6
  69. #define MMC_CMD_SELECT_CARD 7
  70. #define MMC_CMD_SEND_EXT_CSD 8
  71. #define MMC_CMD_SEND_CSD 9
  72. #define MMC_CMD_SEND_CID 10
  73. #define MMC_CMD_STOP_TRANSMISSION 12
  74. #define MMC_CMD_SEND_STATUS 13
  75. #define MMC_CMD_SET_BLOCKLEN 16
  76. #define MMC_CMD_READ_SINGLE_BLOCK 17
  77. #define MMC_CMD_READ_MULTIPLE_BLOCK 18
  78. #define MMC_CMD_WRITE_SINGLE_BLOCK 24
  79. #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
  80. #define MMC_CMD_ERASE_GROUP_START 35
  81. #define MMC_CMD_ERASE_GROUP_END 36
  82. #define MMC_CMD_ERASE 38
  83. #define MMC_CMD_APP_CMD 55
  84. #define MMC_CMD_SPI_READ_OCR 58
  85. #define MMC_CMD_SPI_CRC_ON_OFF 59
  86. #define SD_CMD_SEND_RELATIVE_ADDR 3
  87. #define SD_CMD_SWITCH_FUNC 6
  88. #define SD_CMD_SEND_IF_COND 8
  89. #define SD_CMD_APP_SET_BUS_WIDTH 6
  90. #define SD_CMD_ERASE_WR_BLK_START 32
  91. #define SD_CMD_ERASE_WR_BLK_END 33
  92. #define SD_CMD_APP_SEND_OP_COND 41
  93. #define SD_CMD_APP_SEND_SCR 51
  94. /* SCR definitions in different words */
  95. #define SD_HIGHSPEED_BUSY 0x00020000
  96. #define SD_HIGHSPEED_SUPPORTED 0x00020000
  97. #define MMC_HS_TIMING 0x00000100
  98. #define MMC_HS_52MHZ 0x2
  99. #define OCR_BUSY 0x80000000
  100. #define OCR_HCS 0x40000000
  101. #define OCR_VOLTAGE_MASK 0x007FFF80
  102. #define OCR_ACCESS_MODE 0x60000000
  103. #define SECURE_ERASE 0x80000000
  104. #define MMC_STATUS_MASK (~0x0206BF7F)
  105. #define MMC_STATUS_RDY_FOR_DATA (1 << 8)
  106. #define MMC_STATUS_CURR_STATE (0xf << 9)
  107. #define MMC_STATUS_ERROR (1 << 19)
  108. #define MMC_STATE_PRG (7 << 9)
  109. #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
  110. #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
  111. #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
  112. #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
  113. #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
  114. #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
  115. #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
  116. #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
  117. #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
  118. #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
  119. #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
  120. #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
  121. #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
  122. #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
  123. #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
  124. #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
  125. #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
  126. #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
  127. #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
  128. addressed by index which are
  129. 1 in value field */
  130. #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
  131. addressed by index, which are
  132. 1 in value field */
  133. #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
  134. #define SD_SWITCH_CHECK 0
  135. #define SD_SWITCH_SWITCH 1
  136. /*
  137. * EXT_CSD fields
  138. */
  139. #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
  140. #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
  141. #define EXT_CSD_RPMB_MULT 168 /* RO */
  142. #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
  143. #define EXT_CSD_PART_CONF 179 /* R/W */
  144. #define EXT_CSD_BUS_WIDTH 183 /* R/W */
  145. #define EXT_CSD_HS_TIMING 185 /* R/W */
  146. #define EXT_CSD_REV 192 /* RO */
  147. #define EXT_CSD_CARD_TYPE 196 /* RO */
  148. #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
  149. #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
  150. #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
  151. #define EXT_CSD_BOOT_MULT 226 /* RO */
  152. /*
  153. * EXT_CSD field definitions
  154. */
  155. #define EXT_CSD_CMD_SET_NORMAL (1 << 0)
  156. #define EXT_CSD_CMD_SET_SECURE (1 << 1)
  157. #define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
  158. #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
  159. #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
  160. #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
  161. #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
  162. #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
  163. #define R1_ILLEGAL_COMMAND (1 << 22)
  164. #define R1_APP_CMD (1 << 5)
  165. #define MMC_RSP_PRESENT (1 << 0)
  166. #define MMC_RSP_136 (1 << 1) /* 136 bit response */
  167. #define MMC_RSP_CRC (1 << 2) /* expect valid crc */
  168. #define MMC_RSP_BUSY (1 << 3) /* card may send busy */
  169. #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
  170. #define MMC_RSP_NONE (0)
  171. #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
  172. #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
  173. MMC_RSP_BUSY)
  174. #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
  175. #define MMC_RSP_R3 (MMC_RSP_PRESENT)
  176. #define MMC_RSP_R4 (MMC_RSP_PRESENT)
  177. #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
  178. #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
  179. #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
  180. #define MMCPART_NOAVAILABLE (0xff)
  181. #define PART_ACCESS_MASK (0x7)
  182. #define PART_SUPPORT (0x1)
  183. /* Maximum block size for MMC */
  184. #define MMC_MAX_BLOCK_LEN 512
  185. struct mmc_cid {
  186. unsigned long psn;
  187. unsigned short oid;
  188. unsigned char mid;
  189. unsigned char prv;
  190. unsigned char mdt;
  191. char pnm[7];
  192. };
  193. struct mmc_cmd {
  194. ushort cmdidx;
  195. uint resp_type;
  196. uint cmdarg;
  197. uint response[4];
  198. };
  199. struct mmc_data {
  200. union {
  201. char *dest;
  202. const char *src; /* src buffers don't get written to */
  203. };
  204. uint flags;
  205. uint blocks;
  206. uint blocksize;
  207. };
  208. struct mmc {
  209. struct list_head link;
  210. char name[32];
  211. void *priv;
  212. uint voltages;
  213. uint version;
  214. uint has_init;
  215. uint f_min;
  216. uint f_max;
  217. int high_capacity;
  218. uint bus_width;
  219. uint clock;
  220. uint card_caps;
  221. uint host_caps;
  222. uint ocr;
  223. uint scr[2];
  224. uint csd[4];
  225. uint cid[4];
  226. ushort rca;
  227. char part_config;
  228. char part_num;
  229. uint tran_speed;
  230. uint read_bl_len;
  231. uint write_bl_len;
  232. uint erase_grp_size;
  233. u64 capacity;
  234. u64 capacity_user;
  235. u64 capacity_boot;
  236. u64 capacity_rpmb;
  237. u64 capacity_gp[4];
  238. block_dev_desc_t block_dev;
  239. int (*send_cmd)(struct mmc *mmc,
  240. struct mmc_cmd *cmd, struct mmc_data *data);
  241. void (*set_ios)(struct mmc *mmc);
  242. int (*init)(struct mmc *mmc);
  243. int (*getcd)(struct mmc *mmc);
  244. int (*getwp)(struct mmc *mmc);
  245. uint b_max;
  246. char op_cond_pending; /* 1 if we are waiting on an op_cond command */
  247. char init_in_progress; /* 1 if we have done mmc_start_init() */
  248. char preinit; /* start init as early as possible */
  249. uint op_cond_response; /* the response byte from the last op_cond */
  250. };
  251. int mmc_register(struct mmc *mmc);
  252. int mmc_initialize(bd_t *bis);
  253. int mmc_init(struct mmc *mmc);
  254. int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
  255. void mmc_set_clock(struct mmc *mmc, uint clock);
  256. struct mmc *find_mmc_device(int dev_num);
  257. int mmc_set_dev(int dev_num);
  258. void print_mmc_devices(char separator);
  259. int get_mmc_num(void);
  260. int board_mmc_getcd(struct mmc *mmc);
  261. int mmc_switch_part(int dev_num, unsigned int part_num);
  262. int mmc_getcd(struct mmc *mmc);
  263. int mmc_getwp(struct mmc *mmc);
  264. void spl_mmc_load(void) __noreturn;
  265. /**
  266. * Start device initialization and return immediately; it does not block on
  267. * polling OCR (operation condition register) status. Then you should call
  268. * mmc_init, which would block on polling OCR status and complete the device
  269. * initializatin.
  270. *
  271. * @param mmc Pointer to a MMC device struct
  272. * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error.
  273. */
  274. int mmc_start_init(struct mmc *mmc);
  275. /**
  276. * Set preinit flag of mmc device.
  277. *
  278. * This will cause the device to be pre-inited during mmc_initialize(),
  279. * which may save boot time if the device is not accessed until later.
  280. * Some eMMC devices take 200-300ms to init, but unfortunately they
  281. * must be sent a series of commands to even get them to start preparing
  282. * for operation.
  283. *
  284. * @param mmc Pointer to a MMC device struct
  285. * @param preinit preinit flag value
  286. */
  287. void mmc_set_preinit(struct mmc *mmc, int preinit);
  288. #ifdef CONFIG_GENERIC_MMC
  289. #define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI)
  290. struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
  291. #else
  292. int mmc_legacy_init(int verbose);
  293. #endif
  294. #endif /* _MMC_H_ */