st_smi.c 14 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <flash.h>
  25. #include <linux/err.h>
  26. #include <linux/mtd/st_smi.h>
  27. #include <asm/io.h>
  28. #include <asm/arch/hardware.h>
  29. #if !defined(CONFIG_SYS_NO_FLASH)
  30. static struct smi_regs *const smicntl =
  31. (struct smi_regs * const)CONFIG_SYS_SMI_BASE;
  32. static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] =
  33. CONFIG_SYS_FLASH_ADDR_BASE;
  34. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
  35. /* data structure to maintain flash ids from different vendors */
  36. struct flash_device {
  37. char *name;
  38. u8 erase_cmd;
  39. u32 device_id;
  40. u32 pagesize;
  41. unsigned long sectorsize;
  42. unsigned long size_in_bytes;
  43. };
  44. #define FLASH_ID(n, es, id, psize, ssize, size) \
  45. { \
  46. .name = n, \
  47. .erase_cmd = es, \
  48. .device_id = id, \
  49. .pagesize = psize, \
  50. .sectorsize = ssize, \
  51. .size_in_bytes = size \
  52. }
  53. /*
  54. * List of supported flash devices.
  55. * Currently the erase_cmd field is not used in this driver.
  56. */
  57. static struct flash_device flash_devices[] = {
  58. FLASH_ID("st m25p16" , 0xd8, 0x00152020, 0x100, 0x10000, 0x200000),
  59. FLASH_ID("st m25p32" , 0xd8, 0x00162020, 0x100, 0x10000, 0x400000),
  60. FLASH_ID("st m25p64" , 0xd8, 0x00172020, 0x100, 0x10000, 0x800000),
  61. FLASH_ID("st m25p128" , 0xd8, 0x00182020, 0x100, 0x40000, 0x1000000),
  62. FLASH_ID("st m25p05" , 0xd8, 0x00102020, 0x80 , 0x8000 , 0x10000),
  63. FLASH_ID("st m25p10" , 0xd8, 0x00112020, 0x80 , 0x8000 , 0x20000),
  64. FLASH_ID("st m25p20" , 0xd8, 0x00122020, 0x100, 0x10000, 0x40000),
  65. FLASH_ID("st m25p40" , 0xd8, 0x00132020, 0x100, 0x10000, 0x80000),
  66. FLASH_ID("st m25p80" , 0xd8, 0x00142020, 0x100, 0x10000, 0x100000),
  67. FLASH_ID("st m45pe10" , 0xd8, 0x00114020, 0x100, 0x10000, 0x20000),
  68. FLASH_ID("st m45pe20" , 0xd8, 0x00124020, 0x100, 0x10000, 0x40000),
  69. FLASH_ID("st m45pe40" , 0xd8, 0x00134020, 0x100, 0x10000, 0x80000),
  70. FLASH_ID("st m45pe80" , 0xd8, 0x00144020, 0x100, 0x10000, 0x100000),
  71. FLASH_ID("sp s25fl004" , 0xd8, 0x00120201, 0x100, 0x10000, 0x80000),
  72. FLASH_ID("sp s25fl008" , 0xd8, 0x00130201, 0x100, 0x10000, 0x100000),
  73. FLASH_ID("sp s25fl016" , 0xd8, 0x00140201, 0x100, 0x10000, 0x200000),
  74. FLASH_ID("sp s25fl032" , 0xd8, 0x00150201, 0x100, 0x10000, 0x400000),
  75. FLASH_ID("sp s25fl064" , 0xd8, 0x00160201, 0x100, 0x10000, 0x800000),
  76. FLASH_ID("mac 25l512" , 0xd8, 0x001020C2, 0x010, 0x10000, 0x10000),
  77. FLASH_ID("mac 25l1005" , 0xd8, 0x001120C2, 0x010, 0x10000, 0x20000),
  78. FLASH_ID("mac 25l2005" , 0xd8, 0x001220C2, 0x010, 0x10000, 0x40000),
  79. FLASH_ID("mac 25l4005" , 0xd8, 0x001320C2, 0x010, 0x10000, 0x80000),
  80. FLASH_ID("mac 25l4005a" , 0xd8, 0x001320C2, 0x010, 0x10000, 0x80000),
  81. FLASH_ID("mac 25l8005" , 0xd8, 0x001420C2, 0x010, 0x10000, 0x100000),
  82. FLASH_ID("mac 25l1605" , 0xd8, 0x001520C2, 0x100, 0x10000, 0x200000),
  83. FLASH_ID("mac 25l1605a" , 0xd8, 0x001520C2, 0x010, 0x10000, 0x200000),
  84. FLASH_ID("mac 25l3205" , 0xd8, 0x001620C2, 0x100, 0x10000, 0x400000),
  85. FLASH_ID("mac 25l3205a" , 0xd8, 0x001620C2, 0x100, 0x10000, 0x400000),
  86. FLASH_ID("mac 25l6405" , 0xd8, 0x001720C2, 0x100, 0x10000, 0x800000),
  87. FLASH_ID("wbd w25q128" , 0xd8, 0x001840EF, 0x100, 0x10000, 0x1000000),
  88. };
  89. /*
  90. * smi_wait_xfer_finish - Wait until TFF is set in status register
  91. * @timeout: timeout in milliseconds
  92. *
  93. * Wait until TFF is set in status register
  94. */
  95. static int smi_wait_xfer_finish(int timeout)
  96. {
  97. ulong start = get_timer(0);
  98. while (get_timer(start) < timeout) {
  99. if (readl(&smicntl->smi_sr) & TFF)
  100. return 0;
  101. /* Try after 10 ms */
  102. udelay(10);
  103. };
  104. return -1;
  105. }
  106. /*
  107. * smi_read_id - Read flash id
  108. * @info: flash_info structure pointer
  109. * @banknum: bank number
  110. *
  111. * Read the flash id present at bank #banknum
  112. */
  113. static unsigned int smi_read_id(flash_info_t *info, int banknum)
  114. {
  115. unsigned int value;
  116. writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
  117. writel(READ_ID, &smicntl->smi_tr);
  118. writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3,
  119. &smicntl->smi_cr2);
  120. if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
  121. return -EIO;
  122. value = (readl(&smicntl->smi_rr) & 0x00FFFFFF);
  123. writel(readl(&smicntl->smi_sr) & ~TFF, &smicntl->smi_sr);
  124. writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
  125. return value;
  126. }
  127. /*
  128. * flash_get_size - Detect the SMI flash by reading the ID.
  129. * @base: Base address of the flash area bank #banknum
  130. * @banknum: Bank number
  131. *
  132. * Detect the SMI flash by reading the ID. Initializes the flash_info structure
  133. * with size, sector count etc.
  134. */
  135. static ulong flash_get_size(ulong base, int banknum)
  136. {
  137. flash_info_t *info = &flash_info[banknum];
  138. int value;
  139. int i;
  140. value = smi_read_id(info, banknum);
  141. if (value < 0) {
  142. printf("Flash id could not be read\n");
  143. return 0;
  144. }
  145. /* Matches chip-id to entire list of 'serial-nor flash' ids */
  146. for (i = 0; i < ARRAY_SIZE(flash_devices); i++) {
  147. if (flash_devices[i].device_id == value) {
  148. info->size = flash_devices[i].size_in_bytes;
  149. info->flash_id = value;
  150. info->start[0] = base;
  151. info->sector_count =
  152. info->size/flash_devices[i].sectorsize;
  153. return info->size;
  154. }
  155. }
  156. return 0;
  157. }
  158. /*
  159. * smi_read_sr - Read status register of SMI
  160. * @bank: bank number
  161. *
  162. * This routine will get the status register of the flash chip present at the
  163. * given bank
  164. */
  165. static int smi_read_sr(int bank)
  166. {
  167. u32 ctrlreg1, val;
  168. /* store the CTRL REG1 state */
  169. ctrlreg1 = readl(&smicntl->smi_cr1);
  170. /* Program SMI in HW Mode */
  171. writel(readl(&smicntl->smi_cr1) & ~(SW_MODE | WB_MODE),
  172. &smicntl->smi_cr1);
  173. /* Performing a RSR instruction in HW mode */
  174. writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2);
  175. if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
  176. return -1;
  177. val = readl(&smicntl->smi_sr);
  178. /* Restore the CTRL REG1 state */
  179. writel(ctrlreg1, &smicntl->smi_cr1);
  180. return val;
  181. }
  182. /*
  183. * smi_wait_till_ready - Wait till last operation is over.
  184. * @bank: bank number shifted.
  185. * @timeout: timeout in milliseconds.
  186. *
  187. * This routine checks for WIP(write in progress)bit in Status register(SMSR-b0)
  188. * The routine checks for #timeout loops, each at interval of 1 milli-second.
  189. * If successful the routine returns 0.
  190. */
  191. static int smi_wait_till_ready(int bank, int timeout)
  192. {
  193. int sr;
  194. ulong start = get_timer(0);
  195. /* One chip guarantees max 5 msec wait here after page writes,
  196. but potentially three seconds (!) after page erase. */
  197. while (get_timer(start) < timeout) {
  198. sr = smi_read_sr(bank);
  199. if ((sr >= 0) && (!(sr & WIP_BIT)))
  200. return 0;
  201. /* Try again after 10 usec */
  202. udelay(10);
  203. } while (timeout--);
  204. printf("SMI controller is still in wait, timeout=%d\n", timeout);
  205. return -EIO;
  206. }
  207. /*
  208. * smi_write_enable - Enable the flash to do write operation
  209. * @bank: bank number
  210. *
  211. * Set write enable latch with Write Enable command.
  212. * Returns negative if error occurred.
  213. */
  214. static int smi_write_enable(int bank)
  215. {
  216. u32 ctrlreg1;
  217. u32 start;
  218. int timeout = WMODE_TOUT;
  219. int sr;
  220. /* Store the CTRL REG1 state */
  221. ctrlreg1 = readl(&smicntl->smi_cr1);
  222. /* Program SMI in H/W Mode */
  223. writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
  224. /* Give the Flash, Write Enable command */
  225. writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2);
  226. if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
  227. return -1;
  228. /* Restore the CTRL REG1 state */
  229. writel(ctrlreg1, &smicntl->smi_cr1);
  230. start = get_timer(0);
  231. while (get_timer(start) < timeout) {
  232. sr = smi_read_sr(bank);
  233. if ((sr >= 0) && (sr & (1 << (bank + WM_SHIFT))))
  234. return 0;
  235. /* Try again after 10 usec */
  236. udelay(10);
  237. };
  238. return -1;
  239. }
  240. /*
  241. * smi_init - SMI initialization routine
  242. *
  243. * SMI initialization routine. Sets SMI control register1.
  244. */
  245. void smi_init(void)
  246. {
  247. /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */
  248. writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4,
  249. &smicntl->smi_cr1);
  250. }
  251. /*
  252. * smi_sector_erase - Erase flash sector
  253. * @info: flash_info structure pointer
  254. * @sector: sector number
  255. *
  256. * Set write enable latch with Write Enable command.
  257. * Returns negative if error occurred.
  258. */
  259. static int smi_sector_erase(flash_info_t *info, unsigned int sector)
  260. {
  261. int bank;
  262. unsigned int sect_add;
  263. unsigned int instruction;
  264. switch (info->start[0]) {
  265. case SMIBANK0_BASE:
  266. bank = BANK0;
  267. break;
  268. case SMIBANK1_BASE:
  269. bank = BANK1;
  270. break;
  271. case SMIBANK2_BASE:
  272. bank = BANK2;
  273. break;
  274. case SMIBANK3_BASE:
  275. bank = BANK3;
  276. break;
  277. default:
  278. return -1;
  279. }
  280. sect_add = sector * (info->size / info->sector_count);
  281. instruction = ((sect_add >> 8) & 0x0000FF00) | SECTOR_ERASE;
  282. writel(readl(&smicntl->smi_sr) & ~(ERF1 | ERF2), &smicntl->smi_sr);
  283. /* Wait until finished previous write command. */
  284. if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
  285. return -EBUSY;
  286. /* Send write enable, before erase commands. */
  287. if (smi_write_enable(bank))
  288. return -EIO;
  289. /* Put SMI in SW mode */
  290. writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
  291. /* Send Sector Erase command in SW Mode */
  292. writel(instruction, &smicntl->smi_tr);
  293. writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4,
  294. &smicntl->smi_cr2);
  295. if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
  296. return -EIO;
  297. if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
  298. return -EBUSY;
  299. /* Put SMI in HW mode */
  300. writel(readl(&smicntl->smi_cr1) & ~SW_MODE,
  301. &smicntl->smi_cr1);
  302. return 0;
  303. }
  304. /*
  305. * smi_write - Write to SMI flash
  306. * @src_addr: source buffer
  307. * @dst_addr: destination buffer
  308. * @length: length to write in bytes
  309. * @bank: bank base address
  310. *
  311. * Write to SMI flash
  312. */
  313. static int smi_write(unsigned int *src_addr, unsigned int *dst_addr,
  314. unsigned int length, ulong bank_addr)
  315. {
  316. u8 *src_addr8 = (u8 *)src_addr;
  317. u8 *dst_addr8 = (u8 *)dst_addr;
  318. int banknum;
  319. int i;
  320. switch (bank_addr) {
  321. case SMIBANK0_BASE:
  322. banknum = BANK0;
  323. break;
  324. case SMIBANK1_BASE:
  325. banknum = BANK1;
  326. break;
  327. case SMIBANK2_BASE:
  328. banknum = BANK2;
  329. break;
  330. case SMIBANK3_BASE:
  331. banknum = BANK3;
  332. break;
  333. default:
  334. return -1;
  335. }
  336. if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
  337. return -EBUSY;
  338. /* Set SMI in Hardware Mode */
  339. writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
  340. if (smi_write_enable(banknum))
  341. return -EIO;
  342. /* Perform the write command */
  343. for (i = 0; i < length; i += 4) {
  344. if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) {
  345. if (smi_wait_till_ready(banknum,
  346. CONFIG_SYS_FLASH_WRITE_TOUT))
  347. return -EBUSY;
  348. if (smi_write_enable(banknum))
  349. return -EIO;
  350. }
  351. if (length < 4) {
  352. int k;
  353. /*
  354. * Handle special case, where length < 4 (redundant env)
  355. */
  356. for (k = 0; k < length; k++)
  357. *dst_addr8++ = *src_addr8++;
  358. } else {
  359. /* Normal 32bit write */
  360. *dst_addr++ = *src_addr++;
  361. }
  362. if ((readl(&smicntl->smi_sr) & (ERF1 | ERF2)))
  363. return -EIO;
  364. }
  365. if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
  366. return -EBUSY;
  367. writel(readl(&smicntl->smi_sr) & ~(WCF), &smicntl->smi_sr);
  368. return 0;
  369. }
  370. /*
  371. * write_buff - Write to SMI flash
  372. * @info: flash info structure
  373. * @src: source buffer
  374. * @dest_addr: destination buffer
  375. * @length: length to write in words
  376. *
  377. * Write to SMI flash
  378. */
  379. int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length)
  380. {
  381. return smi_write((unsigned int *)src, (unsigned int *)dest_addr,
  382. length, info->start[0]);
  383. }
  384. /*
  385. * flash_init - SMI flash initialization
  386. *
  387. * SMI flash initialization
  388. */
  389. unsigned long flash_init(void)
  390. {
  391. unsigned long size = 0;
  392. int i, j;
  393. smi_init();
  394. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  395. flash_info[i].flash_id = FLASH_UNKNOWN;
  396. size += flash_info[i].size = flash_get_size(bank_base[i], i);
  397. }
  398. for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) {
  399. for (i = 1; i < flash_info[j].sector_count; i++)
  400. flash_info[j].start[i] =
  401. flash_info[j].start[i - 1] +
  402. flash_info->size / flash_info->sector_count;
  403. }
  404. return size;
  405. }
  406. /*
  407. * flash_print_info - Print SMI flash information
  408. *
  409. * Print SMI flash information
  410. */
  411. void flash_print_info(flash_info_t *info)
  412. {
  413. int i;
  414. if (info->flash_id == FLASH_UNKNOWN) {
  415. puts("missing or unknown FLASH type\n");
  416. return;
  417. }
  418. if (info->size >= 0x100000)
  419. printf(" Size: %ld MB in %d Sectors\n",
  420. info->size >> 20, info->sector_count);
  421. else
  422. printf(" Size: %ld KB in %d Sectors\n",
  423. info->size >> 10, info->sector_count);
  424. puts(" Sector Start Addresses:");
  425. for (i = 0; i < info->sector_count; ++i) {
  426. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  427. int size;
  428. int erased;
  429. u32 *flash;
  430. /*
  431. * Check if whole sector is erased
  432. */
  433. size = (info->size) / (info->sector_count);
  434. flash = (u32 *) info->start[i];
  435. size = size / sizeof(int);
  436. while ((size--) && (*flash++ == ~0))
  437. ;
  438. size++;
  439. if (size)
  440. erased = 0;
  441. else
  442. erased = 1;
  443. if ((i % 5) == 0)
  444. printf("\n");
  445. printf(" %08lX%s%s",
  446. info->start[i],
  447. erased ? " E" : " ", info->protect[i] ? "RO " : " ");
  448. #else
  449. if ((i % 5) == 0)
  450. printf("\n ");
  451. printf(" %08lX%s",
  452. info->start[i], info->protect[i] ? " (RO) " : " ");
  453. #endif
  454. }
  455. putc('\n');
  456. return;
  457. }
  458. /*
  459. * flash_erase - Erase SMI flash
  460. *
  461. * Erase SMI flash
  462. */
  463. int flash_erase(flash_info_t *info, int s_first, int s_last)
  464. {
  465. int rcode = 0;
  466. int prot = 0;
  467. flash_sect_t sect;
  468. if ((s_first < 0) || (s_first > s_last)) {
  469. puts("- no sectors to erase\n");
  470. return 1;
  471. }
  472. for (sect = s_first; sect <= s_last; ++sect) {
  473. if (info->protect[sect])
  474. prot++;
  475. }
  476. if (prot) {
  477. printf("- Warning: %d protected sectors will not be erased!\n",
  478. prot);
  479. } else {
  480. putc('\n');
  481. }
  482. for (sect = s_first; sect <= s_last; sect++) {
  483. if (info->protect[sect] == 0) {
  484. if (smi_sector_erase(info, sect))
  485. rcode = 1;
  486. else
  487. putc('.');
  488. }
  489. }
  490. puts(" done\n");
  491. return rcode;
  492. }
  493. #endif