docg4_spl.c 7.0 KB

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  1. /*
  2. * SPL driver for Diskonchip G4 nand flash
  3. *
  4. * Copyright (C) 2013 Mike Dunn <mikedunn@newsguy.com>
  5. *
  6. * This file is released under the terms of GPL v2 and any later version.
  7. * See the file COPYING in the root directory of the source tree for details.
  8. *
  9. *
  10. * This driver basically mimics the load functionality of a typical IPL (initial
  11. * program loader) resident in the 2k NOR-like region of the docg4 that is
  12. * mapped to the reset vector. It allows the u-boot SPL to continue loading if
  13. * the IPL loads a fixed number of flash blocks that is insufficient to contain
  14. * the entire u-boot image. In this case, a concatenated spl + u-boot image is
  15. * written at the flash offset from which the IPL loads an image, and when the
  16. * IPL jumps to the SPL, the SPL resumes loading where the IPL left off. See
  17. * the palmtreo680 for an example.
  18. *
  19. * This driver assumes that the data was written to the flash using the device's
  20. * "reliable" mode, and also assumes that each 512 byte page is stored
  21. * redundantly in the subsequent page. This storage format is likely to be used
  22. * by all boards that boot from the docg4. The format compensates for the lack
  23. * of ecc in the IPL.
  24. *
  25. * Reliable mode reduces the capacity of a block by half, and the redundant
  26. * pages reduce it by half again. As a result, the normal 256k capacity of a
  27. * block is reduced to 64k for the purposes of the IPL/SPL.
  28. */
  29. #include <asm/io.h>
  30. #include <linux/mtd/docg4.h>
  31. /* forward declarations */
  32. static inline void write_nop(void __iomem *docptr);
  33. static int poll_status(void __iomem *docptr);
  34. static void write_addr(void __iomem *docptr, uint32_t docg4_addr);
  35. static void address_sequence(unsigned int g4_page, unsigned int g4_index,
  36. void __iomem *docptr);
  37. static int docg4_load_block_reliable(uint32_t flash_offset, void *dest_addr);
  38. int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
  39. {
  40. void *load_addr = dst;
  41. uint32_t flash_offset = offs;
  42. const unsigned int block_count =
  43. (size + DOCG4_BLOCK_CAPACITY_SPL - 1)
  44. / DOCG4_BLOCK_CAPACITY_SPL;
  45. int i;
  46. for (i = 0; i < block_count; i++) {
  47. int ret = docg4_load_block_reliable(flash_offset, load_addr);
  48. if (ret)
  49. return ret;
  50. load_addr += DOCG4_BLOCK_CAPACITY_SPL;
  51. flash_offset += DOCG4_BLOCK_SIZE;
  52. }
  53. return 0;
  54. }
  55. static inline void write_nop(void __iomem *docptr)
  56. {
  57. writew(0, docptr + DOC_NOP);
  58. }
  59. static int poll_status(void __iomem *docptr)
  60. {
  61. /*
  62. * Busy-wait for the FLASHREADY bit to be set in the FLASHCONTROL
  63. * register. Operations known to take a long time (e.g., block erase)
  64. * should sleep for a while before calling this.
  65. */
  66. uint8_t flash_status;
  67. /* hardware quirk requires reading twice initially */
  68. flash_status = readb(docptr + DOC_FLASHCONTROL);
  69. do {
  70. flash_status = readb(docptr + DOC_FLASHCONTROL);
  71. } while (!(flash_status & DOC_CTRL_FLASHREADY));
  72. return 0;
  73. }
  74. static void write_addr(void __iomem *docptr, uint32_t docg4_addr)
  75. {
  76. /* write the four address bytes packed in docg4_addr to the device */
  77. writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
  78. docg4_addr >>= 8;
  79. writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
  80. docg4_addr >>= 8;
  81. writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
  82. docg4_addr >>= 8;
  83. writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
  84. }
  85. static void address_sequence(unsigned int g4_page, unsigned int g4_index,
  86. void __iomem *docptr)
  87. {
  88. writew(DOCG4_SEQ_PAGE_READ, docptr + DOC_FLASHSEQUENCE);
  89. writew(DOCG4_CMD_PAGE_READ, docptr + DOC_FLASHCOMMAND);
  90. write_nop(docptr);
  91. write_addr(docptr, ((uint32_t)g4_page << 16) | g4_index);
  92. write_nop(docptr);
  93. }
  94. static int docg4_load_block_reliable(uint32_t flash_offset, void *dest_addr)
  95. {
  96. void __iomem *docptr = (void *)CONFIG_SYS_NAND_BASE;
  97. unsigned int g4_page = flash_offset >> 11; /* 2k page */
  98. const unsigned int last_g4_page = g4_page + 0x80; /* last in block */
  99. int g4_index = 0;
  100. uint16_t flash_status;
  101. uint16_t *buf;
  102. /* flash_offset must be aligned to the start of a block */
  103. if (flash_offset & 0x3ffff)
  104. return -1;
  105. writew(DOC_SEQ_RESET, docptr + DOC_FLASHSEQUENCE);
  106. writew(DOC_CMD_RESET, docptr + DOC_FLASHCOMMAND);
  107. write_nop(docptr);
  108. write_nop(docptr);
  109. poll_status(docptr);
  110. write_nop(docptr);
  111. writew(0x45, docptr + DOC_FLASHSEQUENCE);
  112. writew(0xa3, docptr + DOC_FLASHCOMMAND);
  113. write_nop(docptr);
  114. writew(0x22, docptr + DOC_FLASHCOMMAND);
  115. write_nop(docptr);
  116. /* read 1st 4 oob bytes of first subpage of block */
  117. address_sequence(g4_page, 0x0100, docptr); /* index at oob */
  118. write_nop(docptr);
  119. flash_status = readw(docptr + DOC_FLASHCONTROL);
  120. flash_status = readw(docptr + DOC_FLASHCONTROL);
  121. if (flash_status & 0x06) /* sequence or protection errors */
  122. return -1;
  123. writew(DOCG4_CMD_READ2, docptr + DOC_FLASHCOMMAND);
  124. write_nop(docptr);
  125. write_nop(docptr);
  126. poll_status(docptr);
  127. writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0);
  128. write_nop(docptr);
  129. write_nop(docptr);
  130. write_nop(docptr);
  131. write_nop(docptr);
  132. write_nop(docptr);
  133. /*
  134. * Here we read the first four oob bytes of the first page of the block.
  135. * The IPL on the palmtreo680 requires that this contain a 32 bit magic
  136. * number, or the load aborts. We'll ignore it.
  137. */
  138. readw(docptr + 0x103c); /* hw quirk; 1st read discarded */
  139. readw(docptr + 0x103c); /* lower 16 bits of magic number */
  140. readw(docptr + DOCG4_MYSTERY_REG); /* upper 16 bits of magic number */
  141. writew(0, docptr + DOC_DATAEND);
  142. write_nop(docptr);
  143. write_nop(docptr);
  144. /* load contents of block to memory */
  145. buf = (uint16_t *)dest_addr;
  146. do {
  147. int i;
  148. address_sequence(g4_page, g4_index, docptr);
  149. writew(DOCG4_CMD_READ2,
  150. docptr + DOC_FLASHCOMMAND);
  151. write_nop(docptr);
  152. write_nop(docptr);
  153. poll_status(docptr);
  154. writew(DOC_ECCCONF0_READ_MODE |
  155. DOC_ECCCONF0_ECC_ENABLE |
  156. DOCG4_BCH_SIZE,
  157. docptr + DOC_ECCCONF0);
  158. write_nop(docptr);
  159. write_nop(docptr);
  160. write_nop(docptr);
  161. write_nop(docptr);
  162. write_nop(docptr);
  163. /* read the 512 bytes of page data, 2 bytes at a time */
  164. readw(docptr + 0x103c); /* hw quirk */
  165. for (i = 0; i < 256; i++)
  166. *buf++ = readw(docptr + 0x103c);
  167. /* read oob, but discard it */
  168. for (i = 0; i < 7; i++)
  169. readw(docptr + 0x103c);
  170. readw(docptr + DOCG4_OOB_6_7);
  171. readw(docptr + DOCG4_OOB_6_7);
  172. writew(0, docptr + DOC_DATAEND);
  173. write_nop(docptr);
  174. write_nop(docptr);
  175. if (!(g4_index & 0x100)) {
  176. /* not redundant subpage read; check for ecc error */
  177. write_nop(docptr);
  178. flash_status = readw(docptr + DOC_ECCCONF1);
  179. flash_status = readw(docptr + DOC_ECCCONF1);
  180. if (flash_status & 0x80) { /* ecc error */
  181. g4_index += 0x108; /* read redundant subpage */
  182. buf -= 256; /* back up ram ptr */
  183. continue;
  184. } else /* no ecc error */
  185. g4_index += 0x210; /* skip redundant subpage */
  186. } else /* redundant page was just read; skip ecc error check */
  187. g4_index += 0x108;
  188. if (g4_index == 0x420) { /* finished with 2k page */
  189. g4_index = 0;
  190. g4_page += 2; /* odd-numbered 2k pages skipped */
  191. }
  192. } while (g4_page != last_g4_page); /* while still on same block */
  193. return 0;
  194. }