zipitz2.c 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218
  1. /*
  2. * Copyright (C) 2009
  3. * Marek Vasut <marek.vasut@gmail.com>
  4. *
  5. * Heavily based on pxa255_idp platform
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <common.h>
  26. #include <command.h>
  27. #include <serial.h>
  28. #include <asm/arch/hardware.h>
  29. #include <asm/arch/pxa.h>
  30. #include <asm/arch/regs-mmc.h>
  31. #include <spi.h>
  32. #include <asm/io.h>
  33. DECLARE_GLOBAL_DATA_PTR;
  34. #ifdef CONFIG_CMD_SPI
  35. void lcd_start(void);
  36. #else
  37. inline void lcd_start(void) {};
  38. #endif
  39. /*
  40. * Miscelaneous platform dependent initialisations
  41. */
  42. int board_init (void)
  43. {
  44. /* We have RAM, disable cache */
  45. dcache_disable();
  46. icache_disable();
  47. /* arch number of Z2 */
  48. gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
  49. /* adress of boot parameters */
  50. gd->bd->bi_boot_params = 0xa0000100;
  51. /* Enable LCD */
  52. lcd_start();
  53. return 0;
  54. }
  55. int dram_init(void)
  56. {
  57. pxa2xx_dram_init();
  58. gd->ram_size = PHYS_SDRAM_1_SIZE;
  59. return 0;
  60. }
  61. void dram_init_banksize(void)
  62. {
  63. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  64. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  65. }
  66. #ifdef CONFIG_CMD_MMC
  67. int board_mmc_init(bd_t *bis)
  68. {
  69. pxa_mmc_register(0);
  70. return 0;
  71. }
  72. #endif
  73. #ifdef CONFIG_CMD_SPI
  74. struct {
  75. unsigned char reg;
  76. unsigned short data;
  77. unsigned char mdelay;
  78. } lcd_data[] = {
  79. { 0x07, 0x0000, 0 },
  80. { 0x13, 0x0000, 10 },
  81. { 0x11, 0x3004, 0 },
  82. { 0x14, 0x200F, 0 },
  83. { 0x10, 0x1a20, 0 },
  84. { 0x13, 0x0040, 50 },
  85. { 0x13, 0x0060, 0 },
  86. { 0x13, 0x0070, 200 },
  87. { 0x01, 0x0127, 0 },
  88. { 0x02, 0x0700, 0 },
  89. { 0x03, 0x1030, 0 },
  90. { 0x08, 0x0208, 0 },
  91. { 0x0B, 0x0620, 0 },
  92. { 0x0C, 0x0110, 0 },
  93. { 0x30, 0x0120, 0 },
  94. { 0x31, 0x0127, 0 },
  95. { 0x32, 0x0000, 0 },
  96. { 0x33, 0x0503, 0 },
  97. { 0x34, 0x0727, 0 },
  98. { 0x35, 0x0124, 0 },
  99. { 0x36, 0x0706, 0 },
  100. { 0x37, 0x0701, 0 },
  101. { 0x38, 0x0F00, 0 },
  102. { 0x39, 0x0F00, 0 },
  103. { 0x40, 0x0000, 0 },
  104. { 0x41, 0x0000, 0 },
  105. { 0x42, 0x013f, 0 },
  106. { 0x43, 0x0000, 0 },
  107. { 0x44, 0x013f, 0 },
  108. { 0x45, 0x0000, 0 },
  109. { 0x46, 0xef00, 0 },
  110. { 0x47, 0x013f, 0 },
  111. { 0x48, 0x0000, 0 },
  112. { 0x07, 0x0015, 30 },
  113. { 0x07, 0x0017, 0 },
  114. { 0x20, 0x0000, 0 },
  115. { 0x21, 0x0000, 0 },
  116. { 0x22, 0x0000, 0 },
  117. };
  118. void zipitz2_spi_sda(int set)
  119. {
  120. /* GPIO 13 */
  121. if (set)
  122. writel((1 << 13), GPSR0);
  123. else
  124. writel((1 << 13), GPCR0);
  125. }
  126. void zipitz2_spi_scl(int set)
  127. {
  128. /* GPIO 22 */
  129. if (set)
  130. writel((1 << 22), GPCR0);
  131. else
  132. writel((1 << 22), GPSR0);
  133. }
  134. unsigned char zipitz2_spi_read(void)
  135. {
  136. /* GPIO 40 */
  137. return !!(readl(GPLR1) & (1 << 8));
  138. }
  139. int spi_cs_is_valid(unsigned int bus, unsigned int cs)
  140. {
  141. /* Always valid */
  142. return 1;
  143. }
  144. void spi_cs_activate(struct spi_slave *slave)
  145. {
  146. /* GPIO 88 low */
  147. writel((1 << 24), GPCR2);
  148. }
  149. void spi_cs_deactivate(struct spi_slave *slave)
  150. {
  151. /* GPIO 88 high */
  152. writel((1 << 24), GPSR2);
  153. }
  154. void lcd_start(void)
  155. {
  156. int i;
  157. unsigned char reg[3] = { 0x74, 0x00, 0 };
  158. unsigned char data[3] = { 0x76, 0, 0 };
  159. unsigned char dummy[3] = { 0, 0, 0 };
  160. /* PWM2 AF */
  161. writel(readl(GAFR0_L) | 0x00800000, GAFR0_L);
  162. /* Enable clock to all PWM */
  163. writel(readl(CKEN) | 0x3, CKEN);
  164. /* Configure PWM2 */
  165. writel(0x4f, PWM_CTRL2);
  166. writel(0x2ff, PWM_PWDUTY2);
  167. writel(792, PWM_PERVAL2);
  168. /* Toggle the reset pin to reset the LCD */
  169. writel((1 << 19), GPSR0);
  170. udelay(100000);
  171. writel((1 << 19), GPCR0);
  172. udelay(20000);
  173. writel((1 << 19), GPSR0);
  174. udelay(20000);
  175. /* Program the LCD init sequence */
  176. for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) {
  177. reg[0] = 0x74;
  178. reg[1] = 0x0;
  179. reg[2] = lcd_data[i].reg;
  180. spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
  181. data[0] = 0x76;
  182. data[1] = lcd_data[i].data >> 8;
  183. data[2] = lcd_data[i].data & 0xff;
  184. spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
  185. if (lcd_data[i].mdelay)
  186. udelay(lcd_data[i].mdelay * 1000);
  187. }
  188. writel((1 << 11), GPSR0);
  189. }
  190. #endif