mvblx.c 4.2 KB

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  1. /*
  2. * MATRIX VISION GmbH mvBlueLYNX-X
  3. *
  4. * Derived from Beagle and Overo
  5. *
  6. * (C) Copyright 2004-2008
  7. * Texas Instruments, <www.ti.com>
  8. *
  9. * Author :
  10. * Sunil Kumar <sunilsaini05@gmail.com>
  11. * Shashi Ranjan <shashiranjanmca05@gmail.com>
  12. *
  13. * Derived from Beagle Board and 3430 SDP code by
  14. * Richard Woodruff <r-woodruff2@ti.com>
  15. * Syed Mohammed Khasim <khasim@ti.com>
  16. *
  17. *
  18. * See file CREDITS for list of people who contributed to this
  19. * project.
  20. *
  21. * This program is free software; you can redistribute it and/or
  22. * modify it under the terms of the GNU General Public License as
  23. * published by the Free Software Foundation; either version 2 of
  24. * the License, or (at your option) any later version.
  25. *
  26. * This program is distributed in the hope that it will be useful,
  27. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  28. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  29. * GNU General Public License for more details.
  30. *
  31. * You should have received a copy of the GNU General Public License
  32. * along with this program; if not, write to the Free Software
  33. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  34. * MA 02111-1307 USA
  35. */
  36. #include <common.h>
  37. #include <netdev.h>
  38. #include <twl4030.h>
  39. #include <asm/io.h>
  40. #include <asm/arch/mem.h>
  41. #include <asm/arch/mmc_host_def.h>
  42. #include <asm/arch/mux.h>
  43. #include <asm/arch/sys_proto.h>
  44. #include <asm/arch/gpio.h>
  45. #include <asm/mach-types.h>
  46. #include "mvblx.h"
  47. #include "fpga.h"
  48. DECLARE_GLOBAL_DATA_PTR;
  49. #if defined(CONFIG_CMD_NET)
  50. static void setup_net_chip(void);
  51. #endif /* CONFIG_CMD_NET */
  52. /*
  53. * Routine: board_init
  54. * Description: Early hardware init.
  55. */
  56. int board_init(void)
  57. {
  58. gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
  59. /* boot param addr */
  60. gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
  61. return 0;
  62. }
  63. /*
  64. * Routine: misc_init_r
  65. * Description: Configure board specific parts
  66. */
  67. int misc_init_r(void)
  68. {
  69. printf("mvBlueLYNX-X\n");
  70. if (get_cpu_family() == CPU_OMAP36XX)
  71. setenv("mpurate", "1000");
  72. else
  73. setenv("mpurate", "600");
  74. twl4030_power_init();
  75. #if defined(CONFIG_CMD_NET)
  76. setup_net_chip();
  77. #endif /* CONFIG_CMD_NET */
  78. mvblx_init_fpga();
  79. mac_read_from_eeprom();
  80. dieid_num_r();
  81. return 0;
  82. }
  83. /*
  84. * Routine: set_muxconf_regs
  85. * Description: Setting up the configuration Mux registers specific to the
  86. * hardware. Many pins need to be moved from protect to primary
  87. * mode.
  88. */
  89. void set_muxconf_regs(void)
  90. {
  91. MUX_MVBLX();
  92. }
  93. #ifdef CONFIG_GENERIC_MMC
  94. int board_mmc_init(bd_t *bis)
  95. {
  96. omap_mmc_init(0, 0, 0, -1, -1);
  97. omap_mmc_init(1, 0, 0, -1, -1);
  98. return 0;
  99. }
  100. #endif
  101. #if defined(CONFIG_CMD_NET)
  102. /*
  103. * Routine: setup_net_chip
  104. * Description: Setting up the configuration GPMC registers specific to the
  105. * Ethernet hardware.
  106. */
  107. static void setup_net_chip(void)
  108. {
  109. struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
  110. struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
  111. /* Configure GPMC registers */
  112. writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[0].config1);
  113. writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[0].config2);
  114. writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[0].config3);
  115. writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[0].config4);
  116. writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[0].config5);
  117. writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[0].config6);
  118. writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[0].config7);
  119. /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
  120. writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
  121. /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
  122. writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
  123. /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
  124. writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
  125. &ctrl_base->gpmc_nadv_ale);
  126. /* Make GPIO 139 as output pin */
  127. writel(readl(&gpio5_base->oe) & ~(GPIO11), &gpio5_base->oe);
  128. /* Now send a pulse on the GPIO pin */
  129. writel(GPIO11, &gpio5_base->setdataout);
  130. udelay(1);
  131. writel(GPIO11, &gpio5_base->cleardataout);
  132. udelay(1);
  133. writel(GPIO11, &gpio5_base->setdataout);
  134. }
  135. int board_eth_init(bd_t *bis)
  136. {
  137. int rc = 0;
  138. #ifdef CONFIG_SMC911X
  139. rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
  140. #endif
  141. return rc;
  142. }
  143. int overwrite_console(void)
  144. {
  145. /* return true if console should be overwritten */
  146. return 0;
  147. }
  148. #endif /* CONFIG_CMD_NET */