mergerbox.h 1.9 KB

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  1. /*
  2. * Copyright (C) 2011 Matrix Vision GmbH
  3. * Andre Schwarz <andre.schwarz@matrix-vision.de>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. */
  13. #ifndef __MERGERBOX_H__
  14. #define __MERGERBOX_H__
  15. #define MV_GPIO
  16. /*
  17. * GPIO Bank 1
  18. */
  19. #define TFT_SPI_EN (0x80000000>>0)
  20. #define FPGA_CONFIG (0x80000000>>1)
  21. #define FPGA_STATUS (0x80000000>>2)
  22. #define FPGA_CONF_DONE (0x80000000>>3)
  23. #define FPGA_DIN (0x80000000>>4)
  24. #define FPGA_CCLK (0x80000000>>5)
  25. #define MAN_RST (0x80000000>>6)
  26. #define FPGA_SYS_RST (0x80000000>>7)
  27. #define WD_WDI (0x80000000>>8)
  28. #define TFT_RST (0x80000000>>9)
  29. #define HISCON_GPIO1 (0x80000000>>10)
  30. #define HISCON_GPIO2 (0x80000000>>11)
  31. #define B2B_GPIO2 (0x80000000>>12)
  32. #define CCU_GPIN (0x80000000>>13)
  33. #define CCU_GPOUT (0x80000000>>14)
  34. #define TFT_GPIO0 (0x80000000>>15)
  35. #define TFT_GPIO1 (0x80000000>>16)
  36. #define TFT_GPIO2 (0x80000000>>17)
  37. #define TFT_GPIO3 (0x80000000>>18)
  38. #define B2B_GPIO0 (0x80000000>>19)
  39. #define B2B_GPIO1 (0x80000000>>20)
  40. #define TFT_SPI_CPLD_CS (0x80000000>>21)
  41. #define TFT_SPI_CS (0x80000000>>22)
  42. #define CCU_PWR_EN (0x80000000>>23)
  43. #define B2B_GPIO3 (0x80000000>>24)
  44. #define CCU_PWR_STAT (0x80000000>>25)
  45. #define MV_GPIO1_DAT (FPGA_CONFIG|CCU_PWR_EN|TFT_SPI_CPLD_CS)
  46. #define MV_GPIO1_OUT (TFT_SPI_EN|FPGA_CONFIG|FPGA_DIN|FPGA_CCLK|CCU_PWR_EN| \
  47. TFT_SPI_CPLD_CS)
  48. #define MV_GPIO1_ODE (FPGA_CONFIG|MAN_RST)
  49. /*
  50. * GPIO Bank 2
  51. */
  52. #define SPI_FLASH_WP (0x80000000>>10)
  53. #define SYS_EEPROM_WP (0x80000000>>11)
  54. #define SPI_FLASH_CS (0x80000000>>22)
  55. #define MV_GPIO2_DAT (SYS_EEPROM_WP|SPI_FLASH_CS)
  56. #define MV_GPIO2_OUT (SPI_FLASH_WP|SYS_EEPROM_WP|SPI_FLASH_CS)
  57. #define MV_GPIO2_ODE 0
  58. void mergerbox_tft_dim(u16 value);
  59. #endif