dm355evm.c 4.1 KB

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  1. /*
  2. * Copyright (C) 2009 David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. #include <common.h>
  19. #include <nand.h>
  20. #include <asm/io.h>
  21. #include <asm/arch/hardware.h>
  22. #include <asm/arch/emif_defs.h>
  23. #include <asm/arch/nand_defs.h>
  24. #include <asm/arch/davinci_misc.h>
  25. #include <net.h>
  26. #include <netdev.h>
  27. #ifdef CONFIG_DAVINCI_MMC
  28. #include <mmc.h>
  29. #include <asm/arch/sdmmc_defs.h>
  30. #endif
  31. DECLARE_GLOBAL_DATA_PTR;
  32. /*
  33. * With the DM355 EVM, u-boot is *always* a third stage loader,
  34. * unless a JTAG debugger handles the first two stages:
  35. *
  36. * - 1st stage is ROM Boot Loader (RBL), which searches for a
  37. * second stage loader in one of three places based on SW7:
  38. * NAND (with MMC/SD fallback), MMC/SD, or UART.
  39. *
  40. * - 2nd stage is User Boot Loader (UBL), using at most 30KB
  41. * of on-chip SRAM, responsible for lowlevel init, and for
  42. * loading the third stage loader into DRAM.
  43. *
  44. * - 3rd stage, that's us!
  45. */
  46. int board_init(void)
  47. {
  48. gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM355_EVM;
  49. gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  50. /* We expect the UBL to have handled "lowlevel init", which
  51. * involves setting up at least:
  52. * - clocks
  53. * + PLL1 (for ARM and peripherals) and PLL2 (for DDR)
  54. * + clock divisors for those PLLs
  55. * + LPSC_DDR module enabled
  56. * + LPSC_TIMER0 module (still) enabled
  57. * - EMIF
  58. * + DDR init and timings
  59. * + AEMIF timings (for NAND and DM9000)
  60. * - pinmux
  61. *
  62. * Some of that is repeated here, mostly as a precaution.
  63. */
  64. /* AEMIF: Some "address" lines are available as GPIOs. A3..A13
  65. * could be too if we used A12 as a GPIO during NAND chipselect
  66. * (and Linux did too), letting us control the LED on A7/GPIO61.
  67. */
  68. REG(PINMUX2) = 0x0c08;
  69. /* UART0 may still be in SyncReset if we didn't boot from UART */
  70. davinci_enable_uart0();
  71. /* EDMA may be in SyncReset too; turn it on, Linux won't (yet) */
  72. lpsc_on(DAVINCI_LPSC_TPCC);
  73. lpsc_on(DAVINCI_LPSC_TPTC0);
  74. lpsc_on(DAVINCI_LPSC_TPTC1);
  75. return 0;
  76. }
  77. #ifdef CONFIG_DRIVER_DM9000
  78. int board_eth_init(bd_t *bis)
  79. {
  80. return dm9000_initialize(bis);
  81. }
  82. #endif
  83. #ifdef CONFIG_NAND_DAVINCI
  84. static void nand_dm355evm_select_chip(struct mtd_info *mtd, int chip)
  85. {
  86. struct nand_chip *this = mtd->priv;
  87. unsigned long wbase = (unsigned long) this->IO_ADDR_W;
  88. unsigned long rbase = (unsigned long) this->IO_ADDR_R;
  89. if (chip == 1) {
  90. __set_bit(14, &wbase);
  91. __set_bit(14, &rbase);
  92. } else {
  93. __clear_bit(14, &wbase);
  94. __clear_bit(14, &rbase);
  95. }
  96. this->IO_ADDR_W = (void *)wbase;
  97. this->IO_ADDR_R = (void *)rbase;
  98. }
  99. int board_nand_init(struct nand_chip *nand)
  100. {
  101. davinci_nand_init(nand);
  102. nand->select_chip = nand_dm355evm_select_chip;
  103. return 0;
  104. }
  105. #endif
  106. #ifdef CONFIG_DAVINCI_MMC
  107. static struct davinci_mmc mmc_sd0 = {
  108. .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
  109. .input_clk = 108000000,
  110. .host_caps = MMC_MODE_4BIT,
  111. .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
  112. .version = MMC_CTLR_VERSION_1,
  113. };
  114. #ifdef CONFIG_DAVINCI_MMC_SD1
  115. static struct davinci_mmc mmc_sd1 = {
  116. .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD1_BASE,
  117. .input_clk = 108000000,
  118. .host_caps = MMC_MODE_4BIT,
  119. .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
  120. .version = MMC_CTLR_VERSION_1,
  121. };
  122. #endif
  123. int board_mmc_init(bd_t *bis)
  124. {
  125. int err;
  126. /* Add slot-0 to mmc subsystem */
  127. err = davinci_mmc_init(bis, &mmc_sd0);
  128. if (err)
  129. return err;
  130. #ifdef CONFIG_DAVINCI_MMC_SD1
  131. /* Add slot-1 to mmc subsystem */
  132. err = davinci_mmc_init(bis, &mmc_sd1);
  133. #endif
  134. return err;
  135. }
  136. #endif