cm5200.c 10 KB

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  1. /*
  2. * (C) Copyright 2003-2007
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2004
  6. * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
  7. *
  8. * (C) Copyright 2004-2005
  9. * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
  10. *
  11. * Adapted to U-Boot 1.2 by:
  12. * Bartlomiej Sieka <tur@semihalf.com>:
  13. * - HW ID readout from EEPROM
  14. * - module detection
  15. * Grzegorz Bernacki <gjb@semihalf.com>:
  16. * - run-time SDRAM controller configuration
  17. * - LIBFDT support
  18. *
  19. * See file CREDITS for list of people who contributed to this
  20. * project.
  21. *
  22. * This program is free software; you can redistribute it and/or
  23. * modify it under the terms of the GNU General Public License as
  24. * published by the Free Software Foundation; either version 2 of
  25. * the License, or (at your option) any later version.
  26. *
  27. * This program is distributed in the hope that it will be useful,
  28. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  29. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  30. * GNU General Public License for more details.
  31. *
  32. * You should have received a copy of the GNU General Public License
  33. * along with this program; if not, write to the Free Software
  34. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  35. * MA 02111-1307 USA
  36. */
  37. #include <common.h>
  38. #include <mpc5xxx.h>
  39. #include <pci.h>
  40. #include <asm/processor.h>
  41. #include <i2c.h>
  42. #include <linux/ctype.h>
  43. #ifdef CONFIG_OF_LIBFDT
  44. #include <libfdt.h>
  45. #include <fdt_support.h>
  46. #endif /* CONFIG_OF_LIBFDT */
  47. #include "cm5200.h"
  48. #include "fwupdate.h"
  49. DECLARE_GLOBAL_DATA_PTR;
  50. static hw_id_t hw_id;
  51. #ifndef CONFIG_SYS_RAMBOOT
  52. /*
  53. * Helper function to initialize SDRAM controller.
  54. */
  55. static void sdram_start(int hi_addr, mem_conf_t *mem_conf)
  56. {
  57. long hi_addr_bit = hi_addr ? 0x01000000 : 0;
  58. /* unlock mode register */
  59. *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000000 |
  60. hi_addr_bit;
  61. /* precharge all banks */
  62. *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000002 |
  63. hi_addr_bit;
  64. /* auto refresh */
  65. *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 |
  66. hi_addr_bit;
  67. /* auto refresh, second time */
  68. *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 |
  69. hi_addr_bit;
  70. /* set mode register */
  71. *(vu_long *)MPC5XXX_SDRAM_MODE = mem_conf->mode;
  72. /* normal operation */
  73. *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | hi_addr_bit;
  74. }
  75. #endif /* CONFIG_SYS_RAMBOOT */
  76. /*
  77. * Retrieve memory configuration for a given module. board_type is the index
  78. * in hw_id_list[] corresponding to the module we are executing on; we return
  79. * SDRAM controller settings approprate for this module.
  80. */
  81. static mem_conf_t* get_mem_config(int board_type)
  82. {
  83. switch(board_type){
  84. case CM1_QA:
  85. return memory_config[0];
  86. case CM11_QA:
  87. case CMU1_QA:
  88. return memory_config[1];
  89. default:
  90. printf("ERROR: Unknown module, using a default SDRAM "
  91. "configuration - things may not work!!!.\n");
  92. return memory_config[0];
  93. }
  94. }
  95. /*
  96. * Initalize SDRAM - configure SDRAM controller, detect memory size.
  97. */
  98. phys_size_t initdram(int board_type)
  99. {
  100. ulong dramsize = 0;
  101. #ifndef CONFIG_SYS_RAMBOOT
  102. ulong test1, test2;
  103. mem_conf_t *mem_conf;
  104. mem_conf = get_mem_config(board_type);
  105. /* configure SDRAM start/end for detection */
  106. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
  107. /* setup config registers */
  108. *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = mem_conf->config1;
  109. *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = mem_conf->config2;
  110. sdram_start(0, mem_conf);
  111. test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
  112. sdram_start(1, mem_conf);
  113. test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
  114. if (test1 > test2) {
  115. sdram_start(0, mem_conf);
  116. dramsize = test1;
  117. } else
  118. dramsize = test2;
  119. /* memory smaller than 1MB is impossible */
  120. if (dramsize < (1 << 20))
  121. dramsize = 0;
  122. /* set SDRAM CS0 size according to the amount of RAM found */
  123. if (dramsize > 0) {
  124. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
  125. __builtin_ffs(dramsize >> 20) - 1;
  126. } else
  127. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
  128. #else /* CONFIG_SYS_RAMBOOT */
  129. /* retrieve size of memory connected to SDRAM CS0 */
  130. dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
  131. if (dramsize >= 0x13)
  132. dramsize = (1 << (dramsize - 0x13)) << 20;
  133. else
  134. dramsize = 0;
  135. #endif /* !CONFIG_SYS_RAMBOOT */
  136. /*
  137. * On MPC5200B we need to set the special configuration delay in the
  138. * DDR controller. Refer to chapter 8.7.5 SDelay--MBAR + 0x0190 of
  139. * the MPC5200B User's Manual.
  140. */
  141. *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
  142. __asm__ volatile ("sync");
  143. return dramsize;
  144. }
  145. /*
  146. * Read module hardware identification data from the I2C EEPROM.
  147. */
  148. static void read_hw_id(hw_id_t hw_id)
  149. {
  150. int i;
  151. for (i = 0; i < HW_ID_ELEM_COUNT; ++i)
  152. if (i2c_read(CONFIG_SYS_I2C_EEPROM,
  153. hw_id_format[i].offset,
  154. 2,
  155. (uchar *)&hw_id[i][0],
  156. hw_id_format[i].length) != 0)
  157. printf("ERROR: can't read HW ID from EEPROM\n");
  158. }
  159. /*
  160. * Identify module we are running on, set gd->board_type to the index in
  161. * hw_id_list[] corresponding to the module identifed, or to
  162. * CM5200_UNKNOWN_MODULE if we can't identify the module.
  163. */
  164. static void identify_module(hw_id_t hw_id)
  165. {
  166. int i, j, element;
  167. char match;
  168. gd->board_type = CM5200_UNKNOWN_MODULE;
  169. for (i = 0; i < sizeof (hw_id_list) / sizeof (char **); ++i) {
  170. match = 1;
  171. for (j = 0; j < sizeof (hw_id_identify) / sizeof (int); ++j) {
  172. element = hw_id_identify[j];
  173. if (strncmp(hw_id_list[i][element],
  174. &hw_id[element][0],
  175. hw_id_format[element].length) != 0) {
  176. match = 0;
  177. break;
  178. }
  179. }
  180. if (match) {
  181. gd->board_type = i;
  182. break;
  183. }
  184. }
  185. }
  186. /*
  187. * Compose string with module name.
  188. * buf is assumed to have enough space, and be null-terminated.
  189. */
  190. static void compose_module_name(hw_id_t hw_id, char *buf)
  191. {
  192. char tmp[MODULE_NAME_MAXLEN];
  193. strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length);
  194. strncat(buf, ".", 1);
  195. strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length);
  196. strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length);
  197. strncat(buf, " (", 2);
  198. strncat(buf, &hw_id[IDENTIFICATION_NUMBER][0],
  199. hw_id_format[IDENTIFICATION_NUMBER].length);
  200. sprintf(tmp, " / %u.%u)",
  201. hw_id[MAJOR_SW_VERSION][0],
  202. hw_id[MINOR_SW_VERSION][0]);
  203. strcat(buf, tmp);
  204. }
  205. /*
  206. * Compose string with hostname.
  207. * buf is assumed to have enough space, and be null-terminated.
  208. */
  209. static void compose_hostname(hw_id_t hw_id, char *buf)
  210. {
  211. char *p;
  212. strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length);
  213. strncat(buf, "_", 1);
  214. strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length);
  215. strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length);
  216. for (p = buf; *p; ++p)
  217. *p = tolower(*p);
  218. }
  219. #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
  220. /*
  221. * Update 'model' and 'memory' properties in the blob according to the module
  222. * that we are running on.
  223. */
  224. static void ft_blob_update(void *blob, bd_t *bd)
  225. {
  226. int len, ret, nodeoffset = 0;
  227. char module_name[MODULE_NAME_MAXLEN] = {0};
  228. compose_module_name(hw_id, module_name);
  229. len = strlen(module_name) + 1;
  230. ret = fdt_setprop(blob, nodeoffset, "model", module_name, len);
  231. if (ret < 0)
  232. printf("ft_blob_update(): cannot set /model property err:%s\n",
  233. fdt_strerror(ret));
  234. }
  235. #endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
  236. /*
  237. * Read HW ID from I2C EEPROM and detect the modue we are running on. Note
  238. * that we need to use local variable for readout, because global data is not
  239. * writable yet (and we'll have to redo the readout later on).
  240. */
  241. int checkboard(void)
  242. {
  243. hw_id_t hw_id_tmp;
  244. char module_name_tmp[MODULE_NAME_MAXLEN] = "";
  245. /*
  246. * We need I2C to access HW ID data from EEPROM, so we call i2c_init()
  247. * here despite the fact that it will be called again later on. We
  248. * also use a little trick to silence I2C-related output.
  249. */
  250. gd->flags |= GD_FLG_SILENT;
  251. i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  252. gd->flags &= ~GD_FLG_SILENT;
  253. read_hw_id(hw_id_tmp);
  254. identify_module(hw_id_tmp); /* this sets gd->board_type */
  255. compose_module_name(hw_id_tmp, module_name_tmp);
  256. if (gd->board_type != CM5200_UNKNOWN_MODULE)
  257. printf("Board: %s\n", module_name_tmp);
  258. else
  259. printf("Board: unrecognized cm5200 module (%s)\n",
  260. module_name_tmp);
  261. return 0;
  262. }
  263. int board_early_init_r(void)
  264. {
  265. /*
  266. * Now, when we are in RAM, enable flash write access for detection
  267. * process. Note that CS_BOOT cannot be cleared when executing in
  268. * flash.
  269. */
  270. *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
  271. /* Now that we can write to global data, read HW ID again. */
  272. read_hw_id(hw_id);
  273. return 0;
  274. }
  275. #ifdef CONFIG_MISC_INIT_R
  276. int misc_init_r(void)
  277. {
  278. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
  279. uchar buf[6];
  280. char str[18];
  281. char hostname[MODULE_NAME_MAXLEN];
  282. /* Read ethaddr from EEPROM */
  283. if (i2c_read(CONFIG_SYS_I2C_EEPROM, CONFIG_MAC_OFFSET, 2, buf, 6) == 0) {
  284. sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X",
  285. buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
  286. /* Check if MAC addr is owned by Schindler */
  287. if (strstr(str, "00:06:C3") != str)
  288. printf(LOG_PREFIX "Warning - Illegal MAC address (%s)"
  289. " in EEPROM.\n", str);
  290. else {
  291. printf(LOG_PREFIX "Using MAC (%s) from I2C EEPROM\n",
  292. str);
  293. setenv("ethaddr", str);
  294. }
  295. } else {
  296. printf(LOG_PREFIX "Warning - Unable to read MAC from I2C"
  297. " device at address %02X:%04X\n", CONFIG_SYS_I2C_EEPROM,
  298. CONFIG_MAC_OFFSET);
  299. }
  300. #endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */
  301. if (!getenv("ethaddr"))
  302. printf(LOG_PREFIX "MAC address not set, networking is not "
  303. "operational\n");
  304. /* set the hostname appropriate to the module we're running on */
  305. hostname[0] = 0x00;
  306. compose_hostname(hw_id, hostname);
  307. setenv("hostname", hostname);
  308. return 0;
  309. }
  310. #endif /* CONFIG_MISC_INIT_R */
  311. #ifdef CONFIG_LAST_STAGE_INIT
  312. int last_stage_init(void)
  313. {
  314. #ifdef CONFIG_USB_STORAGE
  315. cm5200_fwupdate();
  316. #endif /* CONFIG_USB_STORAGE */
  317. return 0;
  318. }
  319. #endif /* CONFIG_LAST_STAGE_INIT */
  320. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  321. void ft_board_setup(void *blob, bd_t *bd)
  322. {
  323. ft_cpu_setup(blob, bd);
  324. ft_blob_update(blob, bd);
  325. }
  326. #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */