goflexhome.c 4.3 KB

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  1. /*
  2. * Copyright (C) 2013 Suriyan Ramasami <suriyan.r@gmail.com>
  3. *
  4. * Based on dockstar.c originally written by
  5. * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
  6. *
  7. * Based on sheevaplug.c originally written by
  8. * Prafulla Wadaskar <prafulla@marvell.com>
  9. * (C) Copyright 2009
  10. * Marvell Semiconductor <www.marvell.com>
  11. *
  12. * See file CREDITS for list of people who contributed to this
  13. * project.
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License as
  17. * published by the Free Software Foundation; either version 2 of
  18. * the License, or (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  28. * MA 02110-1301 USA
  29. */
  30. #include <common.h>
  31. #include <miiphy.h>
  32. #include <asm/arch/kirkwood.h>
  33. #include <asm/arch/mpp.h>
  34. #include <asm/arch/cpu.h>
  35. #include <asm/io.h>
  36. DECLARE_GLOBAL_DATA_PTR;
  37. int board_early_init_f(void)
  38. {
  39. /* Multi-Purpose Pins Functionality configuration */
  40. static const u32 kwmpp_config[] = {
  41. MPP0_NF_IO2,
  42. MPP1_NF_IO3,
  43. MPP2_NF_IO4,
  44. MPP3_NF_IO5,
  45. MPP4_NF_IO6,
  46. MPP5_NF_IO7,
  47. MPP6_SYSRST_OUTn,
  48. MPP7_GPO,
  49. MPP8_UART0_RTS,
  50. MPP9_UART0_CTS,
  51. MPP10_UART0_TXD,
  52. MPP11_UART0_RXD,
  53. MPP12_SD_CLK,
  54. MPP13_SD_CMD,
  55. MPP14_SD_D0,
  56. MPP15_SD_D1,
  57. MPP16_SD_D2,
  58. MPP17_SD_D3,
  59. MPP18_NF_IO0,
  60. MPP19_NF_IO1,
  61. MPP20_GPIO,
  62. MPP21_GPIO,
  63. MPP22_GPIO,
  64. MPP23_GPIO,
  65. MPP24_GPIO,
  66. MPP25_GPIO,
  67. MPP26_GPIO,
  68. MPP27_GPIO,
  69. MPP28_GPIO,
  70. MPP29_TSMP9,
  71. MPP30_GPIO,
  72. MPP31_GPIO,
  73. MPP32_GPIO,
  74. MPP33_GPIO,
  75. MPP34_GPIO,
  76. MPP35_GPIO,
  77. MPP36_GPIO,
  78. MPP37_GPIO,
  79. MPP38_GPIO,
  80. MPP39_GPIO,
  81. MPP40_GPIO,
  82. MPP41_GPIO,
  83. MPP42_GPIO,
  84. MPP43_GPIO,
  85. MPP44_GPIO,
  86. MPP45_GPIO,
  87. MPP46_GPIO,
  88. MPP47_GPIO,
  89. MPP48_GPIO,
  90. MPP49_GPIO,
  91. 0
  92. };
  93. /*
  94. * default gpio configuration
  95. * There are maximum 64 gpios controlled through 2 sets of registers
  96. * the below configuration configures mainly initial LED status
  97. */
  98. kw_config_gpio(GOFLEXHOME_OE_VAL_LOW,
  99. GOFLEXHOME_OE_VAL_HIGH,
  100. GOFLEXHOME_OE_LOW, GOFLEXHOME_OE_HIGH);
  101. kirkwood_mpp_conf(kwmpp_config, NULL);
  102. return 0;
  103. }
  104. int board_init(void)
  105. {
  106. /*
  107. * arch number of board
  108. */
  109. gd->bd->bi_arch_number = MACH_TYPE_GOFLEXHOME;
  110. /* address of boot parameters */
  111. gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
  112. return 0;
  113. }
  114. #ifdef CONFIG_RESET_PHY_R
  115. /* Configure and enable MV88E1116 PHY */
  116. void reset_phy(void)
  117. {
  118. u16 reg;
  119. u16 devadr;
  120. char *name = "egiga0";
  121. if (miiphy_set_current_dev(name))
  122. return;
  123. /* command to read PHY dev address */
  124. if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) {
  125. printf("Err..%s could not read PHY dev address\n",
  126. __func__);
  127. return;
  128. }
  129. /*
  130. * Enable RGMII delay on Tx and Rx for CPU port
  131. * Ref: sec 4.7.2 of chip datasheet
  132. */
  133. miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
  134. miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
  135. reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
  136. miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
  137. miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
  138. /* reset the phy */
  139. miiphy_reset(name, devadr);
  140. printf("88E1116 Initialized on %s\n", name);
  141. }
  142. #endif /* CONFIG_RESET_PHY_R */
  143. #define GREEN_LED (1 << 14)
  144. #define ORANGE_LED (1 << 15)
  145. #define BOTH_LEDS (GREEN_LED | ORANGE_LED)
  146. #define NEITHER_LED 0
  147. static void set_leds(u32 leds, u32 blinking)
  148. {
  149. struct kwgpio_registers *r;
  150. u32 oe;
  151. u32 bl;
  152. r = (struct kwgpio_registers *)KW_GPIO1_BASE;
  153. oe = readl(&r->oe) | BOTH_LEDS;
  154. writel(oe & ~leds, &r->oe); /* active low */
  155. bl = readl(&r->blink_en) & ~BOTH_LEDS;
  156. writel(bl | blinking, &r->blink_en);
  157. }
  158. void show_boot_progress(int val)
  159. {
  160. switch (val) {
  161. case BOOTSTAGE_ID_RUN_OS: /* booting Linux */
  162. set_leds(BOTH_LEDS, NEITHER_LED);
  163. break;
  164. case BOOTSTAGE_ID_NET_ETH_START: /* Ethernet initialization */
  165. set_leds(GREEN_LED, GREEN_LED);
  166. break;
  167. default:
  168. if (val < 0) /* error */
  169. set_leds(ORANGE_LED, ORANGE_LED);
  170. break;
  171. }
  172. }