dockstar.c 4.1 KB

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  1. /*
  2. * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
  3. *
  4. * Based on sheevaplug.c originally written by
  5. * Prafulla Wadaskar <prafulla@marvell.com>
  6. * (C) Copyright 2009
  7. * Marvell Semiconductor <www.marvell.com>
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  25. * MA 02110-1301 USA
  26. */
  27. #include <common.h>
  28. #include <miiphy.h>
  29. #include <asm/arch/kirkwood.h>
  30. #include <asm/arch/mpp.h>
  31. #include <asm/arch/cpu.h>
  32. #include <asm/io.h>
  33. #include "dockstar.h"
  34. DECLARE_GLOBAL_DATA_PTR;
  35. int board_early_init_f(void)
  36. {
  37. /*
  38. * default gpio configuration
  39. * There are maximum 64 gpios controlled through 2 sets of registers
  40. * the below configuration configures mainly initial LED status
  41. */
  42. kw_config_gpio(DOCKSTAR_OE_VAL_LOW,
  43. DOCKSTAR_OE_VAL_HIGH,
  44. DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
  45. /* Multi-Purpose Pins Functionality configuration */
  46. static const u32 kwmpp_config[] = {
  47. MPP0_NF_IO2,
  48. MPP1_NF_IO3,
  49. MPP2_NF_IO4,
  50. MPP3_NF_IO5,
  51. MPP4_NF_IO6,
  52. MPP5_NF_IO7,
  53. MPP6_SYSRST_OUTn,
  54. MPP7_GPO,
  55. MPP8_UART0_RTS,
  56. MPP9_UART0_CTS,
  57. MPP10_UART0_TXD,
  58. MPP11_UART0_RXD,
  59. MPP12_SD_CLK,
  60. MPP13_SD_CMD,
  61. MPP14_SD_D0,
  62. MPP15_SD_D1,
  63. MPP16_SD_D2,
  64. MPP17_SD_D3,
  65. MPP18_NF_IO0,
  66. MPP19_NF_IO1,
  67. MPP20_GPIO,
  68. MPP21_GPIO,
  69. MPP22_GPIO,
  70. MPP23_GPIO,
  71. MPP24_GPIO,
  72. MPP25_GPIO,
  73. MPP26_GPIO,
  74. MPP27_GPIO,
  75. MPP28_GPIO,
  76. MPP29_TSMP9,
  77. MPP30_GPIO,
  78. MPP31_GPIO,
  79. MPP32_GPIO,
  80. MPP33_GPIO,
  81. MPP34_GPIO,
  82. MPP35_GPIO,
  83. MPP36_GPIO,
  84. MPP37_GPIO,
  85. MPP38_GPIO,
  86. MPP39_GPIO,
  87. MPP40_GPIO,
  88. MPP41_GPIO,
  89. MPP42_GPIO,
  90. MPP43_GPIO,
  91. MPP44_GPIO,
  92. MPP45_GPIO,
  93. MPP46_GPIO,
  94. MPP47_GPIO,
  95. MPP48_GPIO,
  96. MPP49_GPIO,
  97. 0
  98. };
  99. kirkwood_mpp_conf(kwmpp_config, NULL);
  100. return 0;
  101. }
  102. int board_init(void)
  103. {
  104. /*
  105. * arch number of board
  106. */
  107. gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR;
  108. /* address of boot parameters */
  109. gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
  110. return 0;
  111. }
  112. #ifdef CONFIG_RESET_PHY_R
  113. /* Configure and enable MV88E1116 PHY */
  114. void reset_phy(void)
  115. {
  116. u16 reg;
  117. u16 devadr;
  118. char *name = "egiga0";
  119. if (miiphy_set_current_dev(name))
  120. return;
  121. /* command to read PHY dev address */
  122. if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
  123. printf("Err..%s could not read PHY dev address\n",
  124. __FUNCTION__);
  125. return;
  126. }
  127. /*
  128. * Enable RGMII delay on Tx and Rx for CPU port
  129. * Ref: sec 4.7.2 of chip datasheet
  130. */
  131. miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
  132. miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
  133. reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
  134. miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
  135. miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
  136. /* reset the phy */
  137. miiphy_reset(name, devadr);
  138. printf("88E1116 Initialized on %s\n", name);
  139. }
  140. #endif /* CONFIG_RESET_PHY_R */
  141. #define GREEN_LED (1 << 14)
  142. #define ORANGE_LED (1 << 15)
  143. #define BOTH_LEDS (GREEN_LED | ORANGE_LED)
  144. #define NEITHER_LED 0
  145. static void set_leds(u32 leds, u32 blinking)
  146. {
  147. struct kwgpio_registers *r = (struct kwgpio_registers *)KW_GPIO1_BASE;
  148. u32 oe = readl(&r->oe) | BOTH_LEDS;
  149. writel(oe & ~leds, &r->oe); /* active low */
  150. u32 bl = readl(&r->blink_en) & ~BOTH_LEDS;
  151. writel(bl | blinking, &r->blink_en);
  152. }
  153. void show_boot_progress(int val)
  154. {
  155. switch (val) {
  156. case BOOTSTAGE_ID_RUN_OS: /* booting Linux */
  157. set_leds(BOTH_LEDS, NEITHER_LED);
  158. break;
  159. case BOOTSTAGE_ID_NET_ETH_START: /* Ethernet initialization */
  160. set_leds(GREEN_LED, GREEN_LED);
  161. break;
  162. default:
  163. if (val < 0) /* error */
  164. set_leds(ORANGE_LED, ORANGE_LED);
  165. break;
  166. }
  167. }