igep0020.h 6.4 KB

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  1. /*
  2. * (C) Copyright 2010
  3. * ISEE 2007 SL, <www.iseebcn.com>
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of
  8. * the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18. * MA 02111-1307 USA
  19. */
  20. #ifndef __CONFIG_H
  21. #define __CONFIG_H
  22. #include <asm/sizes.h>
  23. /*
  24. * High Level Configuration Options
  25. */
  26. #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
  27. #define CONFIG_OMAP 1 /* in a TI OMAP core */
  28. #define CONFIG_OMAP34XX 1 /* which is a 34XX */
  29. #define CONFIG_OMAP3430 1 /* which is in a 3430 */
  30. #define CONFIG_OMAP3_IGEP0020 1 /* working with IGEP0020 */
  31. #define CONFIG_SDRC /* The chip has SDRC controller */
  32. #include <asm/arch/cpu.h>
  33. #include <asm/arch/omap3.h>
  34. /*
  35. * Display CPU and Board information
  36. */
  37. #define CONFIG_DISPLAY_CPUINFO 1
  38. #define CONFIG_DISPLAY_BOARDINFO 1
  39. /* Clock Defines */
  40. #define V_OSCK 26000000 /* Clock output from T2 */
  41. #define V_SCLK (V_OSCK >> 1)
  42. #define CONFIG_MISC_INIT_R
  43. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  44. #define CONFIG_SETUP_MEMORY_TAGS 1
  45. #define CONFIG_INITRD_TAG 1
  46. #define CONFIG_REVISION_TAG 1
  47. /*
  48. * NS16550 Configuration
  49. */
  50. #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
  51. #define CONFIG_SYS_NS16550
  52. #define CONFIG_SYS_NS16550_SERIAL
  53. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  54. #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
  55. /* select serial console configuration */
  56. #define CONFIG_CONS_INDEX 3
  57. #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
  58. #define CONFIG_SERIAL3 3
  59. /* allow to overwrite serial and ethaddr */
  60. #define CONFIG_ENV_OVERWRITE
  61. #define CONFIG_BAUDRATE 115200
  62. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
  63. #define CONFIG_MMC 1
  64. #define CONFIG_OMAP3_MMC 1
  65. #define CONFIG_DOS_PARTITION 1
  66. /* DDR */
  67. #define CONFIG_OMAP3_NUMONYX_DDR 1
  68. /* USB */
  69. #define CONFIG_MUSB_UDC 1
  70. #define CONFIG_USB_OMAP3 1
  71. #define CONFIG_TWL4030_USB 1
  72. /* USB device configuration */
  73. #define CONFIG_USB_DEVICE 1
  74. #define CONFIG_USB_TTY 1
  75. #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
  76. /* Change these to suit your needs */
  77. #define CONFIG_USBD_VENDORID 0x0451
  78. #define CONFIG_USBD_PRODUCTID 0x5678
  79. #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
  80. #define CONFIG_USBD_PRODUCT_NAME "IGEP"
  81. /* commands to include */
  82. #include <config_cmd_default.h>
  83. #define CONFIG_CMD_CACHE
  84. #define CONFIG_CMD_EXT2 /* EXT2 Support */
  85. #define CONFIG_CMD_FAT /* FAT support */
  86. #define CONFIG_CMD_I2C /* I2C serial bus support */
  87. #define CONFIG_CMD_MMC /* MMC support */
  88. #define CONFIG_CMD_ONENAND /* ONENAND support */
  89. #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
  90. #define CONFIG_CMD_DHCP
  91. #define CONFIG_CMD_PING
  92. #define CONFIG_CMD_NFS /* NFS support */
  93. #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
  94. #define CONFIG_MTD_DEVICE
  95. #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
  96. #undef CONFIG_CMD_IMLS /* List all found images */
  97. #define CONFIG_SYS_NO_FLASH
  98. #define CONFIG_HARD_I2C 1
  99. #define CONFIG_SYS_I2C_SPEED 100000
  100. #define CONFIG_SYS_I2C_SLAVE 1
  101. #define CONFIG_SYS_I2C_BUS 0
  102. #define CONFIG_SYS_I2C_BUS_SELECT 1
  103. #define CONFIG_DRIVER_OMAP34XX_I2C 1
  104. /*
  105. * TWL4030
  106. */
  107. #define CONFIG_TWL4030_POWER 1
  108. /* Environment information */
  109. #define CONFIG_BOOTCOMMAND \
  110. "mmc init 0 ; fatload mmc 0 0x80000000 setup.ini ; source \0"
  111. #define CONFIG_BOOTDELAY 3
  112. #define CONFIG_EXTRA_ENV_SETTINGS \
  113. "usbtty=cdc_acm\0"
  114. #define CONFIG_AUTO_COMPLETE 1
  115. /*
  116. * Miscellaneous configurable options
  117. */
  118. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  119. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  120. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  121. #define CONFIG_SYS_PROMPT "U-Boot # "
  122. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  123. /* Print Buffer Size */
  124. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  125. sizeof(CONFIG_SYS_PROMPT) + 16)
  126. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  127. /* Boot Argument Buffer Size */
  128. #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
  129. #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
  130. /* works on */
  131. #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
  132. 0x01F00000) /* 31MB */
  133. #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
  134. /* load address */
  135. #define CONFIG_SYS_MONITOR_LEN (256 << 10)
  136. /*
  137. * OMAP3 has 12 GP timers, they can be driven by the system clock
  138. * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  139. * This rate is divided by a local divisor.
  140. */
  141. #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
  142. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  143. #define CONFIG_SYS_HZ 1000
  144. /*
  145. * Stack sizes
  146. *
  147. * The stack sizes are set up in start.S using the settings below
  148. */
  149. #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
  150. /*
  151. * Physical Memory Map
  152. *
  153. */
  154. #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
  155. #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
  156. #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */
  157. #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
  158. /* SDRAM Bank Allocation method */
  159. #define SDRC_R_B_C 1
  160. /*
  161. * FLASH and environment organization
  162. */
  163. #define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */
  164. #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
  165. #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
  166. #define CONFIG_ENV_IS_IN_ONENAND 1
  167. #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
  168. #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
  169. /*
  170. * Size of malloc() pool
  171. */
  172. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
  173. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes for initial data */
  174. /*
  175. * SMSC911x Ethernet
  176. */
  177. #if defined(CONFIG_CMD_NET)
  178. #define CONFIG_NET_MULTI
  179. #define CONFIG_SMC911X
  180. #define CONFIG_SMC911X_32_BIT
  181. #define CONFIG_SMC911X_BASE 0x2C000000
  182. #endif /* (CONFIG_CMD_NET) */
  183. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  184. #define CONFIG_SYS_INIT_SP_ADDR (LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE)
  185. #endif /* __CONFIG_H */