meesc.h 6.4 KB

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  1. /*
  2. * (C) Copyright 2007-2008
  3. * Stelian Pop <stelian.pop@leadtechdesign.com>
  4. * Lead Tech Design <www.leadtechdesign.com>
  5. *
  6. * (C) Copyright 2009-2011
  7. * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
  8. * esd electronic system design gmbh <www.esd.eu>
  9. *
  10. * Configuation settings for the esd MEESC board.
  11. *
  12. * See file CREDITS for list of people who contributed to this
  13. * project.
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License as
  17. * published by the Free Software Foundation; either version 2 of
  18. * the License, or (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28. * MA 02111-1307 USA
  29. */
  30. #ifndef __CONFIG_H
  31. #define __CONFIG_H
  32. /*
  33. * SoC must be defined first, before hardware.h is included.
  34. * In this case SoC is defined in boards.cfg.
  35. */
  36. #include <asm/hardware.h>
  37. /*
  38. * Warning: changing CONFIG_SYS_TEXT_BASE requires
  39. * adapting the initial boot program.
  40. * Since the linker has to swallow that define, we must use a pure
  41. * hex number here!
  42. */
  43. #define CONFIG_SYS_TEXT_BASE 0x20002000
  44. /* ARM asynchronous clock */
  45. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
  46. #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
  47. #define CONFIG_SYS_HZ 1000 /* decrementer freq */
  48. /* Misc CPU related */
  49. #define CONFIG_SKIP_LOWLEVEL_INIT
  50. #define CONFIG_ARCH_CPU_INIT
  51. #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
  52. #define CONFIG_SETUP_MEMORY_TAGS
  53. #define CONFIG_INITRD_TAG
  54. #define CONFIG_SERIAL_TAG
  55. #define CONFIG_REVISION_TAG
  56. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  57. #define CONFIG_MISC_INIT_R /* Call misc_init_r */
  58. #undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
  59. #define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
  60. #define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
  61. #define CONFIG_PREBOOT /* enable preboot variable */
  62. /*
  63. * Hardware drivers
  64. */
  65. /* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
  66. #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
  67. /* general purpose I/O */
  68. #define CONFIG_AT91_GPIO
  69. /* Console output */
  70. #define CONFIG_ATMEL_USART
  71. #define CONFIG_USART_BASE ATMEL_BASE_DBGU
  72. #define CONFIG_USART_ID ATMEL_ID_SYS
  73. #define CONFIG_BAUDRATE 115200
  74. #define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600}
  75. #define CONFIG_BOOTDELAY 3
  76. #define CONFIG_ZERO_BOOTDELAY_CHECK
  77. /*
  78. * BOOTP options
  79. */
  80. #define CONFIG_BOOTP_BOOTFILESIZE
  81. #define CONFIG_BOOTP_BOOTPATH
  82. #define CONFIG_BOOTP_GATEWAY
  83. #define CONFIG_BOOTP_HOSTNAME
  84. /*
  85. * Command line configuration.
  86. */
  87. #include <config_cmd_default.h>
  88. #undef CONFIG_CMD_BDI
  89. #undef CONFIG_CMD_FPGA
  90. #undef CONFIG_CMD_LOADS
  91. #undef CONFIG_CMD_IMLS
  92. #define CONFIG_CMD_PING
  93. #define CONFIG_CMD_DHCP
  94. #define CONFIG_CMD_NAND
  95. #define CONFIG_CMD_USB
  96. /* LED */
  97. #define CONFIG_AT91_LED
  98. /*
  99. * SDRAM: 1 bank, min 32, max 128 MB
  100. * Initialized before u-boot gets started.
  101. */
  102. #define CONFIG_NR_DRAM_BANKS 1
  103. #define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
  104. #define CONFIG_SYS_SDRAM_SIZE 0x02000000
  105. #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
  106. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
  107. #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
  108. /*
  109. * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
  110. * leaving the correct space for initial global data structure above
  111. * that address while providing maximum stack area below.
  112. */
  113. #define CONFIG_SYS_INIT_SP_ADDR \
  114. (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
  115. /* DataFlash */
  116. #ifdef CONFIG_SYS_USE_DATAFLASH
  117. # define CONFIG_ATMEL_DATAFLASH_SPI
  118. # define CONFIG_HAS_DATAFLASH
  119. # define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
  120. # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
  121. # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
  122. # define AT91_SPI_CLK 15000000
  123. # define DATAFLASH_TCSS (0x1a << 16)
  124. # define DATAFLASH_TCHS (0x1 << 24)
  125. #endif
  126. /* NOR flash is not populated, disable it */
  127. #define CONFIG_SYS_NO_FLASH
  128. /* NAND flash */
  129. #ifdef CONFIG_CMD_NAND
  130. # define CONFIG_NAND_ATMEL
  131. # define CONFIG_SYS_MAX_NAND_DEVICE 1
  132. # define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
  133. # define CONFIG_SYS_NAND_DBW_8
  134. # define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  135. # define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  136. # define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
  137. # define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
  138. # define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
  139. #endif
  140. /* Ethernet */
  141. #define CONFIG_MACB
  142. #define CONFIG_RMII
  143. #define CONFIG_FIT
  144. #define CONFIG_NET_RETRY_COUNT 20
  145. #undef CONFIG_RESET_PHY_R
  146. /* USB */
  147. #define CONFIG_USB_ATMEL
  148. #define CONFIG_USB_OHCI_NEW
  149. #define CONFIG_DOS_PARTITION
  150. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  151. #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
  152. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
  153. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
  154. /* CAN */
  155. #define CONFIG_AT91_CAN
  156. /* hw-controller addresses */
  157. #define CONFIG_ET1100_BASE 0x70000000
  158. #ifdef CONFIG_SYS_USE_DATAFLASH
  159. /* bootstrap + u-boot + env in dataflash on CS0 */
  160. # define CONFIG_ENV_IS_IN_DATAFLASH
  161. # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
  162. 0x8400)
  163. # define CONFIG_ENV_OFFSET 0x4200
  164. # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
  165. CONFIG_ENV_OFFSET)
  166. # define CONFIG_ENV_SIZE 0x4200
  167. #elif CONFIG_SYS_USE_NANDFLASH
  168. /* bootstrap + u-boot + env + linux in nandflash */
  169. # define CONFIG_ENV_IS_IN_NAND 1
  170. # define CONFIG_ENV_OFFSET 0xC0000
  171. # define CONFIG_ENV_SIZE 0x20000
  172. #endif
  173. #define CONFIG_SYS_PROMPT "=> "
  174. #define CONFIG_SYS_CBSIZE 512
  175. #define CONFIG_SYS_MAXARGS 16
  176. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  177. sizeof(CONFIG_SYS_PROMPT) + 16)
  178. #define CONFIG_SYS_LONGHELP
  179. #define CONFIG_CMDLINE_EDITING
  180. /*
  181. * Size of malloc() pool
  182. */
  183. #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
  184. 128*1024, 0x1000)
  185. #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
  186. #ifdef CONFIG_USE_IRQ
  187. # error CONFIG_USE_IRQ not supported
  188. #endif
  189. #endif