imx27lite-common.h 6.8 KB

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  1. /*
  2. * Copyright (C) 2010 Heiko Schocher <hs@denx.de>
  3. *
  4. * based on:
  5. * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #ifndef __IMX27LITE_COMMON_CONFIG_H
  23. #define __IMX27LITE_COMMON_CONFIG_H
  24. /*
  25. * SoC Configuration
  26. */
  27. #define CONFIG_ARM926EJS /* arm926ejs CPU core */
  28. #define CONFIG_MX27
  29. #define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
  30. #define CONFIG_SYS_HZ 1000
  31. #define CONFIG_DISPLAY_BOARDINFO
  32. #define CONFIG_DISPLAY_CPUINFO
  33. #define CONFIG_SYS_TEXT_BASE 0xc0000000
  34. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  35. #define CONFIG_SETUP_MEMORY_TAGS 1
  36. #define CONFIG_INITRD_TAG 1
  37. /*
  38. * Lowlevel configuration
  39. */
  40. #define SDRAM_ESDCFG_REGISTER_VAL(cas) \
  41. (ESDCFG_TRC(10) | \
  42. ESDCFG_TRCD(3) | \
  43. ESDCFG_TCAS(cas) | \
  44. ESDCFG_TRRD(1) | \
  45. ESDCFG_TRAS(5) | \
  46. ESDCFG_TWR | \
  47. ESDCFG_TMRD(2) | \
  48. ESDCFG_TRP(2) | \
  49. ESDCFG_TXP(3))
  50. #define SDRAM_ESDCTL_REGISTER_VAL \
  51. (ESDCTL_PRCT(0) | \
  52. ESDCTL_BL | \
  53. ESDCTL_PWDT(0) | \
  54. ESDCTL_SREFR(3) | \
  55. ESDCTL_DSIZ_32 | \
  56. ESDCTL_COL10 | \
  57. ESDCTL_ROW13 | \
  58. ESDCTL_SDE)
  59. #define SDRAM_ALL_VAL 0xf00
  60. #define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */
  61. #define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000
  62. #define MPCTL0_VAL 0x1ef15d5
  63. #define SPCTL0_VAL 0x043a1c09
  64. #define CSCR_VAL 0x33f08107
  65. #define PCDR0_VAL 0x120470c3
  66. #define PCDR1_VAL 0x03030303
  67. #define PCCR0_VAL 0xffffffff
  68. #define PCCR1_VAL 0xfffffffc
  69. #define AIPI1_PSR0_VAL 0x20040304
  70. #define AIPI1_PSR1_VAL 0xdffbfcfb
  71. #define AIPI2_PSR0_VAL 0x07ffc200
  72. #define AIPI2_PSR1_VAL 0xffffffff
  73. /*
  74. * Memory Info
  75. */
  76. /* malloc() len */
  77. #define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
  78. /* memtest start address */
  79. #define CONFIG_SYS_MEMTEST_START 0xA0000000
  80. #define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */
  81. #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
  82. #define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
  83. #define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
  84. #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
  85. /*
  86. * Serial Driver info
  87. */
  88. #define CONFIG_MXC_UART
  89. #define CONFIG_SYS_MX27_UART1
  90. #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
  91. #define CONFIG_BAUDRATE 115200 /* Default baud rate */
  92. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  93. /*
  94. * Flash & Environment
  95. */
  96. #define CONFIG_ENV_IS_IN_FLASH
  97. #define CONFIG_FLASH_CFI_DRIVER
  98. #define CONFIG_SYS_FLASH_CFI
  99. /* Use buffered writes (~10x faster) */
  100. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
  101. /* Use hardware sector protection */
  102. #define CONFIG_SYS_FLASH_PROTECTION 1
  103. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
  104. /* CS2 Base address */
  105. #define PHYS_FLASH_1 0xc0000000
  106. /* Flash Base for U-Boot */
  107. #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
  108. #define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \
  109. CONFIG_SYS_FLASH_SECT_SZ)
  110. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  111. #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
  112. #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
  113. /* Address and size of Redundant Environment Sector */
  114. #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
  115. #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
  116. /*
  117. * Ethernet
  118. */
  119. #define CONFIG_FEC_MXC
  120. #define CONFIG_FEC_MXC_PHYADDR 0x1f
  121. #define CONFIG_MII
  122. /*
  123. * MTD
  124. */
  125. #define CONFIG_FLASH_CFI_MTD
  126. #define CONFIG_MTD_DEVICE
  127. /*
  128. * NAND
  129. */
  130. #define CONFIG_NAND_MXC
  131. #define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
  132. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  133. #define CONFIG_SYS_NAND_BASE 0xd8000000
  134. #define CONFIG_JFFS2_NAND
  135. #define CONFIG_MXC_NAND_HWECC
  136. #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
  137. /*
  138. * SD/MMC
  139. */
  140. #define CONFIG_MMC
  141. #define CONFIG_GENERIC_MMC
  142. #define CONFIG_MXC_MMC
  143. #define CONFIG_DOS_PARTITION
  144. /*
  145. * MTD partitions
  146. */
  147. #define CONFIG_CMD_MTDPARTS
  148. /*
  149. * U-Boot general configuration
  150. */
  151. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  152. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  153. /* Print buffer sz */
  154. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  155. sizeof(CONFIG_SYS_PROMPT) + 16)
  156. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  157. /* Boot Argument Buffer Size */
  158. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  159. #define CONFIG_CMDLINE_EDITING
  160. #define CONFIG_SYS_LONGHELP
  161. /*
  162. * U-Boot commands
  163. */
  164. #include <config_cmd_default.h>
  165. #define CONFIG_CMD_ASKENV
  166. #define CONFIG_CMD_CACHE
  167. #define CONFIG_CMD_DHCP
  168. #define CONFIG_CMD_DIAG
  169. #define CONFIG_CMD_FAT
  170. #define CONFIG_CMD_JFFS2
  171. #define CONFIG_CMD_MII
  172. #define CONFIG_CMD_MMC
  173. #define CONFIG_CMD_NAND
  174. #define CONFIG_CMD_PING
  175. #define CONFIG_BOOTDELAY 5
  176. #define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
  177. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  178. #define xstr(s) str(s)
  179. #define str(s) #s
  180. #define CONFIG_EXTRA_ENV_SETTINGS \
  181. "netdev=eth0\0" \
  182. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  183. "nfsroot=${serverip}:${rootpath}\0" \
  184. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  185. "addip=setenv bootargs ${bootargs} " \
  186. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  187. ":${hostname}:${netdev}:off panic=1\0" \
  188. "addtty=setenv bootargs ${bootargs}" \
  189. " console=ttymxc0,${baudrate}\0" \
  190. "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  191. "addmisc=setenv bootargs ${bootargs}\0" \
  192. "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
  193. "kernel_addr_r=a0800000\0" \
  194. "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
  195. "rootpath=/opt/eldk-4.2-arm/arm\0" \
  196. "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
  197. "run nfsargs addip addtty addmtd addmisc;" \
  198. "bootm\0" \
  199. "bootcmd=run net_nfs\0" \
  200. "load=tftp ${loadaddr} ${u-boot}\0" \
  201. "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
  202. " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
  203. " +${filesize};cp.b ${fileaddr} " \
  204. xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
  205. "upd=run load update\0" \
  206. "mtdids=" MTDIDS_DEFAULT "\0" \
  207. "mtdparts=" MTDPARTS_DEFAULT "\0" \
  208. /* additions for new relocation code, must be added to all boards */
  209. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  210. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
  211. GENERATED_GBL_DATA_SIZE)
  212. #endif /* __IMX27LITE_COMMON_CONFIG_H */