M5253DEMO.h 8.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265
  1. /*
  2. * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  3. * Hayden Fraser (Hayden.Fraser@freescale.com)
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef _M5253DEMO_H
  24. #define _M5253DEMO_H
  25. #define CONFIG_MCF52x2 /* define processor family */
  26. #define CONFIG_M5253 /* define processor type */
  27. #define CONFIG_M5253DEMO /* define board type */
  28. #define CONFIG_MCFTMR
  29. #define CONFIG_MCFUART
  30. #define CONFIG_SYS_UART_PORT (0)
  31. #define CONFIG_BAUDRATE 115200
  32. #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
  33. #undef CONFIG_WATCHDOG /* disable watchdog */
  34. #define CONFIG_BOOTDELAY 5
  35. /* Configuration for environment
  36. * Environment is embedded in u-boot in the second sector of the flash
  37. */
  38. #ifdef CONFIG_MONITOR_IS_IN_RAM
  39. # define CONFIG_ENV_OFFSET 0x4000
  40. # define CONFIG_ENV_SECT_SIZE 0x1000
  41. # define CONFIG_ENV_IS_IN_FLASH 1
  42. #else
  43. # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x4000)
  44. # define CONFIG_ENV_SECT_SIZE 0x1000
  45. # define CONFIG_ENV_IS_IN_FLASH 1
  46. #endif
  47. /*
  48. * Command line configuration.
  49. */
  50. #include <config_cmd_default.h>
  51. #define CONFIG_CMD_CACHE
  52. #define CONFIG_CMD_LOADB
  53. #define CONFIG_CMD_LOADS
  54. #define CONFIG_CMD_EXT2
  55. #define CONFIG_CMD_FAT
  56. #define CONFIG_CMD_IDE
  57. #define CONFIG_CMD_MEMORY
  58. #define CONFIG_CMD_MISC
  59. #define CONFIG_CMD_PING
  60. #ifdef CONFIG_CMD_IDE
  61. /* ATA */
  62. # define CONFIG_DOS_PARTITION
  63. # define CONFIG_MAC_PARTITION
  64. # define CONFIG_IDE_RESET 1
  65. # define CONFIG_IDE_PREINIT 1
  66. # define CONFIG_ATAPI
  67. # undef CONFIG_LBA48
  68. # define CONFIG_SYS_IDE_MAXBUS 1
  69. # define CONFIG_SYS_IDE_MAXDEVICE 2
  70. # define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800)
  71. # define CONFIG_SYS_ATA_IDE0_OFFSET 0
  72. # define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */
  73. # define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
  74. # define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
  75. # define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
  76. #endif
  77. #define CONFIG_DRIVER_DM9000
  78. #ifdef CONFIG_DRIVER_DM9000
  79. # define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300)
  80. # define DM9000_IO CONFIG_DM9000_BASE
  81. # define DM9000_DATA (CONFIG_DM9000_BASE + 4)
  82. # undef CONFIG_DM9000_DEBUG
  83. # define CONFIG_DM9000_BYTE_SWAPPED
  84. # define CONFIG_OVERWRITE_ETHADDR_ONCE
  85. # define CONFIG_EXTRA_ENV_SETTINGS \
  86. "netdev=eth0\0" \
  87. "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
  88. "loadaddr=10000\0" \
  89. "u-boot=u-boot.bin\0" \
  90. "load=tftp ${loadaddr) ${u-boot}\0" \
  91. "upd=run load; run prog\0" \
  92. "prog=prot off 0xff800000 0xff82ffff;" \
  93. "era 0xff800000 0xff82ffff;" \
  94. "cp.b ${loadaddr} 0xff800000 ${filesize};" \
  95. "save\0" \
  96. ""
  97. #endif
  98. #define CONFIG_HOSTNAME M5253DEMO
  99. /* I2C */
  100. #define CONFIG_FSL_I2C
  101. #define CONFIG_HARD_I2C /* I2C with hw support */
  102. #define CONFIG_SYS_I2C_SPEED 80000
  103. #define CONFIG_SYS_I2C_SLAVE 0x7F
  104. #define CONFIG_SYS_I2C_OFFSET 0x00000280
  105. #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
  106. #define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C))
  107. #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF)
  108. #define CONFIG_SYS_I2C_PINMUX_SET (0)
  109. #define CONFIG_SYS_PROMPT "=> "
  110. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  111. #if defined(CONFIG_CMD_KGDB)
  112. # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  113. #else
  114. # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  115. #endif
  116. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  117. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  118. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  119. #define CONFIG_SYS_LOAD_ADDR 0x00100000
  120. #define CONFIG_SYS_MEMTEST_START 0x400
  121. #define CONFIG_SYS_MEMTEST_END 0x380000
  122. #define CONFIG_SYS_HZ 1000
  123. #undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */
  124. #define CONFIG_SYS_FAST_CLK
  125. #ifdef CONFIG_SYS_FAST_CLK
  126. # define CONFIG_SYS_PLLCR 0x1243E054
  127. # define CONFIG_SYS_CLK 140000000
  128. #else
  129. # define CONFIG_SYS_PLLCR 0x135a4140
  130. # define CONFIG_SYS_CLK 70000000
  131. #endif
  132. /*
  133. * Low Level Configuration Settings
  134. * (address mappings, register initial values, etc.)
  135. * You should know what you are doing if you make changes here.
  136. */
  137. #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
  138. #define CONFIG_SYS_MBAR2 0x80000000 /* Module Base Addrs 2 */
  139. /*
  140. * Definitions for initial stack pointer and data area (in DPRAM)
  141. */
  142. #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
  143. #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
  144. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  145. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  146. /*
  147. * Start addresses for the final memory configuration
  148. * (Set up by the startup code)
  149. * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  150. */
  151. #define CONFIG_SYS_SDRAM_BASE 0x00000000
  152. #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
  153. #ifdef CONFIG_MONITOR_IS_IN_RAM
  154. # define CONFIG_SYS_MONITOR_BASE 0x20000
  155. #else
  156. # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
  157. #endif
  158. #define CONFIG_SYS_MONITOR_LEN 0x40000
  159. #define CONFIG_SYS_MALLOC_LEN (256 << 10)
  160. #define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
  161. /*
  162. * For booting Linux, the board info and command line data
  163. * have to be in the first 8 MB of memory, since this is
  164. * the maximum mapped by the Linux kernel during initialization ??
  165. */
  166. #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
  167. #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
  168. /* FLASH organization */
  169. #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE)
  170. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  171. #define CONFIG_SYS_MAX_FLASH_SECT 2048 /* max number of sectors on one chip */
  172. #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
  173. #define FLASH_SST6401B 0x200
  174. #define SST_ID_xF6401B 0x236D236D
  175. #undef CONFIG_SYS_FLASH_CFI
  176. #ifdef CONFIG_SYS_FLASH_CFI
  177. /*
  178. * Unable to use CFI driver, due to incompatible sector erase command by SST.
  179. * Amd/Atmel use 0x30 for sector erase, SST use 0x50.
  180. * 0x30 is block erase in SST
  181. */
  182. # define CONFIG_FLASH_CFI_DRIVER 1
  183. # define CONFIG_SYS_FLASH_SIZE 0x800000
  184. # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
  185. # define CONFIG_FLASH_CFI_LEGACY
  186. #else
  187. # define CONFIG_SYS_SST_SECT 2048
  188. # define CONFIG_SYS_SST_SECTSZ 0x1000
  189. # define CONFIG_SYS_FLASH_WRITE_TOUT 500
  190. #endif
  191. /* Cache Configuration */
  192. #define CONFIG_SYS_CACHELINE_SIZE 16
  193. #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  194. CONFIG_SYS_INIT_RAM_SIZE - 8)
  195. #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  196. CONFIG_SYS_INIT_RAM_SIZE - 4)
  197. #define CONFIG_SYS_ICACHE_INV (CF_CACR_DCM)
  198. #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \
  199. CF_ADDRMASK(8) | \
  200. CF_ACR_EN | CF_ACR_SM_ALL)
  201. #define CONFIG_SYS_CACHE_ACR1 (CONFIG_SYS_SDRAM_BASE | \
  202. CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
  203. CF_ACR_EN | CF_ACR_SM_ALL)
  204. #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \
  205. CF_CACR_DBWE)
  206. /* Port configuration */
  207. #define CONFIG_SYS_FECI2C 0xF0
  208. #define CONFIG_SYS_CS0_BASE 0xFF800000
  209. #define CONFIG_SYS_CS0_MASK 0x007F0021
  210. #define CONFIG_SYS_CS0_CTRL 0x00001D80
  211. #define CONFIG_SYS_CS1_BASE 0xE0000000
  212. #define CONFIG_SYS_CS1_MASK 0x00000001
  213. #define CONFIG_SYS_CS1_CTRL 0x00003DD8
  214. /*-----------------------------------------------------------------------
  215. * Port configuration
  216. */
  217. #define CONFIG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */
  218. #define CONFIG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */
  219. #define CONFIG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */
  220. #define CONFIG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */
  221. #define CONFIG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */
  222. #define CONFIG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */
  223. #define CONFIG_SYS_GPIO1_LED 0x00400000 /* user led */
  224. #endif /* _M5253DEMO_H */