pm9g45.c 4.7 KB

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  1. /*
  2. * (C) Copyright 2010
  3. * Ilko Iliev <iliev@ronetix.at>
  4. * Asen Dimov <dimov@ronetix.at>
  5. * Ronetix GmbH <www.ronetix.at>
  6. *
  7. * (C) Copyright 2007-2008
  8. * Stelian Pop <stelian.pop@leadtechdesign.com>
  9. * Lead Tech Design <www.leadtechdesign.com>
  10. *
  11. * See file CREDITS for list of people who contributed to this
  12. * project.
  13. *
  14. * This program is free software; you can redistribute it and/or
  15. * modify it under the terms of the GNU General Public License as
  16. * published by the Free Software Foundation; either version 2 of
  17. * the License, or (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27. * MA 02111-1307 USA
  28. */
  29. #include <common.h>
  30. #include <asm/sizes.h>
  31. #include <asm/io.h>
  32. #include <asm/arch/at91sam9_smc.h>
  33. #include <asm/arch/at91_common.h>
  34. #include <asm/arch/at91_pmc.h>
  35. #include <asm/arch/at91_rstc.h>
  36. #include <asm/arch/at91_matrix.h>
  37. #include <asm/arch/gpio.h>
  38. #include <asm/arch/clk.h>
  39. #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
  40. #include <net.h>
  41. #endif
  42. #include <netdev.h>
  43. DECLARE_GLOBAL_DATA_PTR;
  44. /*
  45. * Miscelaneous platform dependent initialisations
  46. */
  47. #ifdef CONFIG_CMD_NAND
  48. static void pm9g45_nand_hw_init(void)
  49. {
  50. unsigned long csa;
  51. struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  52. struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  53. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  54. /* Enable CS3 */
  55. csa = readl(&matrix->ccr[6]) | AT91_MATRIX_CSA_EBI_CS3A;
  56. writel(csa, &matrix->ccr[6]);
  57. /* Configure SMC CS3 for NAND/SmartMedia */
  58. writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  59. AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  60. &smc->cs[3].setup);
  61. writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
  62. AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
  63. &smc->cs[3].pulse);
  64. writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
  65. &smc->cs[3].cycle);
  66. writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  67. AT91_SMC_MODE_EXNW_DISABLE |
  68. AT91_SMC_MODE_DBW_8 |
  69. AT91_SMC_MODE_TDF_CYCLE(3),
  70. &smc->cs[3].mode);
  71. writel(1 << ATMEL_ID_PIOC, &pmc->pcer);
  72. #ifdef CONFIG_SYS_NAND_READY_PIN
  73. /* Configure RDY/BSY */
  74. at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  75. #endif
  76. /* Enable NandFlash */
  77. at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  78. }
  79. #endif
  80. #ifdef CONFIG_MACB
  81. static void pm9g45_macb_hw_init(void)
  82. {
  83. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  84. /*
  85. * PD2 enables the 50MHz oscillator for Ethernet PHY
  86. * 1 - enable
  87. * 0 - disable
  88. */
  89. at91_set_pio_output(AT91_PIO_PORTD, 2, 1);
  90. at91_set_pio_value(AT91_PIO_PORTD, 2, 1); /* 1- enable, 0 - disable */
  91. /* Enable clock */
  92. writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
  93. /*
  94. * Disable pull-up on:
  95. * RXDV (PA15) => PHY normal mode (not Test mode)
  96. * ERX0 (PA12) => PHY ADDR0
  97. * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
  98. *
  99. * PHY has internal pull-down
  100. */
  101. at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
  102. at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
  103. at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
  104. /* Re-enable pull-up */
  105. at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
  106. at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
  107. at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
  108. at91_macb_hw_init();
  109. }
  110. #endif
  111. int board_init(void)
  112. {
  113. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  114. /* Enable Ctrlc */
  115. console_init_f();
  116. writel((1 << ATMEL_ID_PIOA) |
  117. (1 << ATMEL_ID_PIOB) |
  118. (1 << ATMEL_ID_PIOC) |
  119. (1 << ATMEL_ID_PIODE), &pmc->pcer);
  120. /* arch number of AT91SAM9M10G45EK-Board */
  121. gd->bd->bi_arch_number = MACH_TYPE_PM9G45;
  122. /* adress of boot parameters */
  123. gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  124. at91_seriald_hw_init();
  125. #ifdef CONFIG_CMD_NAND
  126. pm9g45_nand_hw_init();
  127. #endif
  128. #ifdef CONFIG_MACB
  129. pm9g45_macb_hw_init();
  130. #endif
  131. return 0;
  132. }
  133. int dram_init(void)
  134. {
  135. /* dram_init must store complete ramsize in gd->ram_size */
  136. gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
  137. PHYS_SDRAM_SIZE);
  138. return 0;
  139. }
  140. void dram_init_banksize(void)
  141. {
  142. gd->bd->bi_dram[0].start = PHYS_SDRAM;
  143. gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
  144. }
  145. #ifdef CONFIG_RESET_PHY_R
  146. void reset_phy(void)
  147. {
  148. #ifdef CONFIG_MACB
  149. /*
  150. * Initialize ethernet HW addr prior to starting Linux,
  151. * needed for nfsroot
  152. */
  153. eth_init(gd->bd);
  154. #endif
  155. }
  156. #endif
  157. int board_eth_init(bd_t *bis)
  158. {
  159. int rc = 0;
  160. #ifdef CONFIG_MACB
  161. rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x01);
  162. #endif
  163. return rc;
  164. }