pdnb3.c 5.5 KB

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  1. /*
  2. * (C) Copyright 2006
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <command.h>
  25. #include <malloc.h>
  26. #include <asm/arch/ixp425.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. /* predefine these here for FPGA programming (before including fpga.c) */
  29. #define SET_FPGA(data) *IXP425_GPIO_GPOUTR = (data)
  30. #define FPGA_DONE_STATE (*IXP425_GPIO_GPINR & CONFIG_SYS_FPGA_DONE)
  31. #define FPGA_INIT_STATE (*IXP425_GPIO_GPINR & CONFIG_SYS_FPGA_INIT)
  32. #define OLD_VAL old_val
  33. static unsigned long old_val = 0;
  34. /*
  35. * include common fpga code (for prodrive boards)
  36. */
  37. #include "../common/fpga.c"
  38. /*
  39. * Miscelaneous platform dependent initialisations
  40. */
  41. int board_init(void)
  42. {
  43. /* arch number of PDNB3 */
  44. gd->bd->bi_arch_number = MACH_TYPE_PDNB3;
  45. /* adress of boot parameters */
  46. gd->bd->bi_boot_params = 0x00000100;
  47. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_FPGA_RESET);
  48. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_FPGA_RESET);
  49. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SYS_RUNNING);
  50. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SYS_RUNNING);
  51. /*
  52. * Setup GPIO's for FPGA programming
  53. */
  54. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PRG);
  55. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_CLK);
  56. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DATA);
  57. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PRG);
  58. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_CLK);
  59. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DATA);
  60. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_INIT);
  61. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DONE);
  62. /*
  63. * Setup GPIO's for interrupts
  64. */
  65. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA);
  66. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA);
  67. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB);
  68. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB);
  69. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RESTORE_INT);
  70. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RESTORE_INT);
  71. GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RESTART_INT);
  72. GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RESTART_INT);
  73. /*
  74. * Setup GPIO's for 33MHz clock output
  75. */
  76. *IXP425_GPIO_GPCLKR = 0x01FF0000;
  77. GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_CLK_33M);
  78. /*
  79. * Setup other chip select's
  80. */
  81. *IXP425_EXP_CS1 = CONFIG_SYS_EXP_CS1;
  82. return 0;
  83. }
  84. /*
  85. * Check Board Identity
  86. */
  87. int checkboard(void)
  88. {
  89. char buf[64];
  90. int i = getenv_f("serial#", buf, sizeof(buf));
  91. puts("Board: PDNB3");
  92. if (i > 0) {
  93. puts(", serial# ");
  94. puts(buf);
  95. }
  96. putc('\n');
  97. return (0);
  98. }
  99. int dram_init(void)
  100. {
  101. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  102. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  103. return (0);
  104. }
  105. int do_fpga_boot(unsigned char *fpgadata)
  106. {
  107. unsigned char *dst;
  108. int status;
  109. int index;
  110. int i;
  111. ulong len = CONFIG_SYS_MALLOC_LEN;
  112. /*
  113. * Setup GPIO's for FPGA programming
  114. */
  115. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PRG);
  116. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_CLK);
  117. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DATA);
  118. /*
  119. * Save value so no readback is required upon programming
  120. */
  121. old_val = *IXP425_GPIO_GPOUTR;
  122. /*
  123. * First try to decompress fpga image (gzip compressed?)
  124. */
  125. dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
  126. if (gunzip(dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
  127. printf("Error: Image has to be gzipp'ed!\n");
  128. return -1;
  129. }
  130. status = fpga_boot(dst, len);
  131. if (status != 0) {
  132. printf("\nFPGA: Booting failed ");
  133. switch (status) {
  134. case ERROR_FPGA_PRG_INIT_LOW:
  135. printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
  136. break;
  137. case ERROR_FPGA_PRG_INIT_HIGH:
  138. printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
  139. break;
  140. case ERROR_FPGA_PRG_DONE:
  141. printf("(Timeout: DONE not high after programming FPGA)\n ");
  142. break;
  143. }
  144. /* display infos on fpgaimage */
  145. index = 15;
  146. for (i=0; i<4; i++) {
  147. len = dst[index];
  148. printf("FPGA: %s\n", &(dst[index+1]));
  149. index += len+3;
  150. }
  151. putc ('\n');
  152. /* delayed reboot */
  153. for (i=5; i>0; i--) {
  154. printf("Rebooting in %2d seconds \r",i);
  155. for (index=0;index<1000;index++)
  156. udelay(1000);
  157. }
  158. putc('\n');
  159. do_reset(NULL, 0, 0, NULL);
  160. }
  161. puts("FPGA: ");
  162. /* display infos on fpgaimage */
  163. index = 15;
  164. for (i=0; i<4; i++) {
  165. len = dst[index];
  166. printf("%s ", &(dst[index+1]));
  167. index += len+3;
  168. }
  169. putc('\n');
  170. free(dst);
  171. /*
  172. * Reset FPGA
  173. */
  174. GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_FPGA_RESET);
  175. udelay(10);
  176. GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_FPGA_RESET);
  177. return (0);
  178. }
  179. int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  180. {
  181. ulong addr;
  182. if (argc < 2)
  183. return cmd_usage(cmdtp);
  184. addr = simple_strtoul(argv[1], NULL, 16);
  185. return do_fpga_boot((unsigned char *)addr);
  186. }
  187. U_BOOT_CMD(
  188. fpga, 2, 0, do_fpga,
  189. "boot FPGA",
  190. "address size\n - boot FPGA with gzipped image at <address>"
  191. );
  192. #if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
  193. extern struct pci_controller hose;
  194. extern void pci_ixp_init(struct pci_controller * hose);
  195. void pci_init_board(void)
  196. {
  197. extern void pci_ixp_init (struct pci_controller *hose);
  198. pci_ixp_init(&hose);
  199. }
  200. #endif