init.S 2.5 KB

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  1. /*
  2. * (C) Copyright 2006
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <asm-offsets.h>
  24. #include <ppc_asm.tmpl>
  25. #include <asm/mmu.h>
  26. #include <config.h>
  27. /**************************************************************************
  28. * TLB TABLE
  29. *
  30. * This table is used by the cpu boot code to setup the initial tlb
  31. * entries. Rather than make broad assumptions in the cpu source tree,
  32. * this table lets each board set things up however they like.
  33. *
  34. * Pointer to the table is returned in r1
  35. *
  36. *************************************************************************/
  37. .section .bootpg,"ax"
  38. .globl tlbtab
  39. tlbtab:
  40. tlbtab_start
  41. /*
  42. * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
  43. * speed up boot process. It is patched after relocation to enable SA_I
  44. */
  45. tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_RWX | SA_G/*|SA_I*/)
  46. /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
  47. tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G )
  48. /*
  49. * TLB entries for SDRAM are not needed on this platform.
  50. * They are dynamically generated in the SPD DDR detection
  51. * routine.
  52. */
  53. tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_RW | SA_IG )
  54. /* PCI */
  55. tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_RW | SA_IG )
  56. tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_RW | SA_IG )
  57. tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_RW | SA_IG )
  58. tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_RW | SA_IG )
  59. /* USB 2.0 Device */
  60. tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_RW | SA_IG )
  61. tlbtab_end