common.h 2.6 KB

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  1. /*
  2. * (C) Copyright 2008
  3. * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of
  8. * the License, or (at your option) any later version.
  9. */
  10. #ifndef __KEYMILE_COMMON_H
  11. #define __KEYMILE_COMMON_H
  12. #define WRG_RESET 0x80
  13. #define H_OPORTS_14 0x40
  14. #define WRG_LED 0x02
  15. #define WRL_BOOT 0x01
  16. #define H_OPORTS_SCC4_ENA 0x10
  17. #define H_OPORTS_SCC4_FD_ENA 0x04
  18. #define H_OPORTS_FCC1_PW_DWN 0x01
  19. #define PIGGY_PRESENT 0x80
  20. struct km_bec_fpga {
  21. unsigned char id;
  22. unsigned char rev;
  23. unsigned char oprth;
  24. unsigned char oprtl;
  25. unsigned char res1[3];
  26. unsigned char bprth;
  27. unsigned char bprtl;
  28. unsigned char res2[6];
  29. unsigned char prst;
  30. unsigned char res3[0xfff0];
  31. unsigned char pgy_id;
  32. unsigned char pgy_rev;
  33. unsigned char pgy_outputs;
  34. unsigned char pgy_eth;
  35. };
  36. #define BFTICU_DIPSWITCH_MASK 0x0f
  37. /*
  38. * BFTICU FPGA iomap
  39. * BFTICU is used on mgcoge and mgocge3ne
  40. */
  41. struct bfticu_iomap {
  42. u8 xi_ena; /* General defect enable */
  43. u8 pack1[3];
  44. u8 en_csn;
  45. u8 pack2;
  46. u8 safe_mem;
  47. u8 pack3;
  48. u8 id;
  49. u8 pack4;
  50. u8 rev;
  51. u8 build;
  52. u8 p_frc;
  53. u8 p_msk;
  54. u8 pack5[2];
  55. u8 xg_int;
  56. u8 pack6[15];
  57. u8 s_conf;
  58. u8 pack7;
  59. u8 dmx_conf12;
  60. u8 pack8;
  61. u8 s_clkslv;
  62. u8 pack9[11];
  63. u8 d_conf;
  64. u8 d_mask_ca;
  65. u8 d_pll_del;
  66. u8 pack10[16];
  67. u8 t_conf_ca;
  68. u8 t_mask_ca;
  69. u8 pack11[13];
  70. u8 m_def0;
  71. u8 m_def1;
  72. u8 m_def2;
  73. u8 m_def3;
  74. u8 m_def4;
  75. u8 m_def5;
  76. u8 m_def_trap0;
  77. u8 m_def_trap1;
  78. u8 m_def_trap2;
  79. u8 m_def_trap3;
  80. u8 m_def_trap4;
  81. u8 m_def_trap5;
  82. u8 m_mask_def0;
  83. u8 m_mask_def1;
  84. u8 m_mask_def2;
  85. u8 m_mask_def3;
  86. u8 m_mask_def4;
  87. u8 m_mask_def5;
  88. u8 m_def_mask0;
  89. u8 m_def_mask1;
  90. u8 m_def_mask2;
  91. u8 m_def_mask3;
  92. u8 m_def_mask4;
  93. u8 m_def_mask5;
  94. u8 m_def_pri;
  95. u8 pack12[11];
  96. u8 hw_status;
  97. u8 pack13;
  98. u8 hw_control1;
  99. u8 hw_control2;
  100. u8 hw_control3;
  101. u8 pack14[7];
  102. u8 led_on; /* Leds */
  103. u8 pack15;
  104. u8 sfp_control; /* SFP modules */
  105. u8 pack16;
  106. u8 alarm_control; /* Alarm output */
  107. u8 pack17;
  108. u8 icps; /* ICN clock pulse shaping */
  109. u8 mswitch; /* Read mode switch */
  110. u8 pack18[6];
  111. u8 pb_dbug;
  112. };
  113. #if !defined(CONFIG_PIGGY_MAC_ADRESS_OFFSET)
  114. #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 0
  115. #endif
  116. int ethernet_present(void);
  117. int ivm_read_eeprom(void);
  118. int set_km_env(void);
  119. int fdt_set_node_and_value(void *blob,
  120. char *nodename,
  121. char *regname,
  122. void *var,
  123. int size);
  124. int fdt_get_node_and_value(void *blob,
  125. char *nodename,
  126. char *propname,
  127. void **var);
  128. int i2c_soft_read_pin(void);
  129. int i2c_make_abort(void);
  130. #endif /* __KEYMILE_COMMON_H */