cpciiser4.c 4.4 KB

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  1. /*
  2. * (C) Copyright 2000
  3. * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include "cpciiser4.h"
  25. #include <asm/processor.h>
  26. #include <command.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. extern void lxt971_no_sleep(void);
  29. /* ------------------------------------------------------------------------- */
  30. #if 0
  31. #define FPGA_DEBUG
  32. #endif
  33. #if 0
  34. #define FPGA_DEBUG2
  35. #endif
  36. /* fpga configuration data - generated by bin2cc */
  37. const unsigned char fpgadata[] = {
  38. #include "fpgadata.c"
  39. };
  40. /*
  41. * include common fpga code (for esd boards)
  42. */
  43. #include "../common/fpga.c"
  44. int board_early_init_f (void)
  45. {
  46. int index, len, i;
  47. int status;
  48. #ifdef FPGA_DEBUG
  49. /* set up serial port with default baudrate */
  50. (void) get_clocks ();
  51. gd->baudrate = CONFIG_BAUDRATE;
  52. serial_init ();
  53. console_init_f ();
  54. #endif
  55. /*
  56. * Boot onboard FPGA
  57. */
  58. status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
  59. if (status != 0) {
  60. /* booting FPGA failed */
  61. #ifndef FPGA_DEBUG
  62. /* set up serial port with default baudrate */
  63. (void) get_clocks ();
  64. gd->baudrate = CONFIG_BAUDRATE;
  65. serial_init ();
  66. console_init_f ();
  67. #endif
  68. printf ("\nFPGA: Booting failed ");
  69. switch (status) {
  70. case ERROR_FPGA_PRG_INIT_LOW:
  71. printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
  72. break;
  73. case ERROR_FPGA_PRG_INIT_HIGH:
  74. printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
  75. break;
  76. case ERROR_FPGA_PRG_DONE:
  77. printf ("(Timeout: DONE not high after programming FPGA)\n ");
  78. break;
  79. }
  80. /* display infos on fpgaimage */
  81. index = 15;
  82. for (i = 0; i < 4; i++) {
  83. len = fpgadata[index];
  84. printf ("FPGA: %s\n", &(fpgadata[index + 1]));
  85. index += len + 3;
  86. }
  87. putc ('\n');
  88. /* delayed reboot */
  89. for (i = 20; i > 0; i--) {
  90. printf ("Rebooting in %2d seconds \r", i);
  91. for (index = 0; index < 1000; index++)
  92. udelay (1000);
  93. }
  94. putc ('\n');
  95. do_reset (NULL, 0, 0, NULL);
  96. }
  97. /*
  98. * Init FPGA via RESET (read access on CS3)
  99. */
  100. in_8((void *)0xf0200000);
  101. /*
  102. * IRQ 0-15 405GP internally generated; active high; level sensitive
  103. * IRQ 16 405GP internally generated; active low; level sensitive
  104. * IRQ 17-24 RESERVED
  105. * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  106. * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
  107. * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
  108. * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
  109. * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
  110. * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
  111. * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
  112. */
  113. mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
  114. mtdcr (UIC0ER, 0x00000000); /* disable all ints */
  115. mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
  116. /* mtdcr(UIC0PR, 0xFFFFFF81); / set int polarities */
  117. mtdcr (UIC0PR, 0xFFFFFF80); /* set int polarities */
  118. mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
  119. mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
  120. mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
  121. return 0;
  122. }
  123. /* ------------------------------------------------------------------------- */
  124. /*
  125. * Check Board Identity:
  126. */
  127. int checkboard (void)
  128. {
  129. int index;
  130. int len;
  131. char str[64];
  132. int i = getenv_f("serial#", str, sizeof (str));
  133. puts ("Board: ");
  134. if (i == -1) {
  135. puts ("### No HW ID - assuming AR405");
  136. } else {
  137. puts(str);
  138. }
  139. puts ("\nFPGA: ");
  140. /* display infos on fpgaimage */
  141. index = 15;
  142. for (i = 0; i < 4; i++) {
  143. len = fpgadata[index];
  144. printf ("%s ", &(fpgadata[index + 1]));
  145. index += len + 3;
  146. }
  147. putc ('\n');
  148. /*
  149. * Disable sleep mode in LXT971
  150. */
  151. lxt971_no_sleep();
  152. return 0;
  153. }