dockstar.c 4.0 KB

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  1. /*
  2. * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
  3. *
  4. * Based on sheevaplug.c originally written by
  5. * Prafulla Wadaskar <prafulla@marvell.com>
  6. * (C) Copyright 2009
  7. * Marvell Semiconductor <www.marvell.com>
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  25. * MA 02110-1301 USA
  26. */
  27. #include <common.h>
  28. #include <miiphy.h>
  29. #include <asm/arch/kirkwood.h>
  30. #include <asm/arch/mpp.h>
  31. #include "dockstar.h"
  32. DECLARE_GLOBAL_DATA_PTR;
  33. int board_early_init_f(void)
  34. {
  35. /*
  36. * default gpio configuration
  37. * There are maximum 64 gpios controlled through 2 sets of registers
  38. * the below configuration configures mainly initial LED status
  39. */
  40. kw_config_gpio(DOCKSTAR_OE_VAL_LOW,
  41. DOCKSTAR_OE_VAL_HIGH,
  42. DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
  43. /* Multi-Purpose Pins Functionality configuration */
  44. u32 kwmpp_config[] = {
  45. MPP0_NF_IO2,
  46. MPP1_NF_IO3,
  47. MPP2_NF_IO4,
  48. MPP3_NF_IO5,
  49. MPP4_NF_IO6,
  50. MPP5_NF_IO7,
  51. MPP6_SYSRST_OUTn,
  52. MPP7_GPO,
  53. MPP8_UART0_RTS,
  54. MPP9_UART0_CTS,
  55. MPP10_UART0_TXD,
  56. MPP11_UART0_RXD,
  57. MPP12_SD_CLK,
  58. MPP13_SD_CMD,
  59. MPP14_SD_D0,
  60. MPP15_SD_D1,
  61. MPP16_SD_D2,
  62. MPP17_SD_D3,
  63. MPP18_NF_IO0,
  64. MPP19_NF_IO1,
  65. MPP20_GPIO,
  66. MPP21_GPIO,
  67. MPP22_GPIO,
  68. MPP23_GPIO,
  69. MPP24_GPIO,
  70. MPP25_GPIO,
  71. MPP26_GPIO,
  72. MPP27_GPIO,
  73. MPP28_GPIO,
  74. MPP29_TSMP9,
  75. MPP30_GPIO,
  76. MPP31_GPIO,
  77. MPP32_GPIO,
  78. MPP33_GPIO,
  79. MPP34_GPIO,
  80. MPP35_GPIO,
  81. MPP36_GPIO,
  82. MPP37_GPIO,
  83. MPP38_GPIO,
  84. MPP39_GPIO,
  85. MPP40_GPIO,
  86. MPP41_GPIO,
  87. MPP42_GPIO,
  88. MPP43_GPIO,
  89. MPP44_GPIO,
  90. MPP45_GPIO,
  91. MPP46_GPIO,
  92. MPP47_GPIO,
  93. MPP48_GPIO,
  94. MPP49_GPIO,
  95. 0
  96. };
  97. kirkwood_mpp_conf(kwmpp_config);
  98. return 0;
  99. }
  100. int board_init(void)
  101. {
  102. /*
  103. * arch number of board
  104. */
  105. gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR;
  106. /* address of boot parameters */
  107. gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
  108. return 0;
  109. }
  110. #ifdef CONFIG_RESET_PHY_R
  111. /* Configure and enable MV88E1116 PHY */
  112. void reset_phy(void)
  113. {
  114. u16 reg;
  115. u16 devadr;
  116. char *name = "egiga0";
  117. if (miiphy_set_current_dev(name))
  118. return;
  119. /* command to read PHY dev address */
  120. if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
  121. printf("Err..%s could not read PHY dev address\n",
  122. __FUNCTION__);
  123. return;
  124. }
  125. /*
  126. * Enable RGMII delay on Tx and Rx for CPU port
  127. * Ref: sec 4.7.2 of chip datasheet
  128. */
  129. miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
  130. miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
  131. reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
  132. miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
  133. miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
  134. /* reset the phy */
  135. miiphy_reset(name, devadr);
  136. printf("88E1116 Initialized on %s\n", name);
  137. }
  138. #endif /* CONFIG_RESET_PHY_R */
  139. #define GREEN_LED (1 << 14)
  140. #define ORANGE_LED (1 << 15)
  141. #define BOTH_LEDS (GREEN_LED | ORANGE_LED)
  142. #define NEITHER_LED 0
  143. static void set_leds(u32 leds, u32 blinking)
  144. {
  145. struct kwgpio_registers *r = (struct kwgpio_registers *)KW_GPIO1_BASE;
  146. u32 oe = readl(&r->oe) | BOTH_LEDS;
  147. writel(oe & ~leds, &r->oe); /* active low */
  148. u32 bl = readl(&r->blink_en) & ~BOTH_LEDS;
  149. writel(bl | blinking, &r->blink_en);
  150. }
  151. void show_boot_progress(int val)
  152. {
  153. switch (val) {
  154. case 15: /* booting Linux */
  155. set_leds(BOTH_LEDS, NEITHER_LED);
  156. break;
  157. case 64: /* Ethernet initialization */
  158. set_leds(GREEN_LED, GREEN_LED);
  159. break;
  160. default:
  161. if (val < 0) /* error */
  162. set_leds(ORANGE_LED, ORANGE_LED);
  163. break;
  164. }
  165. }