serial.c 11 KB

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  1. /*
  2. * (C) Copyright 2000 - 2010
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * Based ont the MPC5200 PSC driver.
  24. * Adapted for MPC512x by Jan Wrobel <wrr@semihalf.com>
  25. */
  26. /*
  27. * Minimal serial functions needed to use one of the PSC ports
  28. * as serial console interface.
  29. */
  30. #include <common.h>
  31. #include <linux/compiler.h>
  32. #include <asm/io.h>
  33. #include <asm/processor.h>
  34. #include <serial.h>
  35. DECLARE_GLOBAL_DATA_PTR;
  36. #if defined(CONFIG_PSC_CONSOLE) || defined(CONFIG_SERIAL_MULTI)
  37. static void fifo_init (volatile psc512x_t *psc)
  38. {
  39. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  40. u32 tfsize, rfsize;
  41. /* reset Rx & Tx fifo slice */
  42. out_be32(&psc->rfcmd, PSC_FIFO_RESET_SLICE);
  43. out_be32(&psc->tfcmd, PSC_FIFO_RESET_SLICE);
  44. /* disable Tx & Rx FIFO interrupts */
  45. out_be32(&psc->rfintmask, 0);
  46. out_be32(&psc->tfintmask, 0);
  47. #if defined(CONFIG_SERIAL_MULTI)
  48. switch (((u32)psc & 0xf00) >> 8) {
  49. case 0:
  50. tfsize = FIFOC_PSC0_TX_SIZE | (FIFOC_PSC0_TX_ADDR << 16);
  51. rfsize = FIFOC_PSC0_RX_SIZE | (FIFOC_PSC0_RX_ADDR << 16);
  52. break;
  53. case 1:
  54. tfsize = FIFOC_PSC1_TX_SIZE | (FIFOC_PSC1_TX_ADDR << 16);
  55. rfsize = FIFOC_PSC1_RX_SIZE | (FIFOC_PSC1_RX_ADDR << 16);
  56. break;
  57. case 2:
  58. tfsize = FIFOC_PSC2_TX_SIZE | (FIFOC_PSC2_TX_ADDR << 16);
  59. rfsize = FIFOC_PSC2_RX_SIZE | (FIFOC_PSC2_RX_ADDR << 16);
  60. break;
  61. case 3:
  62. tfsize = FIFOC_PSC3_TX_SIZE | (FIFOC_PSC3_TX_ADDR << 16);
  63. rfsize = FIFOC_PSC3_RX_SIZE | (FIFOC_PSC3_RX_ADDR << 16);
  64. break;
  65. case 4:
  66. tfsize = FIFOC_PSC4_TX_SIZE | (FIFOC_PSC4_TX_ADDR << 16);
  67. rfsize = FIFOC_PSC4_RX_SIZE | (FIFOC_PSC4_RX_ADDR << 16);
  68. break;
  69. case 5:
  70. tfsize = FIFOC_PSC5_TX_SIZE | (FIFOC_PSC5_TX_ADDR << 16);
  71. rfsize = FIFOC_PSC5_RX_SIZE | (FIFOC_PSC5_RX_ADDR << 16);
  72. break;
  73. case 6:
  74. tfsize = FIFOC_PSC6_TX_SIZE | (FIFOC_PSC6_TX_ADDR << 16);
  75. rfsize = FIFOC_PSC6_RX_SIZE | (FIFOC_PSC6_RX_ADDR << 16);
  76. break;
  77. case 7:
  78. tfsize = FIFOC_PSC7_TX_SIZE | (FIFOC_PSC7_TX_ADDR << 16);
  79. rfsize = FIFOC_PSC7_RX_SIZE | (FIFOC_PSC7_RX_ADDR << 16);
  80. break;
  81. case 8:
  82. tfsize = FIFOC_PSC8_TX_SIZE | (FIFOC_PSC8_TX_ADDR << 16);
  83. rfsize = FIFOC_PSC8_RX_SIZE | (FIFOC_PSC8_RX_ADDR << 16);
  84. break;
  85. case 9:
  86. tfsize = FIFOC_PSC9_TX_SIZE | (FIFOC_PSC9_TX_ADDR << 16);
  87. rfsize = FIFOC_PSC9_RX_SIZE | (FIFOC_PSC9_RX_ADDR << 16);
  88. break;
  89. case 10:
  90. tfsize = FIFOC_PSC10_TX_SIZE | (FIFOC_PSC10_TX_ADDR << 16);
  91. rfsize = FIFOC_PSC10_RX_SIZE | (FIFOC_PSC10_RX_ADDR << 16);
  92. break;
  93. case 11:
  94. tfsize = FIFOC_PSC11_TX_SIZE | (FIFOC_PSC11_TX_ADDR << 16);
  95. rfsize = FIFOC_PSC11_RX_SIZE | (FIFOC_PSC11_RX_ADDR << 16);
  96. break;
  97. default:
  98. return;
  99. }
  100. #else
  101. tfsize = CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16);
  102. rfsize = CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16);
  103. #endif
  104. out_be32(&psc->tfsize, tfsize);
  105. out_be32(&psc->rfsize, rfsize);
  106. /* enable Tx & Rx FIFO slice */
  107. out_be32(&psc->rfcmd, PSC_FIFO_ENABLE_SLICE);
  108. out_be32(&psc->tfcmd, PSC_FIFO_ENABLE_SLICE);
  109. out_be32(&im->fifoc.fifoc_cmd, FIFOC_DISABLE_CLOCK_GATE);
  110. __asm__ volatile ("sync");
  111. }
  112. void serial_setbrg_dev(unsigned int idx)
  113. {
  114. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  115. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  116. unsigned long baseclk, div;
  117. unsigned long baudrate;
  118. char buf[16];
  119. char *br_env;
  120. baudrate = gd->baudrate;
  121. if (idx != CONFIG_PSC_CONSOLE) {
  122. /* Allows setting baudrate for other serial devices
  123. * on PSCx using environment. If not specified, use
  124. * the same baudrate as for console.
  125. */
  126. sprintf(buf, "psc%d_baudrate", idx);
  127. br_env = getenv(buf);
  128. if (br_env)
  129. baudrate = simple_strtoul(br_env, NULL, 10);
  130. debug("%s: idx %d, baudrate %ld\n", __func__, idx, baudrate);
  131. }
  132. /* calculate divisor for setting PSC CTUR and CTLR registers */
  133. baseclk = (gd->ips_clk + 8) / 16;
  134. div = (baseclk + (baudrate / 2)) / baudrate;
  135. out_8(&psc->ctur, (div >> 8) & 0xff);
  136. out_8(&psc->ctlr, div & 0xff); /* set baudrate */
  137. }
  138. int serial_init_dev(unsigned int idx)
  139. {
  140. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  141. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  142. #if defined(CONFIG_SERIAL_MULTI)
  143. u32 reg;
  144. reg = in_be32(&im->clk.sccr[0]);
  145. out_be32(&im->clk.sccr[0], reg | CLOCK_SCCR1_PSC_EN(idx));
  146. #endif
  147. fifo_init (psc);
  148. /* set MR register to point to MR1 */
  149. out_8(&psc->command, PSC_SEL_MODE_REG_1);
  150. /* disable Tx/Rx */
  151. out_8(&psc->command, PSC_TX_DISABLE | PSC_RX_DISABLE);
  152. /* choose the prescaler by 16 for the Tx/Rx clock generation */
  153. out_be16(&psc->psc_clock_select, 0xdd00);
  154. /* switch to UART mode */
  155. out_be32(&psc->sicr, 0);
  156. /* mode register points to mr1 */
  157. /* configure parity, bit length and so on in mode register 1*/
  158. out_8(&psc->mode, PSC_MODE_8_BITS | PSC_MODE_PARNONE);
  159. /* now, mode register points to mr2 */
  160. out_8(&psc->mode, PSC_MODE_1_STOPBIT);
  161. /* set baudrate */
  162. serial_setbrg_dev(idx);
  163. /* disable all interrupts */
  164. out_be16(&psc->psc_imr, 0);
  165. /* reset and enable Rx/Tx */
  166. out_8(&psc->command, PSC_RST_RX);
  167. out_8(&psc->command, PSC_RST_TX);
  168. out_8(&psc->command, PSC_RX_ENABLE | PSC_TX_ENABLE);
  169. return 0;
  170. }
  171. int serial_uninit_dev(unsigned int idx)
  172. {
  173. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  174. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  175. u32 reg;
  176. out_8(&psc->command, PSC_RX_DISABLE | PSC_TX_DISABLE);
  177. reg = in_be32(&im->clk.sccr[0]);
  178. reg &= ~CLOCK_SCCR1_PSC_EN(idx);
  179. out_be32(&im->clk.sccr[0], reg);
  180. return 0;
  181. }
  182. void serial_putc_dev(unsigned int idx, const char c)
  183. {
  184. volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
  185. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  186. if (c == '\n')
  187. serial_putc_dev(idx, '\r');
  188. /* Wait for last character to go. */
  189. while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
  190. ;
  191. out_8(&psc->tfdata_8, c);
  192. }
  193. void serial_putc_raw_dev(unsigned int idx, const char c)
  194. {
  195. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  196. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  197. /* Wait for last character to go. */
  198. while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
  199. ;
  200. out_8(&psc->tfdata_8, c);
  201. }
  202. void serial_puts_dev(unsigned int idx, const char *s)
  203. {
  204. while (*s)
  205. serial_putc_dev(idx, *s++);
  206. }
  207. int serial_getc_dev(unsigned int idx)
  208. {
  209. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  210. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  211. /* Wait for a character to arrive. */
  212. while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY)
  213. ;
  214. return in_8(&psc->rfdata_8);
  215. }
  216. int serial_tstc_dev(unsigned int idx)
  217. {
  218. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  219. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  220. return !(in_be32(&psc->rfstat) & PSC_FIFO_EMPTY);
  221. }
  222. void serial_setrts_dev(unsigned int idx, int s)
  223. {
  224. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  225. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  226. if (s) {
  227. /* Assert RTS (become LOW) */
  228. out_8(&psc->op1, 0x1);
  229. }
  230. else {
  231. /* Negate RTS (become HIGH) */
  232. out_8(&psc->op0, 0x1);
  233. }
  234. }
  235. int serial_getcts_dev(unsigned int idx)
  236. {
  237. volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
  238. volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
  239. return (in_8(&psc->ip) & 0x1) ? 0 : 1;
  240. }
  241. #endif /* CONFIG_PSC_CONSOLE || CONFIG_SERIAL_MULTI */
  242. #if defined(CONFIG_SERIAL_MULTI)
  243. #define DECLARE_PSC_SERIAL_FUNCTIONS(port) \
  244. int serial##port##_init(void) \
  245. { \
  246. return serial_init_dev(port); \
  247. } \
  248. int serial##port##_uninit(void) \
  249. { \
  250. return serial_uninit_dev(port); \
  251. } \
  252. void serial##port##_setbrg(void) \
  253. { \
  254. serial_setbrg_dev(port); \
  255. } \
  256. int serial##port##_getc(void) \
  257. { \
  258. return serial_getc_dev(port); \
  259. } \
  260. int serial##port##_tstc(void) \
  261. { \
  262. return serial_tstc_dev(port); \
  263. } \
  264. void serial##port##_putc(const char c) \
  265. { \
  266. serial_putc_dev(port, c); \
  267. } \
  268. void serial##port##_puts(const char *s) \
  269. { \
  270. serial_puts_dev(port, s); \
  271. }
  272. #define INIT_PSC_SERIAL_STRUCTURE(port, name) { \
  273. name, \
  274. serial##port##_init, \
  275. serial##port##_uninit, \
  276. serial##port##_setbrg, \
  277. serial##port##_getc, \
  278. serial##port##_tstc, \
  279. serial##port##_putc, \
  280. serial##port##_puts, \
  281. }
  282. #if defined(CONFIG_SYS_PSC1)
  283. DECLARE_PSC_SERIAL_FUNCTIONS(1);
  284. struct serial_device serial1_device =
  285. INIT_PSC_SERIAL_STRUCTURE(1, "psc1");
  286. #endif
  287. #if defined(CONFIG_SYS_PSC3)
  288. DECLARE_PSC_SERIAL_FUNCTIONS(3);
  289. struct serial_device serial3_device =
  290. INIT_PSC_SERIAL_STRUCTURE(3, "psc3");
  291. #endif
  292. #if defined(CONFIG_SYS_PSC4)
  293. DECLARE_PSC_SERIAL_FUNCTIONS(4);
  294. struct serial_device serial4_device =
  295. INIT_PSC_SERIAL_STRUCTURE(4, "psc4");
  296. #endif
  297. #if defined(CONFIG_SYS_PSC6)
  298. DECLARE_PSC_SERIAL_FUNCTIONS(6);
  299. struct serial_device serial6_device =
  300. INIT_PSC_SERIAL_STRUCTURE(6, "psc6");
  301. #endif
  302. __weak struct serial_device *default_serial_console(void)
  303. {
  304. #if (CONFIG_PSC_CONSOLE == 3)
  305. return &serial3_device;
  306. #elif (CONFIG_PSC_CONSOLE == 6)
  307. return &serial6_device;
  308. #else
  309. #error "invalid CONFIG_PSC_CONSOLE"
  310. #endif
  311. }
  312. #else
  313. void serial_setbrg(void)
  314. {
  315. serial_setbrg_dev(CONFIG_PSC_CONSOLE);
  316. }
  317. int serial_init(void)
  318. {
  319. return serial_init_dev(CONFIG_PSC_CONSOLE);
  320. }
  321. void serial_putc(const char c)
  322. {
  323. serial_putc_dev(CONFIG_PSC_CONSOLE, c);
  324. }
  325. void serial_putc_raw(const char c)
  326. {
  327. serial_putc_raw_dev(CONFIG_PSC_CONSOLE, c);
  328. }
  329. void serial_puts(const char *s)
  330. {
  331. serial_puts_dev(CONFIG_PSC_CONSOLE, s);
  332. }
  333. int serial_getc(void)
  334. {
  335. return serial_getc_dev(CONFIG_PSC_CONSOLE);
  336. }
  337. int serial_tstc(void)
  338. {
  339. return serial_tstc_dev(CONFIG_PSC_CONSOLE);
  340. }
  341. void serial_setrts(int s)
  342. {
  343. return serial_setrts_dev(CONFIG_PSC_CONSOLE, s);
  344. }
  345. int serial_getcts(void)
  346. {
  347. return serial_getcts_dev(CONFIG_PSC_CONSOLE);
  348. }
  349. #endif /* CONFIG_PSC_CONSOLE */
  350. #if defined(CONFIG_SERIAL_MULTI)
  351. #include <stdio_dev.h>
  352. /*
  353. * Routines for communication with serial devices over PSC
  354. */
  355. /* Bitfield for initialized PSCs */
  356. static unsigned int initialized;
  357. struct stdio_dev *open_port(int num, int baudrate)
  358. {
  359. struct stdio_dev *port;
  360. char env_var[16];
  361. char env_val[10];
  362. char name[7];
  363. if (num < 0 || num > 11)
  364. return NULL;
  365. sprintf(name, "psc%d", num);
  366. port = stdio_get_by_name(name);
  367. if (!port)
  368. return NULL;
  369. if (!test_bit(num, &initialized)) {
  370. sprintf(env_var, "psc%d_baudrate", num);
  371. sprintf(env_val, "%d", baudrate);
  372. setenv(env_var, env_val);
  373. if (port->start())
  374. return NULL;
  375. set_bit(num, &initialized);
  376. }
  377. return port;
  378. }
  379. int close_port(int num)
  380. {
  381. struct stdio_dev *port;
  382. int ret;
  383. char name[7];
  384. if (num < 0 || num > 11)
  385. return -1;
  386. sprintf(name, "psc%d", num);
  387. port = stdio_get_by_name(name);
  388. if (!port)
  389. return -1;
  390. ret = port->stop();
  391. clear_bit(num, &initialized);
  392. return ret;
  393. }
  394. int write_port(struct stdio_dev *port, char *buf)
  395. {
  396. if (!port || !buf)
  397. return -1;
  398. port->puts(buf);
  399. return 0;
  400. }
  401. int read_port(struct stdio_dev *port, char *buf, int size)
  402. {
  403. int cnt = 0;
  404. if (!port || !buf)
  405. return -1;
  406. if (!size)
  407. return 0;
  408. while (port->tstc()) {
  409. buf[cnt++] = port->getc();
  410. if (cnt > size)
  411. break;
  412. }
  413. return cnt;
  414. }
  415. #endif /* CONFIG_SERIAL_MULTI */