interrupts.c 6.3 KB

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  1. /*
  2. * (C) Copyright 2000-2002
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
  6. * Scott McNutt <smcnutt@psyent.com>
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <nios2.h>
  27. #include <nios2-io.h>
  28. #include <asm/types.h>
  29. #include <asm/io.h>
  30. #include <asm/ptrace.h>
  31. #include <common.h>
  32. #include <command.h>
  33. #include <watchdog.h>
  34. #ifdef CONFIG_STATUS_LED
  35. #include <status_led.h>
  36. #endif
  37. #if defined(CONFIG_SYS_NIOS_TMRBASE) && !defined(CONFIG_SYS_NIOS_TMRIRQ)
  38. #error CONFIG_SYS_NIOS_TMRIRQ not defined (see documentation)
  39. #endif
  40. /****************************************************************************/
  41. struct irq_action {
  42. interrupt_handler_t *handler;
  43. void *arg;
  44. int count;
  45. };
  46. static struct irq_action vecs[32];
  47. /*************************************************************************/
  48. volatile ulong timestamp = 0;
  49. void reset_timer (void)
  50. {
  51. nios_timer_t *tmr =(nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
  52. /* From Embedded Peripherals Handbook:
  53. *
  54. * "When the hardware is configured with Writeable period
  55. * disabled, writing to one of the period_n registers causes
  56. * the counter to reset to the fixed Timeout Period specified
  57. * at system generation time."
  58. *
  59. * Here we force a reload to prevent early timeouts from
  60. * get_timer() when the interrupt period is greater than
  61. * than 1 msec.
  62. *
  63. * Simply write to periodl with its own value to force an
  64. * internal counter reload, THEN reset the timestamp.
  65. */
  66. writel (readl (&tmr->periodl), &tmr->periodl);
  67. timestamp = 0;
  68. /* From Embedded Peripherals Handbook:
  69. *
  70. * "Writing to one of the period_n registers stops the internal
  71. * counter, except when the hardware is configured with Start/Stop
  72. * control bits off. If Start/Stop control bits is off, writing
  73. * either register does not stop the counter."
  74. *
  75. * In order to accomodate either configuration, the control
  76. * register is re-written. If the counter is stopped, it will
  77. * be restarted. If it is running, the write is essentially
  78. * a nop.
  79. */
  80. writel (NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START,
  81. &tmr->control);
  82. }
  83. ulong get_timer (ulong base)
  84. {
  85. WATCHDOG_RESET ();
  86. return (timestamp - base);
  87. }
  88. /* The board must handle this interrupt if a timer is not
  89. * provided.
  90. */
  91. #if defined(CONFIG_SYS_NIOS_TMRBASE)
  92. void tmr_isr (void *arg)
  93. {
  94. nios_timer_t *tmr = (nios_timer_t *)arg;
  95. /* Interrupt is cleared by writing anything to the
  96. * status register.
  97. */
  98. writel (0, &tmr->status);
  99. timestamp += CONFIG_SYS_NIOS_TMRMS;
  100. #ifdef CONFIG_STATUS_LED
  101. status_led_tick(timestamp);
  102. #endif
  103. }
  104. static void tmr_init (void)
  105. {
  106. nios_timer_t *tmr =(nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
  107. writel (0, &tmr->status);
  108. writel (0, &tmr->control);
  109. writel (NIOS_TIMER_STOP, &tmr->control);
  110. #if defined(CONFIG_SYS_NIOS_TMRCNT)
  111. writel (CONFIG_SYS_NIOS_TMRCNT & 0xffff, &tmr->periodl);
  112. writel ((CONFIG_SYS_NIOS_TMRCNT >> 16) & 0xffff, &tmr->periodh);
  113. #endif
  114. writel (NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START,
  115. &tmr->control);
  116. irq_install_handler (CONFIG_SYS_NIOS_TMRIRQ, tmr_isr, (void *)tmr);
  117. }
  118. #endif /* CONFIG_SYS_NIOS_TMRBASE */
  119. /*************************************************************************/
  120. int disable_interrupts (void)
  121. {
  122. int val = rdctl (CTL_STATUS);
  123. wrctl (CTL_STATUS, val & ~STATUS_IE);
  124. return (val & STATUS_IE);
  125. }
  126. void enable_interrupts( void )
  127. {
  128. int val = rdctl (CTL_STATUS);
  129. wrctl (CTL_STATUS, val | STATUS_IE);
  130. }
  131. void external_interrupt (struct pt_regs *regs)
  132. {
  133. unsigned irqs;
  134. struct irq_action *act;
  135. /* Evaluate only irqs that are both enabled AND pending */
  136. irqs = rdctl (CTL_IENABLE) & rdctl (CTL_IPENDING);
  137. act = vecs;
  138. /* Assume (as does the Nios2 HAL) that bit 0 is highest
  139. * priority. NOTE: There is ALWAYS a handler assigned
  140. * (the default if no other).
  141. */
  142. while (irqs) {
  143. if (irqs & 1) {
  144. act->handler (act->arg);
  145. act->count++;
  146. }
  147. irqs >>=1;
  148. act++;
  149. }
  150. }
  151. static void def_hdlr (void *arg)
  152. {
  153. unsigned irqs = rdctl (CTL_IENABLE);
  154. /* Disable the individual interrupt -- with gratuitous
  155. * warning.
  156. */
  157. irqs &= ~(1 << (int)arg);
  158. wrctl (CTL_IENABLE, irqs);
  159. printf ("WARNING: Disabling unhandled interrupt: %d\n",
  160. (int)arg);
  161. }
  162. /*************************************************************************/
  163. void irq_install_handler (int irq, interrupt_handler_t *hdlr, void *arg)
  164. {
  165. int flag;
  166. struct irq_action *act;
  167. unsigned ena = rdctl (CTL_IENABLE);
  168. if ((irq < 0) || (irq > 31))
  169. return;
  170. act = &vecs[irq];
  171. flag = disable_interrupts ();
  172. if (hdlr) {
  173. act->handler = hdlr;
  174. act->arg = arg;
  175. ena |= (1 << irq); /* enable */
  176. } else {
  177. act->handler = def_hdlr;
  178. act->arg = (void *)irq;
  179. ena &= ~(1 << irq); /* disable */
  180. }
  181. wrctl (CTL_IENABLE, ena);
  182. if (flag) enable_interrupts ();
  183. }
  184. int interrupt_init (void)
  185. {
  186. int i;
  187. /* Assign the default handler to all */
  188. for (i = 0; i < 32; i++) {
  189. vecs[i].handler = def_hdlr;
  190. vecs[i].arg = (void *)i;
  191. vecs[i].count = 0;
  192. }
  193. #if defined(CONFIG_SYS_NIOS_TMRBASE)
  194. tmr_init ();
  195. #endif
  196. enable_interrupts ();
  197. return (0);
  198. }
  199. /*************************************************************************/
  200. #if defined(CONFIG_CMD_IRQ)
  201. int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  202. {
  203. int i;
  204. struct irq_action *act = vecs;
  205. printf ("\nInterrupt-Information:\n\n");
  206. printf ("Nr Routine Arg Count\n");
  207. printf ("-----------------------------\n");
  208. for (i=0; i<32; i++) {
  209. if (act->handler != def_hdlr) {
  210. printf ("%02d %08lx %08lx %d\n",
  211. i,
  212. (ulong)act->handler,
  213. (ulong)act->arg,
  214. act->count);
  215. }
  216. act++;
  217. }
  218. printf ("\n");
  219. return (0);
  220. }
  221. #endif