epcs.c 16 KB

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  1. /*
  2. * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
  3. * Scott McNutt <smcnutt@psyent.com>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #if defined(CONFIG_SYS_NIOS_EPCSBASE)
  25. #include <command.h>
  26. #include <asm/io.h>
  27. #include <nios2-io.h>
  28. #include <nios2-epcs.h>
  29. /*-----------------------------------------------------------------------*/
  30. #define SHORT_HELP\
  31. "epcs - read/write Cyclone EPCS configuration device.\n"
  32. #define LONG_HELP\
  33. "\n"\
  34. "epcs erase start [end]\n"\
  35. " - erase sector start or sectors start through end.\n"\
  36. "epcs info\n"\
  37. " - display EPCS device information.\n"\
  38. "epcs protect on | off\n"\
  39. " - turn device protection on or off.\n"\
  40. "epcs read addr offset count\n"\
  41. " - read count bytes from offset to addr.\n"\
  42. "epcs write addr offset count\n"\
  43. " - write count bytes to offset from addr.\n"\
  44. "epcs verify addr offset count\n"\
  45. " - verify count bytes at offset from addr."
  46. /*-----------------------------------------------------------------------*/
  47. /* Operation codes for serial configuration devices
  48. */
  49. #define EPCS_WRITE_ENA 0x06 /* Write enable */
  50. #define EPCS_WRITE_DIS 0x04 /* Write disable */
  51. #define EPCS_READ_STAT 0x05 /* Read status */
  52. #define EPCS_READ_BYTES 0x03 /* Read bytes */
  53. #define EPCS_READ_ID 0xab /* Read silicon id */
  54. #define EPCS_WRITE_STAT 0x01 /* Write status */
  55. #define EPCS_WRITE_BYTES 0x02 /* Write bytes */
  56. #define EPCS_ERASE_BULK 0xc7 /* Erase entire device */
  57. #define EPCS_ERASE_SECT 0xd8 /* Erase sector */
  58. /* Device status register bits
  59. */
  60. #define EPCS_STATUS_WIP (1<<0) /* Write in progress */
  61. #define EPCS_STATUS_WEL (1<<1) /* Write enable latch */
  62. /* Misc
  63. */
  64. #define EPCS_TIMEOUT 100 /* 100 msec timeout */
  65. static nios_spi_t *epcs = (nios_spi_t *)CONFIG_SYS_NIOS_EPCSBASE;
  66. /***********************************************************************
  67. * Device access
  68. ***********************************************************************/
  69. static int epcs_cs (int assert)
  70. {
  71. ulong start;
  72. unsigned tmp;
  73. if (assert) {
  74. tmp = readl (&epcs->control);
  75. writel (tmp | NIOS_SPI_SSO, &epcs->control);
  76. } else {
  77. /* Let all bits shift out */
  78. start = get_timer (0);
  79. while ((readl (&epcs->status) & NIOS_SPI_TMT) == 0)
  80. if (get_timer (start) > EPCS_TIMEOUT)
  81. return (-1);
  82. tmp = readl (&epcs->control);
  83. writel (tmp & ~NIOS_SPI_SSO, &epcs->control);
  84. }
  85. return (0);
  86. }
  87. static int epcs_tx (unsigned char c)
  88. {
  89. ulong start;
  90. start = get_timer (0);
  91. while ((readl (&epcs->status) & NIOS_SPI_TRDY) == 0)
  92. if (get_timer (start) > EPCS_TIMEOUT)
  93. return (-1);
  94. writel (c, &epcs->txdata);
  95. return (0);
  96. }
  97. static int epcs_rx (void)
  98. {
  99. ulong start;
  100. start = get_timer (0);
  101. while ((readl (&epcs->status) & NIOS_SPI_RRDY) == 0)
  102. if (get_timer (start) > EPCS_TIMEOUT)
  103. return (-1);
  104. return (readl (&epcs->rxdata));
  105. }
  106. static unsigned char bitrev[] = {
  107. 0x00, 0x08, 0x04, 0x0c, 0x02, 0x0a, 0x06, 0x0e,
  108. 0x01, 0x09, 0x05, 0x0d, 0x03, 0x0b, 0x07, 0x0f
  109. };
  110. static unsigned char epcs_bitrev (unsigned char c)
  111. {
  112. unsigned char val;
  113. val = bitrev[c>>4];
  114. val |= bitrev[c & 0x0f]<<4;
  115. return (val);
  116. }
  117. static void epcs_rcv (unsigned char *dst, int len)
  118. {
  119. while (len--) {
  120. epcs_tx (0);
  121. *dst++ = epcs_rx ();
  122. }
  123. }
  124. static void epcs_rrcv (unsigned char *dst, int len)
  125. {
  126. while (len--) {
  127. epcs_tx (0);
  128. *dst++ = epcs_bitrev (epcs_rx ());
  129. }
  130. }
  131. static void epcs_snd (unsigned char *src, int len)
  132. {
  133. while (len--) {
  134. epcs_tx (*src++);
  135. epcs_rx ();
  136. }
  137. }
  138. static void epcs_rsnd (unsigned char *src, int len)
  139. {
  140. while (len--) {
  141. epcs_tx (epcs_bitrev (*src++));
  142. epcs_rx ();
  143. }
  144. }
  145. static void epcs_wr_enable (void)
  146. {
  147. epcs_cs (1);
  148. epcs_tx (EPCS_WRITE_ENA);
  149. epcs_rx ();
  150. epcs_cs (0);
  151. }
  152. static unsigned char epcs_status_rd (void)
  153. {
  154. unsigned char status;
  155. epcs_cs (1);
  156. epcs_tx (EPCS_READ_STAT);
  157. epcs_rx ();
  158. epcs_tx (0);
  159. status = epcs_rx ();
  160. epcs_cs (0);
  161. return (status);
  162. }
  163. static void epcs_status_wr (unsigned char status)
  164. {
  165. epcs_wr_enable ();
  166. epcs_cs (1);
  167. epcs_tx (EPCS_WRITE_STAT);
  168. epcs_rx ();
  169. epcs_tx (status);
  170. epcs_rx ();
  171. epcs_cs (0);
  172. return;
  173. }
  174. /***********************************************************************
  175. * Device information
  176. ***********************************************************************/
  177. static struct epcs_devinfo_t devinfo[] = {
  178. { "EPCS1 ", 0x10, 17, 4, 15, 8, 0x0c },
  179. { "EPCS4 ", 0x12, 19, 8, 16, 8, 0x1c },
  180. { "EPCS16", 0x14, 21, 32, 16, 8, 0x1c },
  181. { "EPCS64", 0x16, 23,128, 16, 8, 0x1c },
  182. { 0, 0, 0, 0, 0, 0 }
  183. };
  184. int epcs_reset (void)
  185. {
  186. /* When booting from an epcs controller, the epcs bootrom
  187. * code may leave the slave select in an asserted state.
  188. * This causes two problems: (1) The initial epcs access
  189. * will fail -- not a big deal, and (2) a software reset
  190. * will cause the bootrom code to hang since it does not
  191. * ensure the select is negated prior to first access -- a
  192. * big deal. Here we just negate chip select and everything
  193. * gets better :-)
  194. */
  195. epcs_cs (0); /* Negate chip select */
  196. return (0);
  197. }
  198. epcs_devinfo_t *epcs_dev_find (void)
  199. {
  200. unsigned char buf[4];
  201. unsigned char id;
  202. int i;
  203. struct epcs_devinfo_t *dev = NULL;
  204. /* Read silicon id requires 3 "dummy bytes" before it's put
  205. * on the wire.
  206. */
  207. buf[0] = EPCS_READ_ID;
  208. buf[1] = 0;
  209. buf[2] = 0;
  210. buf[3] = 0;
  211. epcs_cs (1);
  212. epcs_snd (buf,4);
  213. epcs_rcv (buf,1);
  214. if (epcs_cs (0) == -1)
  215. return (NULL);
  216. id = buf[0];
  217. /* Find the info struct */
  218. i = 0;
  219. while (devinfo[i].name) {
  220. if (id == devinfo[i].id) {
  221. dev = &devinfo[i];
  222. break;
  223. }
  224. i++;
  225. }
  226. return (dev);
  227. }
  228. /***********************************************************************
  229. * Misc Utilities
  230. ***********************************************************************/
  231. int epcs_cfgsz (void)
  232. {
  233. int sz = 0;
  234. unsigned char buf[128];
  235. unsigned char *p;
  236. struct epcs_devinfo_t *dev = epcs_dev_find ();
  237. if (!dev)
  238. return (-1);
  239. /* Read in the first 128 bytes of the device */
  240. buf[0] = EPCS_READ_BYTES;
  241. buf[1] = 0;
  242. buf[2] = 0;
  243. buf[3] = 0;
  244. epcs_cs (1);
  245. epcs_snd (buf,4);
  246. epcs_rrcv (buf, sizeof(buf));
  247. epcs_cs (0);
  248. /* Search for the starting 0x6a which is followed by the
  249. * 4-byte 'register' and 4-byte bit-count.
  250. */
  251. p = buf;
  252. while (p < buf + sizeof(buf)-8) {
  253. if ( *p == 0x6a ) {
  254. /* Point to bit count and extract */
  255. p += 5;
  256. sz = *p++;
  257. sz |= *p++ << 8;
  258. sz |= *p++ << 16;
  259. sz |= *p++ << 24;
  260. /* Convert to byte count */
  261. sz += 7;
  262. sz >>= 3;
  263. } else if (*p == 0xff) {
  264. /* 0xff is ok ... just skip */
  265. p++;
  266. continue;
  267. } else {
  268. /* Not 0xff or 0x6a ... something's not
  269. * right ... report 'unknown' (sz=0).
  270. */
  271. break;
  272. }
  273. }
  274. return (sz);
  275. }
  276. int epcs_erase (unsigned start, unsigned end)
  277. {
  278. unsigned off, sectsz;
  279. unsigned char buf[4];
  280. struct epcs_devinfo_t *dev = epcs_dev_find ();
  281. if (!dev || (start>end))
  282. return (-1);
  283. /* Erase the requested sectors. An address is required
  284. * that lies within the requested sector -- we'll just
  285. * use the first address in the sector.
  286. */
  287. printf ("epcs erasing sector %d ", start);
  288. if (start != end)
  289. printf ("to %d ", end);
  290. sectsz = (1 << dev->sz_sect);
  291. while (start <= end) {
  292. off = start * sectsz;
  293. start++;
  294. buf[0] = EPCS_ERASE_SECT;
  295. buf[1] = off >> 16;
  296. buf[2] = off >> 8;
  297. buf[3] = off;
  298. epcs_wr_enable ();
  299. epcs_cs (1);
  300. epcs_snd (buf,4);
  301. epcs_cs (0);
  302. printf ("."); /* Some user feedback */
  303. /* Wait for erase to complete */
  304. while (epcs_status_rd() & EPCS_STATUS_WIP)
  305. ;
  306. }
  307. printf (" done.\n");
  308. return (0);
  309. }
  310. int epcs_read (ulong addr, ulong off, ulong cnt)
  311. {
  312. unsigned char buf[4];
  313. struct epcs_devinfo_t *dev = epcs_dev_find ();
  314. if (!dev)
  315. return (-1);
  316. buf[0] = EPCS_READ_BYTES;
  317. buf[1] = off >> 16;
  318. buf[2] = off >> 8;
  319. buf[3] = off;
  320. epcs_cs (1);
  321. epcs_snd (buf,4);
  322. epcs_rrcv ((unsigned char *)addr, cnt);
  323. epcs_cs (0);
  324. return (0);
  325. }
  326. int epcs_write (ulong addr, ulong off, ulong cnt)
  327. {
  328. ulong wrcnt;
  329. unsigned pgsz;
  330. unsigned char buf[4];
  331. struct epcs_devinfo_t *dev = epcs_dev_find ();
  332. if (!dev)
  333. return (-1);
  334. pgsz = (1<<dev->sz_page);
  335. while (cnt) {
  336. if (off % pgsz)
  337. wrcnt = pgsz - (off % pgsz);
  338. else
  339. wrcnt = pgsz;
  340. wrcnt = (wrcnt > cnt) ? cnt : wrcnt;
  341. buf[0] = EPCS_WRITE_BYTES;
  342. buf[1] = off >> 16;
  343. buf[2] = off >> 8;
  344. buf[3] = off;
  345. epcs_wr_enable ();
  346. epcs_cs (1);
  347. epcs_snd (buf,4);
  348. epcs_rsnd ((unsigned char *)addr, wrcnt);
  349. epcs_cs (0);
  350. /* Wait for write to complete */
  351. while (epcs_status_rd() & EPCS_STATUS_WIP)
  352. ;
  353. cnt -= wrcnt;
  354. off += wrcnt;
  355. addr += wrcnt;
  356. }
  357. return (0);
  358. }
  359. int epcs_verify (ulong addr, ulong off, ulong cnt, ulong *err)
  360. {
  361. ulong rdcnt;
  362. unsigned char buf[256];
  363. unsigned char *start,*end;
  364. int i;
  365. start = end = (unsigned char *)addr;
  366. while (cnt) {
  367. rdcnt = (cnt>sizeof(buf)) ? sizeof(buf) : cnt;
  368. epcs_read ((ulong)buf, off, rdcnt);
  369. for (i=0; i<rdcnt; i++) {
  370. if (*end != buf[i]) {
  371. *err = end - start;
  372. return(-1);
  373. }
  374. end++;
  375. }
  376. cnt -= rdcnt;
  377. off += rdcnt;
  378. }
  379. return (0);
  380. }
  381. static int epcs_sect_erased (int sect, unsigned *offset,
  382. struct epcs_devinfo_t *dev)
  383. {
  384. unsigned char buf[128];
  385. unsigned off, end;
  386. unsigned sectsz;
  387. int i;
  388. sectsz = (1 << dev->sz_sect);
  389. off = sectsz * sect;
  390. end = off + sectsz;
  391. while (off < end) {
  392. epcs_read ((ulong)buf, off, sizeof(buf));
  393. for (i=0; i < sizeof(buf); i++) {
  394. if (buf[i] != 0xff) {
  395. *offset = off + i;
  396. return (0);
  397. }
  398. }
  399. off += sizeof(buf);
  400. }
  401. return (1);
  402. }
  403. /***********************************************************************
  404. * Commands
  405. ***********************************************************************/
  406. static
  407. void do_epcs_info (struct epcs_devinfo_t *dev, int argc, char * const argv[])
  408. {
  409. int i;
  410. unsigned char stat;
  411. unsigned tmp;
  412. int erased;
  413. /* Basic device info */
  414. printf ("%s: %d kbytes (%d sectors x %d kbytes,"
  415. " %d bytes/page)\n",
  416. dev->name, 1 << (dev->size-10),
  417. dev->num_sects, 1 << (dev->sz_sect-10),
  418. 1 << dev->sz_page );
  419. /* Status -- for now protection is all-or-nothing */
  420. stat = epcs_status_rd();
  421. printf ("status: 0x%02x (WIP:%d, WEL:%d, PROT:%s)\n",
  422. stat,
  423. (stat & EPCS_STATUS_WIP) ? 1 : 0,
  424. (stat & EPCS_STATUS_WEL) ? 1 : 0,
  425. (stat & dev->prot_mask) ? "on" : "off" );
  426. /* Configuration */
  427. tmp = epcs_cfgsz ();
  428. if (tmp) {
  429. printf ("config: 0x%06x (%d) bytes\n", tmp, tmp );
  430. } else {
  431. printf ("config: unknown\n" );
  432. }
  433. /* Sector info */
  434. for (i=0; (i < dev->num_sects) && (argc > 1); i++) {
  435. erased = epcs_sect_erased (i, &tmp, dev);
  436. if ((i & 0x03) == 0) printf ("\n");
  437. printf ("%4d: %07x ",
  438. i, i*(1<<dev->sz_sect) );
  439. if (erased)
  440. printf ("E ");
  441. else
  442. printf (" ");
  443. }
  444. printf ("\n");
  445. return;
  446. }
  447. static
  448. void do_epcs_erase (struct epcs_devinfo_t *dev, int argc, char * const argv[])
  449. {
  450. unsigned start,end;
  451. if ((argc < 3) || (argc > 4)) {
  452. printf ("USAGE: epcs erase sect [end]\n");
  453. return;
  454. }
  455. if ((epcs_status_rd() & dev->prot_mask) != 0) {
  456. printf ( "epcs: device protected.\n");
  457. return;
  458. }
  459. start = simple_strtoul (argv[2], NULL, 10);
  460. if (argc > 3)
  461. end = simple_strtoul (argv[3], NULL, 10);
  462. else
  463. end = start;
  464. if ((start >= dev->num_sects) || (start > end)) {
  465. printf ("epcs: invalid sector range: [%d:%d]\n",
  466. start, end );
  467. return;
  468. }
  469. epcs_erase (start, end);
  470. return;
  471. }
  472. static
  473. void do_epcs_protect (struct epcs_devinfo_t *dev, int argc, char * const argv[])
  474. {
  475. unsigned char stat;
  476. /* For now protection is all-or-nothing to keep things
  477. * simple. The protection bits don't map in a linear
  478. * fashion ... and we would rather protect the bottom
  479. * of the device since it contains the config data and
  480. * leave the top unprotected for app use. But unfortunately
  481. * protection works from top-to-bottom so it does
  482. * really help very much from a software app point-of-view.
  483. */
  484. if (argc < 3) {
  485. printf ("USAGE: epcs protect on | off\n");
  486. return;
  487. }
  488. if (!dev)
  489. return;
  490. /* Protection on/off is just a matter of setting/clearing
  491. * all protection bits in the status register.
  492. */
  493. stat = epcs_status_rd ();
  494. if (strcmp ("on", argv[2]) == 0) {
  495. stat |= dev->prot_mask;
  496. } else if (strcmp ("off", argv[2]) == 0 ) {
  497. stat &= ~dev->prot_mask;
  498. } else {
  499. printf ("epcs: unknown protection: %s\n", argv[2]);
  500. return;
  501. }
  502. epcs_status_wr (stat);
  503. return;
  504. }
  505. static
  506. void do_epcs_read (struct epcs_devinfo_t *dev, int argc, char * const argv[])
  507. {
  508. ulong addr,off,cnt;
  509. ulong sz;
  510. if (argc < 5) {
  511. printf ("USAGE: epcs read addr offset count\n");
  512. return;
  513. }
  514. sz = 1 << dev->size;
  515. addr = simple_strtoul (argv[2], NULL, 16);
  516. off = simple_strtoul (argv[3], NULL, 16);
  517. cnt = simple_strtoul (argv[4], NULL, 16);
  518. if (off > sz) {
  519. printf ("offset is greater than device size"
  520. "... aborting.\n");
  521. return;
  522. }
  523. if ((off + cnt) > sz) {
  524. printf ("request exceeds device size"
  525. "... truncating.\n");
  526. cnt = sz - off;
  527. }
  528. printf ("epcs: read %08lx <- %06lx (0x%lx bytes)\n",
  529. addr, off, cnt);
  530. epcs_read (addr, off, cnt);
  531. return;
  532. }
  533. static
  534. void do_epcs_write (struct epcs_devinfo_t *dev, int argc, char * const argv[])
  535. {
  536. ulong addr,off,cnt;
  537. ulong sz;
  538. ulong err;
  539. if (argc < 5) {
  540. printf ("USAGE: epcs write addr offset count\n");
  541. return;
  542. }
  543. if ((epcs_status_rd() & dev->prot_mask) != 0) {
  544. printf ( "epcs: device protected.\n");
  545. return;
  546. }
  547. sz = 1 << dev->size;
  548. addr = simple_strtoul (argv[2], NULL, 16);
  549. off = simple_strtoul (argv[3], NULL, 16);
  550. cnt = simple_strtoul (argv[4], NULL, 16);
  551. if (off > sz) {
  552. printf ("offset is greater than device size"
  553. "... aborting.\n");
  554. return;
  555. }
  556. if ((off + cnt) > sz) {
  557. printf ("request exceeds device size"
  558. "... truncating.\n");
  559. cnt = sz - off;
  560. }
  561. printf ("epcs: write %08lx -> %06lx (0x%lx bytes)\n",
  562. addr, off, cnt);
  563. epcs_write (addr, off, cnt);
  564. if (epcs_verify (addr, off, cnt, &err) != 0)
  565. printf ("epcs: write error at offset %06lx\n", err);
  566. return;
  567. }
  568. static
  569. void do_epcs_verify (struct epcs_devinfo_t *dev, int argc, char * const argv[])
  570. {
  571. ulong addr,off,cnt;
  572. ulong sz;
  573. ulong err;
  574. if (argc < 5) {
  575. printf ("USAGE: epcs verify addr offset count\n");
  576. return;
  577. }
  578. sz = 1 << dev->size;
  579. addr = simple_strtoul (argv[2], NULL, 16);
  580. off = simple_strtoul (argv[3], NULL, 16);
  581. cnt = simple_strtoul (argv[4], NULL, 16);
  582. if (off > sz) {
  583. printf ("offset is greater than device size"
  584. "... aborting.\n");
  585. return;
  586. }
  587. if ((off + cnt) > sz) {
  588. printf ("request exceeds device size"
  589. "... truncating.\n");
  590. cnt = sz - off;
  591. }
  592. printf ("epcs: verify %08lx -> %06lx (0x%lx bytes)\n",
  593. addr, off, cnt);
  594. if (epcs_verify (addr, off, cnt, &err) != 0)
  595. printf ("epcs: verify error at offset %06lx\n", err);
  596. return;
  597. }
  598. /*-----------------------------------------------------------------------*/
  599. int do_epcs (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  600. {
  601. int len;
  602. struct epcs_devinfo_t *dev = epcs_dev_find ();
  603. if (!dev) {
  604. printf ("epcs: device not found.\n");
  605. return (-1);
  606. }
  607. if (argc < 2) {
  608. do_epcs_info (dev, argc, argv);
  609. return (0);
  610. }
  611. len = strlen (argv[1]);
  612. if (strncmp ("info", argv[1], len) == 0) {
  613. do_epcs_info (dev, argc, argv);
  614. } else if (strncmp ("erase", argv[1], len) == 0) {
  615. do_epcs_erase (dev, argc, argv);
  616. } else if (strncmp ("protect", argv[1], len) == 0) {
  617. do_epcs_protect (dev, argc, argv);
  618. } else if (strncmp ("read", argv[1], len) == 0) {
  619. do_epcs_read (dev, argc, argv);
  620. } else if (strncmp ("write", argv[1], len) == 0) {
  621. do_epcs_write (dev, argc, argv);
  622. } else if (strncmp ("verify", argv[1], len) == 0) {
  623. do_epcs_verify (dev, argc, argv);
  624. } else {
  625. printf ("epcs: unknown operation: %s\n", argv[1]);
  626. }
  627. return (0);
  628. }
  629. /*-----------------------------------------------------------------------*/
  630. U_BOOT_CMD( epcs, 5, 0, do_epcs, SHORT_HELP, LONG_HELP );
  631. #endif /* CONFIG_NIOS_EPCS */