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arm
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asm
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arch-s5pc2xx
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clock.h

clock.h 7.0 KB
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  1. /*
    2. 

  2.  * (C) Copyright 2010 Samsung Electronics
    3. 

  3.  * Minkyu Kang <mk7.kang@samsung.com>
    4. 

  4.  *
    5. 

  5.  * This program is free software; you can redistribute it and/or
    6. 

  6.  * modify it under the terms of the GNU General Public License as
    7. 

  7.  * published by the Free Software Foundation; either version 2 of
    8. 

  8.  * the License, or (at your option) any later version.
    9. 

  9.  *
    10. 

  10.  * This program is distributed in the hope that it will be useful,
    11. 

  11.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    12. 

  12.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    13. 

  13.  * GNU General Public License for more details.
    14. 

  14.  *
    15. 

  15.  * You should have received a copy of the GNU General Public License
    16. 

  16.  * along with this program; if not, write to the Free Software
    17. 

  17.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
    18. 

  18.  * MA 02111-1307 USA
    19. 

  19.  *
    20. 

  20.  */
    21. 

  21. 

  22. #ifndef __ASM_ARM_ARCH_CLOCK_H_
    23. 

  23. #define __ASM_ARM_ARCH_CLOCK_H_
    24. 

  24. 

  25. #ifndef __ASSEMBLY__
    26. 

  26. struct s5pc210_clock {
    27. 

  27. 	unsigned char	res1[0x4200];
    28. 

  28. 	unsigned int	src_leftbus;
    29. 

  29. 	unsigned char	res2[0x1fc];
    30. 

  30. 	unsigned int	mux_stat_leftbus;
    31. 

  31. 	unsigned char	res4[0xfc];
    32. 

  32. 	unsigned int	div_leftbus;
    33. 

  33. 	unsigned char	res5[0xfc];
    34. 

  34. 	unsigned int	div_stat_leftbus;
    35. 

  35. 	unsigned char	res6[0x1fc];
    36. 

  36. 	unsigned int	gate_ip_leftbus;
    37. 

  37. 	unsigned char	res7[0x1fc];
    38. 

  38. 	unsigned int	clkout_leftbus;
    39. 

  39. 	unsigned int	clkout_leftbus_div_stat;
    40. 

  40. 	unsigned char	res8[0x37f8];
    41. 

  41. 	unsigned int	src_rightbus;
    42. 

  42. 	unsigned char	res9[0x1fc];
    43. 

  43. 	unsigned int	mux_stat_rightbus;
    44. 

  44. 	unsigned char	res10[0xfc];
    45. 

  45. 	unsigned int	div_rightbus;
    46. 

  46. 	unsigned char	res11[0xfc];
    47. 

  47. 	unsigned int	div_stat_rightbus;
    48. 

  48. 	unsigned char	res12[0x1fc];
    49. 

  49. 	unsigned int	gate_ip_rightbus;
    50. 

  50. 	unsigned char	res13[0x1fc];
    51. 

  51. 	unsigned int	clkout_rightbus;
    52. 

  52. 	unsigned int	clkout_rightbus_div_stat;
    53. 

  53. 	unsigned char	res14[0x3608];
    54. 

  54. 	unsigned int	epll_lock;
    55. 

  55. 	unsigned char	res15[0xc];
    56. 

  56. 	unsigned int	vpll_lock;
    57. 

  57. 	unsigned char	res16[0xec];
    58. 

  58. 	unsigned int	epll_con0;
    59. 

  59. 	unsigned int	epll_con1;
    60. 

  60. 	unsigned char	res17[0x8];
    61. 

  61. 	unsigned int	vpll_con0;
    62. 

  62. 	unsigned int	vpll_con1;
    63. 

  63. 	unsigned char	res18[0xe8];
    64. 

  64. 	unsigned int	src_top0;
    65. 

  65. 	unsigned int	src_top1;
    66. 

  66. 	unsigned char	res19[0x8];
    67. 

  67. 	unsigned int	src_cam;
    68. 

  68. 	unsigned int	src_tv;
    69. 

  69. 	unsigned int	src_mfc;
    70. 

  70. 	unsigned int	src_g3d;
    71. 

  71. 	unsigned int	src_image;
    72. 

  72. 	unsigned int	src_lcd0;
    73. 

  73. 	unsigned int	src_lcd1;
    74. 

  74. 	unsigned int	src_maudio;
    75. 

  75. 	unsigned int	src_fsys;
    76. 

  76. 	unsigned char	res20[0xc];
    77. 

  77. 	unsigned int	src_peril0;
    78. 

  78. 	unsigned int	src_peril1;
    79. 

  79. 	unsigned char	res21[0xb8];
    80. 

  80. 	unsigned int	src_mask_top;
    81. 

  81. 	unsigned char	res22[0xc];
    82. 

  82. 	unsigned int	src_mask_cam;
    83. 

  83. 	unsigned int	src_mask_tv;
    84. 

  84. 	unsigned char	res23[0xc];
    85. 

  85. 	unsigned int	src_mask_lcd0;
    86. 

  86. 	unsigned int	src_mask_lcd1;
    87. 

  87. 	unsigned int	src_mask_maudio;
    88. 

  88. 	unsigned int	src_mask_fsys;
    89. 

  89. 	unsigned char	res24[0xc];
    90. 

  90. 	unsigned int	src_mask_peril0;
    91. 

  91. 	unsigned int	src_mask_peril1;
    92. 

  92. 	unsigned char	res25[0xb8];
    93. 

  93. 	unsigned int	mux_stat_top;
    94. 

  94. 	unsigned char	res26[0x14];
    95. 

  95. 	unsigned int	mux_stat_mfc;
    96. 

  96. 	unsigned int	mux_stat_g3d;
    97. 

  97. 	unsigned int	mux_stat_image;
    98. 

  98. 	unsigned char	res27[0xdc];
    99. 

  99. 	unsigned int	div_top;
    100. 

  100. 	unsigned char	res28[0xc];
    101. 

  101. 	unsigned int	div_cam;
    102. 

  102. 	unsigned int	div_tv;
    103. 

  103. 	unsigned int	div_mfc;
    104. 

  104. 	unsigned int	div_g3d;
    105. 

  105. 	unsigned int	div_image;
    106. 

  106. 	unsigned int	div_lcd0;
    107. 

  107. 	unsigned int	div_lcd1;
    108. 

  108. 	unsigned int	div_maudio;
    109. 

  109. 	unsigned int	div_fsys0;
    110. 

  110. 	unsigned int	div_fsys1;
    111. 

  111. 	unsigned int	div_fsys2;
    112. 

  112. 	unsigned int	div_fsys3;
    113. 

  113. 	unsigned int	div_peril0;
    114. 

  114. 	unsigned int	div_peril1;
    115. 

  115. 	unsigned int	div_peril2;
    116. 

  116. 	unsigned int	div_peril3;
    117. 

  117. 	unsigned int	div_peril4;
    118. 

  118. 	unsigned int	div_peril5;
    119. 

  119. 	unsigned char	res29[0x18];
    120. 

  120. 	unsigned int	div2_ratio;
    121. 

  121. 	unsigned char	res30[0x8c];
    122. 

  122. 	unsigned int	div_stat_top;
    123. 

  123. 	unsigned char	res31[0xc];
    124. 

  124. 	unsigned int	div_stat_cam;
    125. 

  125. 	unsigned int	div_stat_tv;
    126. 

  126. 	unsigned int	div_stat_mfc;
    127. 

  127. 	unsigned int	div_stat_g3d;
    128. 

  128. 	unsigned int	div_stat_image;
    129. 

  129. 	unsigned int	div_stat_lcd0;
    130. 

  130. 	unsigned int	div_stat_lcd1;
    131. 

  131. 	unsigned int	div_stat_maudio;
    132. 

  132. 	unsigned int	div_stat_fsys0;
    133. 

  133. 	unsigned int	div_stat_fsys1;
    134. 

  134. 	unsigned int	div_stat_fsys2;
    135. 

  135. 	unsigned int	div_stat_fsys3;
    136. 

  136. 	unsigned int	div_stat_peril0;
    137. 

  137. 	unsigned int	div_stat_peril1;
    138. 

  138. 	unsigned int	div_stat_peril2;
    139. 

  139. 	unsigned int	div_stat_peril3;
    140. 

  140. 	unsigned int	div_stat_peril4;
    141. 

  141. 	unsigned int	div_stat_peril5;
    142. 

  142. 	unsigned char	res32[0x18];
    143. 

  143. 	unsigned int	div2_stat;
    144. 

  144. 	unsigned char	res33[0x29c];
    145. 

  145. 	unsigned int	gate_ip_cam;
    146. 

  146. 	unsigned int	gate_ip_tv;
    147. 

  147. 	unsigned int	gate_ip_mfc;
    148. 

  148. 	unsigned int	gate_ip_g3d;
    149. 

  149. 	unsigned int	gate_ip_image;
    150. 

  150. 	unsigned int	gate_ip_lcd0;
    151. 

  151. 	unsigned int	gate_ip_lcd1;
    152. 

  152. 	unsigned char	res34[0x4];
    153. 

  153. 	unsigned int	gate_ip_fsys;
    154. 

  154. 	unsigned char	res35[0x8];
    155. 

  155. 	unsigned int	gate_ip_gps;
    156. 

  156. 	unsigned int	gate_ip_peril;
    157. 

  157. 	unsigned char	res36[0xc];
    158. 

  158. 	unsigned int	gate_ip_perir;
    159. 

  159. 	unsigned char	res37[0xc];
    160. 

  160. 	unsigned int	gate_block;
    161. 

  161. 	unsigned char	res38[0x8c];
    162. 

  162. 	unsigned int	clkout_cmu_top;
    163. 

  163. 	unsigned int	clkout_cmu_top_div_stat;
    164. 

  164. 	unsigned char	res39[0x37f8];
    165. 

  165. 	unsigned int	src_dmc;
    166. 

  166. 	unsigned char	res40[0xfc];
    167. 

  167. 	unsigned int	src_mask_dmc;
    168. 

  168. 	unsigned char	res41[0xfc];
    169. 

  169. 	unsigned int	mux_stat_dmc;
    170. 

  170. 	unsigned char	res42[0xfc];
    171. 

  171. 	unsigned int	div_dmc0;
    172. 

  172. 	unsigned int	div_dmc1;
    173. 

  173. 	unsigned char	res43[0xf8];
    174. 

  174. 	unsigned int	div_stat_dmc0;
    175. 

  175. 	unsigned int	div_stat_dmc1;
    176. 

  176. 	unsigned char	res44[0x2f8];
    177. 

  177. 	unsigned int	gate_ip_dmc;
    178. 

  178. 	unsigned char	res45[0xfc];
    179. 

  179. 	unsigned int	clkout_cmu_dmc;
    180. 

  180. 	unsigned int	clkout_cmu_dmc_div_stat;
    181. 

  181. 	unsigned char	res46[0x5f8];
    182. 

  182. 	unsigned int	dcgidx_map0;
    183. 

  183. 	unsigned int	dcgidx_map1;
    184. 

  184. 	unsigned int	dcgidx_map2;
    185. 

  185. 	unsigned char	res47[0x14];
    186. 

  186. 	unsigned int	dcgperf_map0;
    187. 

  187. 	unsigned int	dcgperf_map1;
    188. 

  188. 	unsigned char	res48[0x18];
    189. 

  189. 	unsigned int	dvcidx_map;
    190. 

  190. 	unsigned char	res49[0x1c];
    191. 

  191. 	unsigned int	freq_cpu;
    192. 

  192. 	unsigned int	freq_dpm;
    193. 

  193. 	unsigned char	res50[0x18];
    194. 

  194. 	unsigned int	dvsemclk_en;
    195. 

  195. 	unsigned int	maxperf;
    196. 

  196. 	unsigned char	res51[0x2f78];
    197. 

  197. 	unsigned int	apll_lock;
    198. 

  198. 	unsigned char	res52[0x4];
    199. 

  199. 	unsigned int	mpll_lock;
    200. 

  200. 	unsigned char	res53[0xf4];
    201. 

  201. 	unsigned int	apll_con0;
    202. 

  202. 	unsigned int	apll_con1;
    203. 

  203. 	unsigned int	mpll_con0;
    204. 

  204. 	unsigned int	mpll_con1;
    205. 

  205. 	unsigned char	res54[0xf0];
    206. 

  206. 	unsigned int	src_cpu;
    207. 

  207. 	unsigned char	res55[0x1fc];
    208. 

  208. 	unsigned int	mux_stat_cpu;
    209. 

  209. 	unsigned char	res56[0xfc];
    210. 

  210. 	unsigned int	div_cpu0;
    211. 

  211. 	unsigned int	div_cpu1;
    212. 

  212. 	unsigned char	res57[0xf8];
    213. 

  213. 	unsigned int	div_stat_cpu0;
    214. 

  214. 	unsigned int	div_stat_cpu1;
    215. 

  215. 	unsigned char	res58[0x3f8];
    216. 

  216. 	unsigned int	clkout_cmu_cpu;
    217. 

  217. 	unsigned int	clkout_cmu_cpu_div_stat;
    218. 

  218. 	unsigned char	res59[0x5f8];
    219. 

  219. 	unsigned int	armclk_stopctrl;
    220. 

  220. 	unsigned int	atclk_stopctrl;
    221. 

  221. 	unsigned char	res60[0x8];
    222. 

  222. 	unsigned int	parityfail_status;
    223. 

  223. 	unsigned int	parityfail_clear;
    224. 

  224. 	unsigned char	res61[0xe8];
    225. 

  225. 	unsigned int	apll_con0_l8;
    226. 

  226. 	unsigned int	apll_con0_l7;
    227. 

  227. 	unsigned int	apll_con0_l6;
    228. 

  228. 	unsigned int	apll_con0_l5;
    229. 

  229. 	unsigned int	apll_con0_l4;
    230. 

  230. 	unsigned int	apll_con0_l3;
    231. 

  231. 	unsigned int	apll_con0_l2;
    232. 

  232. 	unsigned int	apll_con0_l1;
    233. 

  233. 	unsigned int	iem_control;
    234. 

  234. 	unsigned char	res62[0xdc];
    235. 

  235. 	unsigned int	apll_con1_l8;
    236. 

  236. 	unsigned int	apll_con1_l7;
    237. 

  237. 	unsigned int	apll_con1_l6;
    238. 

  238. 	unsigned int	apll_con1_l5;
    239. 

  239. 	unsigned int	apll_con1_l4;
    240. 

  240. 	unsigned int	apll_con1_l3;
    241. 

  241. 	unsigned int	apll_con1_l2;
    242. 

  242. 	unsigned int	apll_con1_l1;
    243. 

  243. 	unsigned char	res63[0xe0];
    244. 

  244. 	unsigned int	div_iem_l8;
    245. 

  245. 	unsigned int	div_iem_l7;
    246. 

  246. 	unsigned int	div_iem_l6;
    247. 

  247. 	unsigned int	div_iem_l5;
    248. 

  248. 	unsigned int	div_iem_l4;
    249. 

  249. 	unsigned int	div_iem_l3;
    250. 

  250. 	unsigned int	div_iem_l2;
    251. 

  251. 	unsigned int	div_iem_l1;
    252. 

  252. };
    253. 

  253. #endif
    254. 

  254. 

  255. #endif
    256.