lowlevel_init.S 2.3 KB

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  1. /*
  2. * Board specific setup info
  3. *
  4. * (C) Copyright 2010
  5. * Texas Instruments, <www.ti.com>
  6. *
  7. * Author :
  8. * Aneesh V <aneesh@ti.com>
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #include <asm/arch/omap4.h>
  29. #ifdef CONFIG_SPL_BUILD
  30. .global save_boot_params
  31. save_boot_params:
  32. /*
  33. * See if the rom code passed pointer is valid:
  34. * It is not valid if it is not in non-secure SRAM
  35. * This may happen if you are booting with the help of
  36. * debugger
  37. */
  38. ldr r2, =NON_SECURE_SRAM_START
  39. cmp r2, r0
  40. bgt 1f
  41. ldr r2, =NON_SECURE_SRAM_END
  42. cmp r2, r0
  43. blt 1f
  44. /* Store the boot device in omap4_boot_device */
  45. ldr r2, [r0, #BOOT_DEVICE_OFFSET] @ r1 <- value of boot device
  46. and r2, #BOOT_DEVICE_MASK
  47. ldr r3, =omap4_boot_device
  48. str r2, [r3] @ omap4_boot_device <- r1
  49. /* Store the boot mode (raw/FAT) in omap4_boot_mode */
  50. ldr r2, [r0, #DEV_DESC_PTR_OFFSET] @ get the device descriptor ptr
  51. ldr r2, [r2, #DEV_DATA_PTR_OFFSET] @ get the pDeviceData ptr
  52. ldr r2, [r2, #BOOT_MODE_OFFSET] @ get the boot mode
  53. ldr r3, =omap4_boot_mode
  54. str r2, [r3]
  55. 1:
  56. bx lr
  57. #endif
  58. .globl lowlevel_init
  59. lowlevel_init:
  60. /*
  61. * Setup a temporary stack
  62. */
  63. ldr sp, =LOW_LEVEL_SRAM_STACK
  64. /*
  65. * Save the old lr(passed in ip) and the current lr to stack
  66. */
  67. push {ip, lr}
  68. /*
  69. * go setup pll, mux, memory
  70. */
  71. bl s_init
  72. pop {ip, pc}
  73. .globl set_pl310_ctrl_reg
  74. set_pl310_ctrl_reg:
  75. PUSH {r4-r11, lr} @ save registers - ROM code may pollute
  76. @ our registers
  77. LDR r12, =0x102 @ Set PL310 control register - value in R0
  78. .word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5
  79. @ call ROM Code API to set control register
  80. POP {r4-r11, pc}