cpu.c 2.6 KB

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  1. /*
  2. *
  3. * (C) Copyright 2000-2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  7. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <common.h>
  28. #include <watchdog.h>
  29. #include <command.h>
  30. #include <asm/immap.h>
  31. DECLARE_GLOBAL_DATA_PTR;
  32. int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
  33. {
  34. volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
  35. udelay(1000);
  36. rcm->rcr |= RCM_RCR_SOFTRST;
  37. /* we don't return! */
  38. return 0;
  39. };
  40. int checkcpu(void)
  41. {
  42. volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
  43. u16 msk;
  44. u16 id = 0;
  45. u8 ver;
  46. puts("CPU: ");
  47. msk = (ccm->cir >> 6);
  48. ver = (ccm->cir & 0x003f);
  49. switch (msk) {
  50. case 0x54:
  51. id = 5329;
  52. break;
  53. case 0x59:
  54. id = 5328;
  55. break;
  56. case 0x61:
  57. id = 5327;
  58. break;
  59. }
  60. if (id) {
  61. printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
  62. ver);
  63. printf(" CPU CLK %d Mhz BUS CLK %d Mhz\n",
  64. (int)(gd->cpu_clk / 1000000),
  65. (int)(gd->bus_clk / 1000000));
  66. }
  67. return 0;
  68. };
  69. #if defined(CONFIG_WATCHDOG)
  70. /* Called by macro WATCHDOG_RESET */
  71. void watchdog_reset(void)
  72. {
  73. volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  74. wdp->sr = 0x5555; /* Count register */
  75. }
  76. int watchdog_disable(void)
  77. {
  78. volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  79. /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
  80. wdp->cr |= WTM_WCR_HALTED; /* halted watchdog timer */
  81. puts("WATCHDOG:disabled\n");
  82. return (0);
  83. }
  84. int watchdog_init(void)
  85. {
  86. volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
  87. u32 wdog_module = 0;
  88. /* set timeout and enable watchdog */
  89. wdog_module = ((CFG_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT);
  90. wdog_module |= (wdog_module / 8192);
  91. wdp->mr = wdog_module;
  92. wdp->cr = WTM_WCR_EN;
  93. puts("WATCHDOG:enabled\n");
  94. return (0);
  95. }
  96. #endif /* CONFIG_WATCHDOG */