ar405.c 10 KB

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  1. /*
  2. * (C) Copyright 2001-2004
  3. * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include "ar405.h"
  25. #include <asm/processor.h>
  26. #include <asm/io.h>
  27. #include <command.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. extern void lxt971_no_sleep(void);
  30. /* ------------------------------------------------------------------------- */
  31. #if 0
  32. #define FPGA_DEBUG
  33. #endif
  34. /* fpga configuration data - generated by bin2cc */
  35. const unsigned char fpgadata[] = {
  36. #include "fpgadata.c"
  37. };
  38. const unsigned char fpgadata_xl30[] = {
  39. #include "fpgadata_xl30.c"
  40. };
  41. /*
  42. * include common fpga code (for esd boards)
  43. */
  44. #include "../common/fpga.c"
  45. int board_early_init_f (void)
  46. {
  47. int index, len, i;
  48. int status;
  49. #ifdef FPGA_DEBUG
  50. /* set up serial port with default baudrate */
  51. (void) get_clocks ();
  52. gd->baudrate = CONFIG_BAUDRATE;
  53. serial_init ();
  54. console_init_f ();
  55. #endif
  56. /*
  57. * Boot onboard FPGA
  58. */
  59. /* first try 40er image */
  60. gd->board_type = 40;
  61. status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
  62. if (status != 0) {
  63. /* try xl30er image */
  64. gd->board_type = 30;
  65. status = fpga_boot ((unsigned char *) fpgadata_xl30, sizeof (fpgadata_xl30));
  66. if (status != 0) {
  67. /* booting FPGA failed */
  68. #ifndef FPGA_DEBUG
  69. /* set up serial port with default baudrate */
  70. (void) get_clocks ();
  71. gd->baudrate = CONFIG_BAUDRATE;
  72. serial_init ();
  73. console_init_f ();
  74. #endif
  75. printf ("\nFPGA: Booting failed ");
  76. switch (status) {
  77. case ERROR_FPGA_PRG_INIT_LOW:
  78. printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
  79. break;
  80. case ERROR_FPGA_PRG_INIT_HIGH:
  81. printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
  82. break;
  83. case ERROR_FPGA_PRG_DONE:
  84. printf ("(Timeout: DONE not high after programming FPGA)\n ");
  85. break;
  86. }
  87. /* display infos on fpgaimage */
  88. index = 15;
  89. for (i = 0; i < 4; i++) {
  90. len = fpgadata[index];
  91. printf ("FPGA: %s\n", &(fpgadata[index + 1]));
  92. index += len + 3;
  93. }
  94. putc ('\n');
  95. /* delayed reboot */
  96. for (i = 20; i > 0; i--) {
  97. printf ("Rebooting in %2d seconds \r", i);
  98. for (index = 0; index < 1000; index++)
  99. udelay (1000);
  100. }
  101. putc ('\n');
  102. do_reset (NULL, 0, 0, NULL);
  103. }
  104. }
  105. /*
  106. * IRQ 0-15 405GP internally generated; active high; level sensitive
  107. * IRQ 16 405GP internally generated; active low; level sensitive
  108. * IRQ 17-24 RESERVED
  109. * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  110. * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
  111. * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
  112. * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
  113. * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
  114. * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
  115. * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
  116. */
  117. mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
  118. mtdcr (UIC0ER, 0x00000000); /* disable all ints */
  119. mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
  120. mtdcr (UIC0PR, 0xFFFFFF81); /* set int polarities */
  121. mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
  122. mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
  123. mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
  124. out_be16((void *)0xf03000ec, 0x0fff); /* enable interrupts in fpga */
  125. return 0;
  126. }
  127. /*
  128. * Check Board Identity:
  129. */
  130. int checkboard (void)
  131. {
  132. int index;
  133. int len;
  134. char str[64];
  135. int i = getenv_f("serial#", str, sizeof (str));
  136. const unsigned char *fpga;
  137. puts ("Board: ");
  138. if (i == -1) {
  139. puts ("### No HW ID - assuming AR405");
  140. } else {
  141. puts(str);
  142. }
  143. puts ("\nFPGA: ");
  144. /* display infos on fpgaimage */
  145. if (gd->board_type == 30) {
  146. fpga = fpgadata_xl30;
  147. } else {
  148. fpga = fpgadata;
  149. }
  150. index = 15;
  151. for (i = 0; i < 4; i++) {
  152. len = fpga[index];
  153. printf ("%s ", &(fpga[index + 1]));
  154. index += len + 3;
  155. }
  156. putc ('\n');
  157. /*
  158. * Disable sleep mode in LXT971
  159. */
  160. lxt971_no_sleep();
  161. return 0;
  162. }
  163. #if 1 /* test-only: some internal test routines... */
  164. #define DIGEN ((void *)0xf03000b4) /* u8 */
  165. #define DIGOUT ((void *)0xf03000b0) /* u16 */
  166. #define DIGIN ((void *)0xf03000a0) /* u16 */
  167. /*
  168. * Some test routines
  169. */
  170. int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  171. {
  172. int i;
  173. int k;
  174. int start;
  175. int end;
  176. if (argc != 3) {
  177. puts("Usage: digtest n_start n_end (digtest 0 7)\n");
  178. return 0;
  179. }
  180. start = simple_strtol (argv[1], NULL, 10);
  181. end = simple_strtol (argv[2], NULL, 10);
  182. /*
  183. * Enable digital outputs
  184. */
  185. out_8(DIGEN, 0x08);
  186. printf("\nStarting digital In-/Out Test from I/O %d to %d (Cntrl-C to abort)...\n",
  187. start, end);
  188. /*
  189. * Set outputs one by one
  190. */
  191. for (;;) {
  192. for (i=start; i<=end; i++) {
  193. out_be16(DIGOUT, 0x0001 << i);
  194. for (k=0; k<200; k++)
  195. udelay(1000);
  196. if (in_be16(DIGIN) != (0x0001 << i)) {
  197. printf("ERROR: OUT=0x%04X, IN=0x%04X\n",
  198. 0x0001 << i, in_be16(DIGIN));
  199. return 0;
  200. }
  201. /* Abort if ctrl-c was pressed */
  202. if (ctrlc()) {
  203. puts("\nAbort\n");
  204. return 0;
  205. }
  206. }
  207. }
  208. return 0;
  209. }
  210. U_BOOT_CMD(
  211. digtest, 3, 1, do_digtest,
  212. "Test digital in-/output",
  213. ""
  214. );
  215. #define ERROR_DELTA 256
  216. struct io {
  217. short val;
  218. short dummy;
  219. };
  220. int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  221. {
  222. short val;
  223. int i;
  224. int volt;
  225. struct io *out;
  226. struct io *in;
  227. out = (struct io *)0xf0300090;
  228. in = (struct io *)0xf0300000;
  229. i = simple_strtol (argv[1], NULL, 10);
  230. volt = 0;
  231. printf("Setting Channel %d to %dV...\n", i, volt);
  232. out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
  233. udelay(10000);
  234. val = in_be16((void *)&(in[i*2].val));
  235. printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
  236. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  237. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  238. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  239. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  240. return -1;
  241. }
  242. val = in_be16((void *)&(in[i*2+1].val));
  243. printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
  244. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  245. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  246. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  247. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  248. return -1;
  249. }
  250. volt = 5;
  251. printf("Setting Channel %d to %dV...\n", i, volt);
  252. out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
  253. udelay(10000);
  254. val = in_be16((void *)&(in[i*2].val));
  255. printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
  256. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  257. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  258. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  259. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  260. return -1;
  261. }
  262. val = in_be16((void *)&(in[i*2+1].val));
  263. printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
  264. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  265. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  266. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  267. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  268. return -1;
  269. }
  270. volt = 10;
  271. printf("Setting Channel %d to %dV...\n", i, volt);
  272. out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10);
  273. udelay(10000);
  274. val = in_be16((void *)&(in[i*2].val));
  275. printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff);
  276. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  277. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  278. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  279. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  280. return -1;
  281. }
  282. val = in_be16((void *)&(in[i*2+1].val));
  283. printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff);
  284. if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) ||
  285. (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) {
  286. printf("ERROR! (min=0x%04x max=0x%04x)\n", ((volt * 0x7fff) / 40) - ERROR_DELTA,
  287. ((volt * 0x7fff) / 40) + ERROR_DELTA);
  288. return -1;
  289. }
  290. printf("Channel %d OK!\n", i);
  291. return 0;
  292. }
  293. U_BOOT_CMD(
  294. anatest, 2, 1, do_anatest,
  295. "Test analog in-/output",
  296. ""
  297. );
  298. int counter = 0;
  299. void cyclicInt(void *ptr)
  300. {
  301. out_be16((void *)0xf03000e8, 0x0800); /* ack int */
  302. counter++;
  303. }
  304. int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  305. {
  306. ulong *incin;
  307. int i;
  308. incin = (ulong *)0xf0300040;
  309. /*
  310. * Clear inc counter
  311. */
  312. out_be32((void *)&incin[0], 0);
  313. out_be32((void *)&incin[1], 0);
  314. out_be32((void *)&incin[2], 0);
  315. out_be32((void *)&incin[3], 0);
  316. incin = (ulong *)0xf0300050;
  317. /*
  318. * Inc a little
  319. */
  320. for (i=0; i<10000; i++) {
  321. switch (i & 0x03) {
  322. case 0:
  323. out_8(DIGEN, 0x02);
  324. break;
  325. case 1:
  326. out_8(DIGEN, 0x03);
  327. break;
  328. case 2:
  329. out_8(DIGEN, 0x01);
  330. break;
  331. case 3:
  332. out_8(DIGEN, 0x00);
  333. break;
  334. }
  335. udelay(10);
  336. }
  337. printf("Inc 0 = %d\n", in_be32((void *)&incin[0]));
  338. printf("Inc 1 = %d\n", in_be32((void *)&incin[1]));
  339. printf("Inc 2 = %d\n", in_be32((void *)&incin[2]));
  340. printf("Inc 3 = %d\n", in_be32((void *)&incin[3]));
  341. out_be16((void *)0xf03000e0, 0x0c80-1); /* set counter */
  342. out_be16((void *)0xf03000ec,
  343. in_be16((void *)0xf03000ec) | 0x0800); /* enable int */
  344. irq_install_handler (30, (interrupt_handler_t *) cyclicInt, NULL);
  345. printf("counter=%d\n", counter);
  346. return 0;
  347. }
  348. U_BOOT_CMD(
  349. inctest, 3, 1, do_inctest,
  350. "Test incremental encoder inputs",
  351. ""
  352. );
  353. #endif