ehci-kirkwood.c 2.6 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Marvell Semiconductor <www.marvell.com>
  4. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  22. * MA 02110-1301 USA
  23. */
  24. #include <common.h>
  25. #include <asm/io.h>
  26. #include <usb.h>
  27. #include "ehci.h"
  28. #include "ehci-core.h"
  29. #include <asm/arch/kirkwood.h>
  30. #define rdl(off) readl(KW_USB20_BASE + (off))
  31. #define wrl(off, val) writel((val), KW_USB20_BASE + (off))
  32. #define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4))
  33. #define USB_WINDOW_BASE(i) (0x324 + ((i) << 4))
  34. #define USB_TARGET_DRAM 0x0
  35. /*
  36. * USB 2.0 Bridge Address Decoding registers setup
  37. */
  38. static void usb_brg_adrdec_setup(void)
  39. {
  40. int i;
  41. u32 size, attrib;
  42. for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  43. /* Enable DRAM bank */
  44. switch (i) {
  45. case 0:
  46. attrib = KWCPU_ATTR_DRAM_CS0;
  47. break;
  48. case 1:
  49. attrib = KWCPU_ATTR_DRAM_CS1;
  50. break;
  51. case 2:
  52. attrib = KWCPU_ATTR_DRAM_CS2;
  53. break;
  54. case 3:
  55. attrib = KWCPU_ATTR_DRAM_CS3;
  56. break;
  57. default:
  58. /* invalide bank, disable access */
  59. attrib = 0;
  60. break;
  61. }
  62. size = kw_sdram_bs(i);
  63. if ((size) && (attrib))
  64. wrl(USB_WINDOW_CTRL(i),
  65. KWCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM,
  66. attrib, KWCPU_WIN_ENABLE));
  67. else
  68. wrl(USB_WINDOW_CTRL(i), KWCPU_WIN_DISABLE);
  69. wrl(USB_WINDOW_BASE(i), kw_sdram_bar(i));
  70. }
  71. }
  72. /*
  73. * Create the appropriate control structures to manage
  74. * a new EHCI host controller.
  75. */
  76. int ehci_hcd_init(void)
  77. {
  78. usb_brg_adrdec_setup();
  79. hccr = (struct ehci_hccr *)(KW_USB20_BASE + 0x100);
  80. hcor = (struct ehci_hcor *)((uint32_t) hccr
  81. + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
  82. debug("Kirkwood-ehci: init hccr %x and hcor %x hc_length %d\n",
  83. (uint32_t)hccr, (uint32_t)hcor,
  84. (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
  85. return 0;
  86. }
  87. /*
  88. * Destroy the appropriate control structures corresponding
  89. * the the EHCI host controller.
  90. */
  91. int ehci_hcd_stop(void)
  92. {
  93. return 0;
  94. }