skge.c 133 KB

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  1. /******************************************************************************
  2. *
  3. * Name: skge.c
  4. * Project: GEnesis, PCI Gigabit Ethernet Adapter
  5. * Version: $Revision: 1.46 $
  6. * Date: $Date: 2003/02/25 14:16:36 $
  7. * Purpose: The main driver source module
  8. *
  9. ******************************************************************************/
  10. /******************************************************************************
  11. *
  12. * (C)Copyright 1998-2003 SysKonnect GmbH.
  13. *
  14. * Driver for SysKonnect Gigabit Ethernet Server Adapters:
  15. *
  16. * SK-9871 (single link 1000Base-ZX)
  17. * SK-9872 (dual link 1000Base-ZX)
  18. * SK-9861 (single link 1000Base-SX, VF45 Volition Plug)
  19. * SK-9862 (dual link 1000Base-SX, VF45 Volition Plug)
  20. * SK-9841 (single link 1000Base-LX)
  21. * SK-9842 (dual link 1000Base-LX)
  22. * SK-9843 (single link 1000Base-SX)
  23. * SK-9844 (dual link 1000Base-SX)
  24. * SK-9821 (single link 1000Base-T)
  25. * SK-9822 (dual link 1000Base-T)
  26. * SK-9881 (single link 1000Base-SX V2 LC)
  27. * SK-9871 (single link 1000Base-ZX V2)
  28. * SK-9861 (single link 1000Base-SX V2, VF45 Volition Plug)
  29. * SK-9841 (single link 1000Base-LX V2)
  30. * SK-9843 (single link 1000Base-SX V2)
  31. * SK-9821 (single link 1000Base-T V2)
  32. *
  33. * Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
  34. * SysKonnects GEnesis Solaris driver
  35. * Author: Christoph Goos (cgoos@syskonnect.de)
  36. * Mirko Lindner (mlindner@syskonnect.de)
  37. *
  38. * Address all question to: linux@syskonnect.de
  39. *
  40. * The technical manual for the adapters is available from SysKonnect's
  41. * web pages: www.syskonnect.com
  42. * Goto "Support" and search Knowledge Base for "manual".
  43. *
  44. * This program is free software; you can redistribute it and/or modify
  45. * it under the terms of the GNU General Public License as published by
  46. * the Free Software Foundation; either version 2 of the License, or
  47. * (at your option) any later version.
  48. *
  49. * The information in this file is provided "AS IS" without warranty.
  50. *
  51. ******************************************************************************/
  52. /******************************************************************************
  53. *
  54. * History:
  55. *
  56. * $Log: skge.c,v $
  57. * Revision 1.46 2003/02/25 14:16:36 mlindner
  58. * Fix: Copyright statement
  59. *
  60. * Revision 1.45 2003/02/25 13:25:55 mlindner
  61. * Add: Performance improvements
  62. * Add: Support for various vendors
  63. * Fix: Init function
  64. *
  65. * Revision 1.44 2003/01/09 09:25:26 mlindner
  66. * Fix: Remove useless init_module/cleanup_module forward declarations
  67. *
  68. * Revision 1.43 2002/11/29 08:42:41 mlindner
  69. * Fix: Boot message
  70. *
  71. * Revision 1.42 2002/11/28 13:30:23 mlindner
  72. * Add: New frame check
  73. *
  74. * Revision 1.41 2002/11/27 13:55:18 mlindner
  75. * Fix: Drop wrong csum packets
  76. * Fix: Initialize proc_entry after hw check
  77. *
  78. * Revision 1.40 2002/10/31 07:50:37 tschilli
  79. * Function SkGeInitAssignRamToQueues() from common module inserted.
  80. * Autonegotiation is set to ON for all adapters.
  81. * LinkSpeedUsed is used in link up status report.
  82. * Role parameter will show up for 1000 Mbps links only.
  83. * GetConfiguration() inserted after init level 1 in SkGeChangeMtu().
  84. * All return values of SkGeInit() and SkGeInitPort() are checked.
  85. *
  86. * Revision 1.39 2002/10/02 12:56:05 mlindner
  87. * Add: Support for Yukon
  88. * Add: Support for ZEROCOPY, scatter-gather and hw checksum
  89. * Add: New transmit ring function (use SG and TCP/UDP hardware checksumming)
  90. * Add: New init function
  91. * Add: Speed check and setup
  92. * Add: Merge source for kernel 2.2.x and 2.4.x
  93. * Add: Opcode check for tcp
  94. * Add: Frame length check
  95. * Fix: Transmit complete interrupt
  96. * Fix: Interrupt moderation
  97. *
  98. * Revision 1.29.2.13 2002/01/14 12:44:52 mlindner
  99. * Fix: Rlmt modes
  100. *
  101. * Revision 1.29.2.12 2001/12/07 12:06:18 mlindner
  102. * Fix: malloc -> slab changes
  103. *
  104. * Revision 1.29.2.11 2001/12/06 15:19:20 mlindner
  105. * Add: DMA attributes
  106. * Fix: Module initialisation
  107. * Fix: pci_map_single and pci_unmap_single replaced
  108. *
  109. * Revision 1.29.2.10 2001/12/06 09:56:50 mlindner
  110. * Corrected some printk's
  111. *
  112. * Revision 1.29.2.9 2001/09/05 12:15:34 mlindner
  113. * Add: LBFO Changes
  114. * Fix: Counter Errors (Jumbo == to long errors)
  115. * Fix: Changed pAC->PciDev declaration
  116. * Fix: too short counters
  117. *
  118. * Revision 1.29.2.8 2001/06/25 12:10:44 mlindner
  119. * fix: ReceiveIrq() changed.
  120. *
  121. * Revision 1.29.2.7 2001/06/25 08:07:05 mlindner
  122. * fix: RLMT locking in ReceiveIrq() changed.
  123. *
  124. * Revision 1.29.2.6 2001/05/21 07:59:29 mlindner
  125. * fix: MTU init problems
  126. *
  127. * Revision 1.29.2.5 2001/05/08 11:25:08 mlindner
  128. * fix: removed VLAN error message
  129. *
  130. * Revision 1.29.2.4 2001/05/04 13:31:43 gklug
  131. * fix: do not handle eth_copy on bad fragments received.
  132. *
  133. * Revision 1.29.2.3 2001/04/23 08:06:43 mlindner
  134. * Fix: error handling
  135. *
  136. * Revision 1.29.2.2 2001/03/15 12:04:54 mlindner
  137. * Fixed memory problem
  138. *
  139. * Revision 1.29.2.1 2001/03/12 16:41:44 mlindner
  140. * add: procfs function
  141. * add: dual-net function
  142. * add: RLMT networks
  143. * add: extended PNMI features
  144. *
  145. * Kernel 2.4.x specific:
  146. * Revision 1.xx 2000/09/12 13:31:56 cgoos
  147. * Fixed missign "dev=NULL in skge_probe.
  148. * Added counting for jumbo frames (corrects error statistic).
  149. * Removed VLAN tag check (enables VLAN support).
  150. *
  151. * Kernel 2.2.x specific:
  152. * Revision 1.29 2000/02/21 13:31:56 cgoos
  153. * Fixed "unused" warning for UltraSPARC change.
  154. *
  155. * Partially kernel 2.2.x specific:
  156. * Revision 1.28 2000/02/21 10:32:36 cgoos
  157. * Added fixes for UltraSPARC.
  158. * Now printing RlmtMode and PrefPort setting at startup.
  159. * Changed XmitFrame return value.
  160. * Fixed rx checksum calculation for BIG ENDIAN systems.
  161. * Fixed rx jumbo frames counted as ierrors.
  162. *
  163. *
  164. * Revision 1.27 1999/11/25 09:06:28 cgoos
  165. * Changed base_addr to unsigned long.
  166. *
  167. * Revision 1.26 1999/11/22 13:29:16 cgoos
  168. * Changed license header to GPL.
  169. * Changes for inclusion in linux kernel (2.2.13).
  170. * Removed 2.0.x defines.
  171. * Changed SkGeProbe to skge_probe.
  172. * Added checks in SkGeIoctl.
  173. *
  174. * Revision 1.25 1999/10/07 14:47:52 cgoos
  175. * Changed 984x to 98xx.
  176. *
  177. * Revision 1.24 1999/09/30 07:21:01 cgoos
  178. * Removed SK_RLMT_SLOW_LOOKAHEAD option.
  179. * Giving spanning tree packets also to OS now.
  180. *
  181. * Revision 1.23 1999/09/29 07:36:50 cgoos
  182. * Changed assignment for IsBc/IsMc.
  183. *
  184. * Revision 1.22 1999/09/28 12:57:09 cgoos
  185. * Added CheckQueue also to Single-Port-ISR.
  186. *
  187. * Revision 1.21 1999/09/28 12:42:41 cgoos
  188. * Changed parameter strings for RlmtMode.
  189. *
  190. * Revision 1.20 1999/09/28 12:37:57 cgoos
  191. * Added CheckQueue for fast delivery of RLMT frames.
  192. *
  193. * Revision 1.19 1999/09/16 07:57:25 cgoos
  194. * Copperfield changes.
  195. *
  196. * Revision 1.18 1999/09/03 13:06:30 cgoos
  197. * Fixed RlmtMode=CheckSeg bug: wrong DEV_KFREE_SKB in RLMT_SEND caused
  198. * double allocated skb's.
  199. * FrameStat in ReceiveIrq was accessed via wrong Rxd.
  200. * Queue size for async. standby Tx queue was zero.
  201. * FillRxLimit of 0 could cause problems with ReQueue, changed to 1.
  202. * Removed debug output of checksum statistic.
  203. *
  204. * Revision 1.17 1999/08/11 13:55:27 cgoos
  205. * Transmit descriptor polling was not reenabled after SkGePortInit.
  206. *
  207. * Revision 1.16 1999/07/27 15:17:29 cgoos
  208. * Added some "\n" in output strings (removed while debuging...).
  209. *
  210. * Revision 1.15 1999/07/23 12:09:30 cgoos
  211. * Performance optimization, rx checksumming, large frame support.
  212. *
  213. * Revision 1.14 1999/07/14 11:26:27 cgoos
  214. * Removed Link LED settings (now in RLMT).
  215. * Added status output at NET UP.
  216. * Fixed SMP problems with Tx and SWITCH running in parallel.
  217. * Fixed return code problem at RLMT_SEND event.
  218. *
  219. * Revision 1.13 1999/04/07 10:11:42 cgoos
  220. * Fixed Single Port problems.
  221. * Fixed Multi-Adapter problems.
  222. * Always display startup string.
  223. *
  224. * Revision 1.12 1999/03/29 12:26:37 cgoos
  225. * Reversed locking to fine granularity.
  226. * Fixed skb double alloc problem (caused by incorrect xmit return code).
  227. * Enhanced function descriptions.
  228. *
  229. * Revision 1.11 1999/03/15 13:10:51 cgoos
  230. * Changed device identifier in output string to ethX.
  231. *
  232. * Revision 1.10 1999/03/15 12:12:34 cgoos
  233. * Changed copyright notice.
  234. *
  235. * Revision 1.9 1999/03/15 12:10:17 cgoos
  236. * Changed locking to one driver lock.
  237. * Added check of SK_AC-size (for consistency with library).
  238. *
  239. * Revision 1.8 1999/03/08 11:44:02 cgoos
  240. * Fixed missing dev->tbusy in SkGeXmit.
  241. * Changed large frame (jumbo) buffer number.
  242. * Added copying of short frames.
  243. *
  244. * Revision 1.7 1999/03/04 13:26:57 cgoos
  245. * Fixed spinlock calls for SMP.
  246. *
  247. * Revision 1.6 1999/03/02 09:53:51 cgoos
  248. * Added descriptor revertion for big endian machines.
  249. *
  250. * Revision 1.5 1999/03/01 08:50:59 cgoos
  251. * Fixed SkGeChangeMtu.
  252. * Fixed pci config space accesses.
  253. *
  254. * Revision 1.4 1999/02/18 15:48:44 cgoos
  255. * Corrected some printk's.
  256. *
  257. * Revision 1.3 1999/02/18 12:45:55 cgoos
  258. * Changed SK_MAX_CARD_PARAM to default 16
  259. *
  260. * Revision 1.2 1999/02/18 10:55:32 cgoos
  261. * Removed SkGeDrvTimeStamp function.
  262. * Printing "ethX:" before adapter type at adapter init.
  263. *
  264. *
  265. * 10-Feb-1999 cg Created, based on Linux' acenic.c, 3c59x.c and
  266. * SysKonnects GEnesis Solaris driver
  267. *
  268. ******************************************************************************/
  269. /******************************************************************************
  270. *
  271. * Possible compiler options (#define xxx / -Dxxx):
  272. *
  273. * debugging can be enable by changing SK_DEBUG_CHKMOD and
  274. * SK_DEBUG_CHKCAT in makefile (described there).
  275. *
  276. ******************************************************************************/
  277. /******************************************************************************
  278. *
  279. * Description:
  280. *
  281. * This is the main module of the Linux GE driver.
  282. *
  283. * All source files except skge.c, skdrv1st.h, skdrv2nd.h and sktypes.h
  284. * are part of SysKonnect's COMMON MODULES for the SK-98xx adapters.
  285. * Those are used for drivers on multiple OS', so some thing may seem
  286. * unnecessary complicated on Linux. Please do not try to 'clean up'
  287. * them without VERY good reasons, because this will make it more
  288. * difficult to keep the Linux driver in synchronisation with the
  289. * other versions.
  290. *
  291. * Include file hierarchy:
  292. *
  293. * <linux/module.h>
  294. *
  295. * "h/skdrv1st.h"
  296. * <linux/version.h>
  297. * <linux/types.h>
  298. * <linux/kernel.h>
  299. * <linux/string.h>
  300. * <linux/errno.h>
  301. * <linux/ioport.h>
  302. * <linux/slab.h>
  303. * <linux/interrupt.h>
  304. * <linux/pci.h>
  305. * <asm/byteorder.h>
  306. * <asm/bitops.h>
  307. * <asm/io.h>
  308. * <linux/netdevice.h>
  309. * <linux/etherdevice.h>
  310. * <linux/skbuff.h>
  311. * those three depending on kernel version used:
  312. * <linux/bios32.h>
  313. * <linux/init.h>
  314. * <asm/uaccess.h>
  315. * <net/checksum.h>
  316. *
  317. * "h/skerror.h"
  318. * "h/skdebug.h"
  319. * "h/sktypes.h"
  320. * "h/lm80.h"
  321. * "h/xmac_ii.h"
  322. *
  323. * "h/skdrv2nd.h"
  324. * "h/skqueue.h"
  325. * "h/skgehwt.h"
  326. * "h/sktimer.h"
  327. * "h/ski2c.h"
  328. * "h/skgepnmi.h"
  329. * "h/skvpd.h"
  330. * "h/skgehw.h"
  331. * "h/skgeinit.h"
  332. * "h/skaddr.h"
  333. * "h/skgesirq.h"
  334. * "h/skcsum.h"
  335. * "h/skrlmt.h"
  336. *
  337. ******************************************************************************/
  338. #include <config.h>
  339. #include "h/skversion.h"
  340. #if 0
  341. #include <linux/module.h>
  342. #include <linux/init.h>
  343. #include <linux/proc_fs.h>
  344. #endif
  345. #include "h/skdrv1st.h"
  346. #include "h/skdrv2nd.h"
  347. /* defines ******************************************************************/
  348. /* for debuging on x86 only */
  349. /* #define BREAKPOINT() asm(" int $3"); */
  350. /* use the scatter-gather functionality with sendfile() */
  351. #if 0
  352. #define SK_ZEROCOPY
  353. #endif
  354. /* use of a transmit complete interrupt */
  355. #define USE_TX_COMPLETE
  356. /* use interrupt moderation (for tx complete only) */
  357. #define USE_INT_MOD
  358. #define INTS_PER_SEC 1000
  359. /*
  360. * threshold for copying small receive frames
  361. * set to 0 to avoid copying, set to 9001 to copy all frames
  362. */
  363. #define SK_COPY_THRESHOLD 50
  364. /* number of adapters that can be configured via command line params */
  365. #define SK_MAX_CARD_PARAM 16
  366. /*
  367. * use those defines for a compile-in version of the driver instead
  368. * of command line parameters
  369. */
  370. /* #define LINK_SPEED_A {"Auto", } */
  371. /* #define LINK_SPEED_B {"Auto", } */
  372. /* #define AUTO_NEG_A {"Sense", } */
  373. /* #define AUTO_NEG_B {"Sense", } */
  374. /* #define DUP_CAP_A {"Both", } */
  375. /* #define DUP_CAP_B {"Both", } */
  376. /* #define FLOW_CTRL_A {"SymOrRem", } */
  377. /* #define FLOW_CTRL_B {"SymOrRem", } */
  378. /* #define ROLE_A {"Auto", } */
  379. /* #define ROLE_B {"Auto", } */
  380. /* #define PREF_PORT {"A", } */
  381. /* #define RLMT_MODE {"CheckLinkState", } */
  382. #define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
  383. #define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
  384. #define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
  385. /* function prototypes ******************************************************/
  386. static void FreeResources(struct SK_NET_DEVICE *dev);
  387. static int SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC);
  388. static SK_BOOL BoardAllocMem(SK_AC *pAC);
  389. static void BoardFreeMem(SK_AC *pAC);
  390. static void BoardInitMem(SK_AC *pAC);
  391. static void SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**,
  392. int*, SK_BOOL);
  393. #if 0
  394. static void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
  395. static void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
  396. static int SkGeOpen(struct SK_NET_DEVICE *dev);
  397. static int SkGeClose(struct SK_NET_DEVICE *dev);
  398. static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
  399. static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p);
  400. static void SkGeSetRxMode(struct SK_NET_DEVICE *dev);
  401. static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev);
  402. static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd);
  403. #else
  404. void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
  405. void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
  406. int SkGeOpen(struct SK_NET_DEVICE *dev);
  407. int SkGeClose(struct SK_NET_DEVICE *dev);
  408. int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
  409. #endif
  410. static void GetConfiguration(SK_AC*);
  411. static void ProductStr(SK_AC*);
  412. static int XmitFrame(SK_AC*, TX_PORT*, struct sk_buff*);
  413. static void FreeTxDescriptors(SK_AC*pAC, TX_PORT*);
  414. static void FillRxRing(SK_AC*, RX_PORT*);
  415. static SK_BOOL FillRxDescriptor(SK_AC*, RX_PORT*);
  416. #if 0
  417. static void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
  418. #else
  419. void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
  420. #endif
  421. static void ClearAndStartRx(SK_AC*, int);
  422. static void ClearTxIrq(SK_AC*, int, int);
  423. static void ClearRxRing(SK_AC*, RX_PORT*);
  424. static void ClearTxRing(SK_AC*, TX_PORT*);
  425. #if 0
  426. static void SetQueueSizes(SK_AC *pAC);
  427. static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int new_mtu);
  428. #endif
  429. static void PortReInitBmu(SK_AC*, int);
  430. #if 0
  431. static int SkGeIocMib(DEV_NET*, unsigned int, int);
  432. static int XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
  433. #endif
  434. /*Extern */
  435. /* external Proc function */
  436. extern int proc_read(
  437. char *buffer,
  438. char **buffer_location,
  439. off_t offset,
  440. int buffer_length,
  441. int *eof,
  442. void *data);
  443. #ifdef DEBUG
  444. static void DumpMsg(struct sk_buff*, char*);
  445. static void DumpData(char*, int);
  446. static void DumpLong(char*, int);
  447. #endif
  448. void dump_frag( SK_U8 *data, int length);
  449. /* global variables *********************************************************/
  450. #if 0
  451. static const char *BootString = BOOT_STRING;
  452. #endif
  453. struct SK_NET_DEVICE *SkGeRootDev = NULL;
  454. static int probed __initdata = 0;
  455. /* local variables **********************************************************/
  456. static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
  457. static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
  458. /* local variables **********************************************************/
  459. const char SK_Root_Dir_entry[8];
  460. #if 0
  461. static struct proc_dir_entry *pSkRootDir;
  462. #endif
  463. static struct pci_device_id supported[] = {
  464. {PCI_VENDOR_ID_3COM, 0x1700},
  465. {PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE},
  466. {PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_YU},
  467. {}
  468. };
  469. /*****************************************************************************
  470. *
  471. * skge_probe - find all SK-98xx adapters
  472. *
  473. * Description:
  474. * This function scans the PCI bus for SK-98xx adapters. Resources for
  475. * each adapter are allocated and the adapter is brought into Init 1
  476. * state.
  477. *
  478. * Returns:
  479. * 0, if everything is ok
  480. * !=0, on error
  481. */
  482. #if 0
  483. static int __init skge_probe (void)
  484. #else
  485. int skge_probe (struct eth_device ** ret_dev)
  486. #endif
  487. {
  488. #if 0
  489. int proc_root_initialized = 0;
  490. #endif
  491. int boards_found = 0;
  492. #if 0
  493. int vendor_flag = SK_FALSE;
  494. #endif
  495. SK_AC *pAC;
  496. DEV_NET *pNet = NULL;
  497. #if 0
  498. struct proc_dir_entry *pProcFile;
  499. struct pci_dev *pdev = NULL;
  500. unsigned long base_address;
  501. #else
  502. u32 base_address;
  503. #endif
  504. struct SK_NET_DEVICE *dev = NULL;
  505. #if 0
  506. SK_BOOL DeviceFound = SK_FALSE;
  507. #endif
  508. SK_BOOL BootStringCount = SK_FALSE;
  509. #if 1
  510. pci_dev_t devno;
  511. #endif
  512. if (probed)
  513. return -ENODEV;
  514. probed++;
  515. if (!pci_present()) /* is PCI support present? */
  516. return -ENODEV;
  517. #if 0
  518. while((pdev = pci_find_class(PCI_CLASS_NETWORK_ETHERNET << 8, pdev)))
  519. #else
  520. while((devno = pci_find_devices (supported, boards_found)) >= 0)
  521. #endif
  522. {
  523. dev = NULL;
  524. pNet = NULL;
  525. #if 0
  526. SK_PCI_ISCOMPLIANT(vendor_flag, pdev);
  527. if (!vendor_flag)
  528. continue;
  529. #endif
  530. /* if ((pdev->vendor != PCI_VENDOR_ID_SYSKONNECT) &&
  531. ((pdev->device != PCI_DEVICE_ID_SYSKONNECT_GE) ||
  532. (pdev->device != PCI_DEVICE_ID_SYSKONNECT_YU))){
  533. continue;
  534. }
  535. */
  536. #if 0
  537. /* Configure DMA attributes. */
  538. if (pci_set_dma_mask(pdev, (u64) 0xffffffffffffffff) &&
  539. pci_set_dma_mask(pdev, (u64) 0xffffffff))
  540. continue;
  541. #endif
  542. #if 0
  543. if ((dev = init_etherdev(dev, sizeof(DEV_NET))) == NULL) {
  544. printk(KERN_ERR "Unable to allocate etherdev "
  545. "structure!\n");
  546. break;
  547. }
  548. #else
  549. dev = malloc (sizeof *dev);
  550. memset(dev, 0, sizeof(*dev));
  551. dev->priv = malloc(sizeof(DEV_NET));
  552. #endif
  553. if (dev->priv == NULL) {
  554. printk(KERN_ERR "Unable to allocate adapter "
  555. "structure!\n");
  556. break;
  557. }
  558. pNet = dev->priv;
  559. pNet->pAC = kmalloc(sizeof(SK_AC), GFP_KERNEL);
  560. if (pNet->pAC == NULL){
  561. kfree(dev->priv);
  562. printk(KERN_ERR "Unable to allocate adapter "
  563. "structure!\n");
  564. break;
  565. }
  566. /* Print message */
  567. if (!BootStringCount) {
  568. /* set display flag to TRUE so that */
  569. /* we only display this string ONCE */
  570. BootStringCount = SK_TRUE;
  571. #ifdef SK98_INFO
  572. printk("%s\n", BootString);
  573. #endif
  574. }
  575. memset(pNet->pAC, 0, sizeof(SK_AC));
  576. pAC = pNet->pAC;
  577. #if 0
  578. pAC->PciDev = pdev;
  579. pAC->PciDevId = pdev->device;
  580. pAC->dev[0] = dev;
  581. pAC->dev[1] = dev;
  582. #else
  583. pAC->PciDev = devno;
  584. ret_dev[0] = pAC->dev[0] = dev;
  585. ret_dev[1] = pAC->dev[1] = dev;
  586. #endif
  587. sprintf(pAC->Name, "SysKonnect SK-98xx");
  588. pAC->CheckQueue = SK_FALSE;
  589. pNet->Mtu = 1500;
  590. pNet->Up = 0;
  591. #if 0
  592. dev->irq = pdev->irq;
  593. dev->open = &SkGeOpen;
  594. dev->stop = &SkGeClose;
  595. dev->hard_start_xmit = &SkGeXmit;
  596. dev->get_stats = &SkGeStats;
  597. dev->set_multicast_list = &SkGeSetRxMode;
  598. dev->set_mac_address = &SkGeSetMacAddr;
  599. dev->do_ioctl = &SkGeIoctl;
  600. dev->change_mtu = &SkGeChangeMtu;
  601. dev->flags &= ~IFF_RUNNING;
  602. #endif
  603. #ifdef SK_ZEROCOPY
  604. if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
  605. /* Use only if yukon hardware */
  606. /* SK and ZEROCOPY - fly baby... */
  607. dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
  608. }
  609. #endif
  610. #if 0
  611. /*
  612. * Dummy value.
  613. */
  614. dev->base_addr = 42;
  615. pci_set_master(pdev);
  616. pci_set_master(pdev);
  617. base_address = pci_resource_start (pdev, 0);
  618. #else
  619. pci_write_config_dword(devno,
  620. PCI_COMMAND,
  621. PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
  622. pci_read_config_dword (devno, PCI_BASE_ADDRESS_0,
  623. &base_address);
  624. #endif
  625. #ifdef SK_BIG_ENDIAN
  626. /*
  627. * On big endian machines, we use the adapter's aibility of
  628. * reading the descriptors as big endian.
  629. */
  630. {
  631. SK_U32 our2;
  632. SkPciReadCfgDWord(pAC, PCI_OUR_REG_2, &our2);
  633. our2 |= PCI_REV_DESC;
  634. SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
  635. }
  636. #endif
  637. /*
  638. * Remap the regs into kernel space.
  639. */
  640. #if 0
  641. pAC->IoBase = (char*)ioremap(base_address, 0x4000);
  642. #else
  643. pAC->IoBase = (char*)pci_mem_to_phys(devno, base_address);
  644. #endif
  645. if (!pAC->IoBase){
  646. printk(KERN_ERR "%s: Unable to map I/O register, "
  647. "SK 98xx No. %i will be disabled.\n",
  648. dev->name, boards_found);
  649. kfree(dev);
  650. break;
  651. }
  652. pAC->Index = boards_found;
  653. if (SkGeBoardInit(dev, pAC)) {
  654. FreeResources(dev);
  655. kfree(dev);
  656. continue;
  657. }
  658. #if 0
  659. memcpy((caddr_t) &dev->dev_addr,
  660. (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
  661. #else
  662. memcpy((caddr_t) &dev->enetaddr,
  663. (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
  664. #endif
  665. #if 0
  666. /* First adapter... Create proc and print message */
  667. if (!DeviceFound) {
  668. DeviceFound = SK_TRUE;
  669. SK_MEMCPY(&SK_Root_Dir_entry, BootString,
  670. sizeof(SK_Root_Dir_entry) - 1);
  671. /*Create proc (directory)*/
  672. if(!proc_root_initialized) {
  673. pSkRootDir = create_proc_entry(SK_Root_Dir_entry,
  674. S_IFDIR | S_IWUSR | S_IRUGO | S_IXUGO, proc_net);
  675. proc_root_initialized = 1;
  676. }
  677. pSkRootDir->owner = THIS_MODULE;
  678. }
  679. /* Create proc file */
  680. pProcFile = create_proc_entry(dev->name,
  681. S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
  682. pSkRootDir);
  683. pProcFile->read_proc = proc_read;
  684. pProcFile->write_proc = NULL;
  685. pProcFile->nlink = 1;
  686. pProcFile->size = sizeof(dev->name + 1);
  687. pProcFile->data = (void *)pProcFile;
  688. #endif
  689. pNet->PortNr = 0;
  690. pNet->NetNr = 0;
  691. #ifdef SK_ZEROCOPY
  692. if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
  693. /* SG and ZEROCOPY - fly baby... */
  694. dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
  695. }
  696. #endif
  697. boards_found++;
  698. /* More then one port found */
  699. if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
  700. #if 0
  701. if ((dev = init_etherdev(NULL, sizeof(DEV_NET))) == 0) {
  702. printk(KERN_ERR "Unable to allocate etherdev "
  703. "structure!\n");
  704. break;
  705. }
  706. #else
  707. dev = malloc (sizeof *dev);
  708. memset(dev, 0, sizeof(*dev));
  709. dev->priv = malloc(sizeof(DEV_NET));
  710. #endif
  711. pAC->dev[1] = dev;
  712. pNet = dev->priv;
  713. pNet->PortNr = 1;
  714. pNet->NetNr = 1;
  715. pNet->pAC = pAC;
  716. pNet->Mtu = 1500;
  717. pNet->Up = 0;
  718. #if 0
  719. dev->open = &SkGeOpen;
  720. dev->stop = &SkGeClose;
  721. dev->hard_start_xmit = &SkGeXmit;
  722. dev->get_stats = &SkGeStats;
  723. dev->set_multicast_list = &SkGeSetRxMode;
  724. dev->set_mac_address = &SkGeSetMacAddr;
  725. dev->do_ioctl = &SkGeIoctl;
  726. dev->change_mtu = &SkGeChangeMtu;
  727. dev->flags &= ~IFF_RUNNING;
  728. #endif
  729. #ifdef SK_ZEROCOPY
  730. if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
  731. /* SG and ZEROCOPY - fly baby... */
  732. dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
  733. }
  734. #endif
  735. #if 0
  736. pProcFile = create_proc_entry(dev->name,
  737. S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
  738. pSkRootDir);
  739. pProcFile->read_proc = proc_read;
  740. pProcFile->write_proc = NULL;
  741. pProcFile->nlink = 1;
  742. pProcFile->size = sizeof(dev->name + 1);
  743. pProcFile->data = (void *)pProcFile;
  744. #endif
  745. #if 0
  746. memcpy((caddr_t) &dev->dev_addr,
  747. (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
  748. #else
  749. memcpy((caddr_t) &dev->enetaddr,
  750. (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
  751. #endif
  752. printk("%s: %s\n", dev->name, pAC->DeviceStr);
  753. printk(" PrefPort:B RlmtMode:Dual Check Link State\n");
  754. }
  755. /* Save the hardware revision */
  756. pAC->HWRevision = (((pAC->GIni.GIPciHwRev >> 4) & 0x0F)*10) +
  757. (pAC->GIni.GIPciHwRev & 0x0F);
  758. /*
  759. * This is bollocks, but we need to tell the net-init
  760. * code that it shall go for the next device.
  761. */
  762. #if 0
  763. #ifndef MODULE
  764. dev->base_addr = 0;
  765. #endif
  766. #endif
  767. }
  768. /*
  769. * If we're at this point we're going through skge_probe() for
  770. * the first time. Return success (0) if we've initialized 1
  771. * or more boards. Otherwise, return failure (-ENODEV).
  772. */
  773. return boards_found;
  774. } /* skge_probe */
  775. /*****************************************************************************
  776. *
  777. * FreeResources - release resources allocated for adapter
  778. *
  779. * Description:
  780. * This function releases the IRQ, unmaps the IO and
  781. * frees the desriptor ring.
  782. *
  783. * Returns: N/A
  784. *
  785. */
  786. static void FreeResources(struct SK_NET_DEVICE *dev)
  787. {
  788. SK_U32 AllocFlag;
  789. DEV_NET *pNet;
  790. SK_AC *pAC;
  791. if (dev->priv) {
  792. pNet = (DEV_NET*) dev->priv;
  793. pAC = pNet->pAC;
  794. AllocFlag = pAC->AllocFlag;
  795. #if 0
  796. if (AllocFlag & SK_ALLOC_IRQ) {
  797. free_irq(dev->irq, dev);
  798. }
  799. if (pAC->IoBase) {
  800. iounmap(pAC->IoBase);
  801. }
  802. #endif
  803. if (pAC->pDescrMem) {
  804. BoardFreeMem(pAC);
  805. }
  806. }
  807. } /* FreeResources */
  808. #if 0
  809. MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
  810. MODULE_DESCRIPTION("SysKonnect SK-NET Gigabit Ethernet SK-98xx driver");
  811. MODULE_LICENSE("GPL");
  812. MODULE_PARM(Speed_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  813. MODULE_PARM(Speed_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  814. MODULE_PARM(AutoNeg_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  815. MODULE_PARM(AutoNeg_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  816. MODULE_PARM(DupCap_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  817. MODULE_PARM(DupCap_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  818. MODULE_PARM(FlowCtrl_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  819. MODULE_PARM(FlowCtrl_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  820. MODULE_PARM(Role_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  821. MODULE_PARM(Role_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  822. MODULE_PARM(PrefPort, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  823. MODULE_PARM(RlmtMode, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
  824. /* not used, just there because every driver should have them: */
  825. MODULE_PARM(options, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "i");
  826. MODULE_PARM(debug, "i");
  827. #endif
  828. #ifdef LINK_SPEED_A
  829. static char *Speed_A[SK_MAX_CARD_PARAM] = LINK_SPEED_A;
  830. #else
  831. static char *Speed_A[SK_MAX_CARD_PARAM] = {"", };
  832. #endif
  833. #ifdef LINK_SPEED_B
  834. static char *Speed_B[SK_MAX_CARD_PARAM] = LINK_SPEED_B;
  835. #else
  836. static char *Speed_B[SK_MAX_CARD_PARAM] = {"", };
  837. #endif
  838. #ifdef AUTO_NEG_A
  839. static char *AutoNeg_A[SK_MAX_CARD_PARAM] = AUTO_NEG_A;
  840. #else
  841. static char *AutoNeg_A[SK_MAX_CARD_PARAM] = {"", };
  842. #endif
  843. #ifdef DUP_CAP_A
  844. static char *DupCap_A[SK_MAX_CARD_PARAM] = DUP_CAP_A;
  845. #else
  846. static char *DupCap_A[SK_MAX_CARD_PARAM] = {"", };
  847. #endif
  848. #ifdef FLOW_CTRL_A
  849. static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = FLOW_CTRL_A;
  850. #else
  851. static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = {"", };
  852. #endif
  853. #ifdef ROLE_A
  854. static char *Role_A[SK_MAX_CARD_PARAM] = ROLE_A;
  855. #else
  856. static char *Role_A[SK_MAX_CARD_PARAM] = {"", };
  857. #endif
  858. #ifdef AUTO_NEG_B
  859. static char *AutoNeg_B[SK_MAX_CARD_PARAM] = AUTO_NEG_B;
  860. #else
  861. static char *AutoNeg_B[SK_MAX_CARD_PARAM] = {"", };
  862. #endif
  863. #ifdef DUP_CAP_B
  864. static char *DupCap_B[SK_MAX_CARD_PARAM] = DUP_CAP_B;
  865. #else
  866. static char *DupCap_B[SK_MAX_CARD_PARAM] = {"", };
  867. #endif
  868. #ifdef FLOW_CTRL_B
  869. static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = FLOW_CTRL_B;
  870. #else
  871. static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = {"", };
  872. #endif
  873. #ifdef ROLE_B
  874. static char *Role_B[SK_MAX_CARD_PARAM] = ROLE_B;
  875. #else
  876. static char *Role_B[SK_MAX_CARD_PARAM] = {"", };
  877. #endif
  878. #ifdef PREF_PORT
  879. static char *PrefPort[SK_MAX_CARD_PARAM] = PREF_PORT;
  880. #else
  881. static char *PrefPort[SK_MAX_CARD_PARAM] = {"", };
  882. #endif
  883. #ifdef RLMT_MODE
  884. static char *RlmtMode[SK_MAX_CARD_PARAM] = RLMT_MODE;
  885. #else
  886. static char *RlmtMode[SK_MAX_CARD_PARAM] = {"", };
  887. #endif
  888. #if 0
  889. static int debug = 0; /* not used */
  890. static int options[SK_MAX_CARD_PARAM] = {0, }; /* not used */
  891. /*****************************************************************************
  892. *
  893. * skge_init_module - module initialization function
  894. *
  895. * Description:
  896. * Very simple, only call skge_probe and return approriate result.
  897. *
  898. * Returns:
  899. * 0, if everything is ok
  900. * !=0, on error
  901. */
  902. static int __init skge_init_module(void)
  903. {
  904. int cards;
  905. SkGeRootDev = NULL;
  906. /* just to avoid warnings ... */
  907. debug = 0;
  908. options[0] = 0;
  909. cards = skge_probe();
  910. if (cards == 0) {
  911. printk("sk98lin: No adapter found.\n");
  912. }
  913. return cards ? 0 : -ENODEV;
  914. } /* skge_init_module */
  915. /*****************************************************************************
  916. *
  917. * skge_cleanup_module - module unload function
  918. *
  919. * Description:
  920. * Disable adapter if it is still running, free resources,
  921. * free device struct.
  922. *
  923. * Returns: N/A
  924. */
  925. static void __exit skge_cleanup_module(void)
  926. {
  927. DEV_NET *pNet;
  928. SK_AC *pAC;
  929. struct SK_NET_DEVICE *next;
  930. unsigned long Flags;
  931. SK_EVPARA EvPara;
  932. while (SkGeRootDev) {
  933. pNet = (DEV_NET*) SkGeRootDev->priv;
  934. pAC = pNet->pAC;
  935. next = pAC->Next;
  936. netif_stop_queue(SkGeRootDev);
  937. SkGeYellowLED(pAC, pAC->IoBase, 0);
  938. if(pAC->BoardLevel == 2) {
  939. /* board is still alive */
  940. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  941. EvPara.Para32[0] = 0;
  942. EvPara.Para32[1] = -1;
  943. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  944. EvPara.Para32[0] = 1;
  945. EvPara.Para32[1] = -1;
  946. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  947. SkEventDispatcher(pAC, pAC->IoBase);
  948. /* disable interrupts */
  949. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  950. SkGeDeInit(pAC, pAC->IoBase);
  951. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  952. pAC->BoardLevel = 0;
  953. /* We do NOT check here, if IRQ was pending, of course*/
  954. }
  955. if(pAC->BoardLevel == 1) {
  956. /* board is still alive */
  957. SkGeDeInit(pAC, pAC->IoBase);
  958. pAC->BoardLevel = 0;
  959. }
  960. if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 2){
  961. unregister_netdev(pAC->dev[1]);
  962. kfree(pAC->dev[1]);
  963. }
  964. FreeResources(SkGeRootDev);
  965. SkGeRootDev->get_stats = NULL;
  966. /*
  967. * otherwise unregister_netdev calls get_stats with
  968. * invalid IO ... :-(
  969. */
  970. unregister_netdev(SkGeRootDev);
  971. kfree(SkGeRootDev);
  972. kfree(pAC);
  973. SkGeRootDev = next;
  974. }
  975. /* clear proc-dir */
  976. remove_proc_entry(pSkRootDir->name, proc_net);
  977. } /* skge_cleanup_module */
  978. module_init(skge_init_module);
  979. module_exit(skge_cleanup_module);
  980. #endif
  981. /*****************************************************************************
  982. *
  983. * SkGeBoardInit - do level 0 and 1 initialization
  984. *
  985. * Description:
  986. * This function prepares the board hardware for running. The desriptor
  987. * ring is set up, the IRQ is allocated and the configuration settings
  988. * are examined.
  989. *
  990. * Returns:
  991. * 0, if everything is ok
  992. * !=0, on error
  993. */
  994. static int __init SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC)
  995. {
  996. short i;
  997. unsigned long Flags;
  998. char *DescrString = "sk98lin: Driver for Linux"; /* this is given to PNMI */
  999. char *VerStr = VER_STRING;
  1000. #if 0
  1001. int Ret; /* return code of request_irq */
  1002. #endif
  1003. SK_BOOL DualNet;
  1004. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1005. ("IoBase: %08lX\n", (unsigned long)pAC->IoBase));
  1006. for (i=0; i<SK_MAX_MACS; i++) {
  1007. pAC->TxPort[i][0].HwAddr = pAC->IoBase + TxQueueAddr[i][0];
  1008. pAC->TxPort[i][0].PortIndex = i;
  1009. pAC->RxPort[i].HwAddr = pAC->IoBase + RxQueueAddr[i];
  1010. pAC->RxPort[i].PortIndex = i;
  1011. }
  1012. /* Initialize the mutexes */
  1013. for (i=0; i<SK_MAX_MACS; i++) {
  1014. spin_lock_init(&pAC->TxPort[i][0].TxDesRingLock);
  1015. spin_lock_init(&pAC->RxPort[i].RxDesRingLock);
  1016. }
  1017. spin_lock_init(&pAC->SlowPathLock);
  1018. /* level 0 init common modules here */
  1019. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1020. /* Does a RESET on board ...*/
  1021. if (SkGeInit(pAC, pAC->IoBase, 0) != 0) {
  1022. printk("HWInit (0) failed.\n");
  1023. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1024. return(-EAGAIN);
  1025. }
  1026. SkI2cInit( pAC, pAC->IoBase, 0);
  1027. SkEventInit(pAC, pAC->IoBase, 0);
  1028. SkPnmiInit( pAC, pAC->IoBase, 0);
  1029. SkAddrInit( pAC, pAC->IoBase, 0);
  1030. SkRlmtInit( pAC, pAC->IoBase, 0);
  1031. SkTimerInit(pAC, pAC->IoBase, 0);
  1032. pAC->BoardLevel = 0;
  1033. pAC->RxBufSize = ETH_BUF_SIZE;
  1034. SK_PNMI_SET_DRIVER_DESCR(pAC, DescrString);
  1035. SK_PNMI_SET_DRIVER_VER(pAC, VerStr);
  1036. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1037. /* level 1 init common modules here (HW init) */
  1038. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1039. if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
  1040. printk("HWInit (1) failed.\n");
  1041. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1042. return(-EAGAIN);
  1043. }
  1044. SkI2cInit( pAC, pAC->IoBase, 1);
  1045. SkEventInit(pAC, pAC->IoBase, 1);
  1046. SkPnmiInit( pAC, pAC->IoBase, 1);
  1047. SkAddrInit( pAC, pAC->IoBase, 1);
  1048. SkRlmtInit( pAC, pAC->IoBase, 1);
  1049. SkTimerInit(pAC, pAC->IoBase, 1);
  1050. GetConfiguration(pAC);
  1051. if (pAC->RlmtNets == 2) {
  1052. pAC->GIni.GIPortUsage = SK_MUL_LINK;
  1053. }
  1054. pAC->BoardLevel = 1;
  1055. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1056. #if 0
  1057. if (pAC->GIni.GIMacsFound == 2) {
  1058. Ret = request_irq(dev->irq, SkGeIsr, SA_SHIRQ, pAC->Name, dev);
  1059. } else if (pAC->GIni.GIMacsFound == 1) {
  1060. Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ,
  1061. pAC->Name, dev);
  1062. } else {
  1063. printk(KERN_WARNING "%s: Illegal number of ports: %d\n",
  1064. dev->name, pAC->GIni.GIMacsFound);
  1065. return -EAGAIN;
  1066. }
  1067. if (Ret) {
  1068. printk(KERN_WARNING "%s: Requested IRQ %d is busy.\n",
  1069. dev->name, dev->irq);
  1070. return -EAGAIN;
  1071. }
  1072. #endif
  1073. pAC->AllocFlag |= SK_ALLOC_IRQ;
  1074. /* Alloc memory for this board (Mem for RxD/TxD) : */
  1075. if(!BoardAllocMem(pAC)) {
  1076. printk("No memory for descriptor rings.\n");
  1077. return(-EAGAIN);
  1078. }
  1079. SkCsSetReceiveFlags(pAC,
  1080. SKCS_PROTO_IP | SKCS_PROTO_TCP | SKCS_PROTO_UDP,
  1081. &pAC->CsOfs1, &pAC->CsOfs2, 0);
  1082. pAC->CsOfs = (pAC->CsOfs2 << 16) | pAC->CsOfs1;
  1083. BoardInitMem(pAC);
  1084. #if 0
  1085. SetQueueSizes(pAC);
  1086. #else
  1087. /* tschilling: New common function with minimum size check. */
  1088. DualNet = SK_FALSE;
  1089. if (pAC->RlmtNets == 2) {
  1090. DualNet = SK_TRUE;
  1091. }
  1092. if (SkGeInitAssignRamToQueues(
  1093. pAC,
  1094. pAC->ActivePort,
  1095. DualNet)) {
  1096. BoardFreeMem(pAC);
  1097. printk("SkGeInitAssignRamToQueues failed.\n");
  1098. return(-EAGAIN);
  1099. }
  1100. #endif
  1101. /* Print adapter specific string from vpd */
  1102. ProductStr(pAC);
  1103. #ifdef SK98_INFO
  1104. printk("%s: %s\n", dev->name, pAC->DeviceStr);
  1105. /* Print configuration settings */
  1106. printk(" PrefPort:%c RlmtMode:%s\n",
  1107. 'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
  1108. (pAC->RlmtMode==0) ? "Check Link State" :
  1109. ((pAC->RlmtMode==1) ? "Check Link State" :
  1110. ((pAC->RlmtMode==3) ? "Check Local Port" :
  1111. ((pAC->RlmtMode==7) ? "Check Segmentation" :
  1112. ((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
  1113. #endif
  1114. SkGeYellowLED(pAC, pAC->IoBase, 1);
  1115. /*
  1116. * Register the device here
  1117. */
  1118. pAC->Next = SkGeRootDev;
  1119. SkGeRootDev = dev;
  1120. return (0);
  1121. } /* SkGeBoardInit */
  1122. /*****************************************************************************
  1123. *
  1124. * BoardAllocMem - allocate the memory for the descriptor rings
  1125. *
  1126. * Description:
  1127. * This function allocates the memory for all descriptor rings.
  1128. * Each ring is aligned for the desriptor alignment and no ring
  1129. * has a 4 GByte boundary in it (because the upper 32 bit must
  1130. * be constant for all descriptiors in one rings).
  1131. *
  1132. * Returns:
  1133. * SK_TRUE, if all memory could be allocated
  1134. * SK_FALSE, if not
  1135. */
  1136. static SK_BOOL BoardAllocMem(
  1137. SK_AC *pAC)
  1138. {
  1139. caddr_t pDescrMem; /* pointer to descriptor memory area */
  1140. size_t AllocLength; /* length of complete descriptor area */
  1141. int i; /* loop counter */
  1142. unsigned long BusAddr;
  1143. /* rings plus one for alignment (do not cross 4 GB boundary) */
  1144. /* RX_RING_SIZE is assumed bigger than TX_RING_SIZE */
  1145. #if (BITS_PER_LONG == 32)
  1146. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
  1147. #else
  1148. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
  1149. + RX_RING_SIZE + 8;
  1150. #endif
  1151. pDescrMem = pci_alloc_consistent(pAC->PciDev, AllocLength,
  1152. &pAC->pDescrMemDMA);
  1153. if (pDescrMem == NULL) {
  1154. return (SK_FALSE);
  1155. }
  1156. pAC->pDescrMem = pDescrMem;
  1157. BusAddr = (unsigned long) pAC->pDescrMemDMA;
  1158. /* Descriptors need 8 byte alignment, and this is ensured
  1159. * by pci_alloc_consistent.
  1160. */
  1161. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  1162. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  1163. ("TX%d/A: pDescrMem: %lX, PhysDescrMem: %lX\n",
  1164. i, (unsigned long) pDescrMem,
  1165. BusAddr));
  1166. pAC->TxPort[i][0].pTxDescrRing = pDescrMem;
  1167. pAC->TxPort[i][0].VTxDescrRing = BusAddr;
  1168. pDescrMem += TX_RING_SIZE;
  1169. BusAddr += TX_RING_SIZE;
  1170. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  1171. ("RX%d: pDescrMem: %lX, PhysDescrMem: %lX\n",
  1172. i, (unsigned long) pDescrMem,
  1173. (unsigned long)BusAddr));
  1174. pAC->RxPort[i].pRxDescrRing = pDescrMem;
  1175. pAC->RxPort[i].VRxDescrRing = BusAddr;
  1176. pDescrMem += RX_RING_SIZE;
  1177. BusAddr += RX_RING_SIZE;
  1178. } /* for */
  1179. return (SK_TRUE);
  1180. } /* BoardAllocMem */
  1181. /****************************************************************************
  1182. *
  1183. * BoardFreeMem - reverse of BoardAllocMem
  1184. *
  1185. * Description:
  1186. * Free all memory allocated in BoardAllocMem: adapter context,
  1187. * descriptor rings, locks.
  1188. *
  1189. * Returns: N/A
  1190. */
  1191. static void BoardFreeMem(
  1192. SK_AC *pAC)
  1193. {
  1194. size_t AllocLength; /* length of complete descriptor area */
  1195. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1196. ("BoardFreeMem\n"));
  1197. #if (BITS_PER_LONG == 32)
  1198. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
  1199. #else
  1200. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
  1201. + RX_RING_SIZE + 8;
  1202. #endif
  1203. pci_free_consistent(pAC->PciDev, AllocLength,
  1204. pAC->pDescrMem, pAC->pDescrMemDMA);
  1205. pAC->pDescrMem = NULL;
  1206. } /* BoardFreeMem */
  1207. /*****************************************************************************
  1208. *
  1209. * BoardInitMem - initiate the descriptor rings
  1210. *
  1211. * Description:
  1212. * This function sets the descriptor rings up in memory.
  1213. * The adapter is initialized with the descriptor start addresses.
  1214. *
  1215. * Returns: N/A
  1216. */
  1217. static void BoardInitMem(
  1218. SK_AC *pAC) /* pointer to adapter context */
  1219. {
  1220. int i; /* loop counter */
  1221. int RxDescrSize; /* the size of a rx descriptor rounded up to alignment*/
  1222. int TxDescrSize; /* the size of a tx descriptor rounded up to alignment*/
  1223. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1224. ("BoardInitMem\n"));
  1225. RxDescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
  1226. pAC->RxDescrPerRing = RX_RING_SIZE / RxDescrSize;
  1227. TxDescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
  1228. pAC->TxDescrPerRing = TX_RING_SIZE / RxDescrSize;
  1229. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  1230. SetupRing(
  1231. pAC,
  1232. pAC->TxPort[i][0].pTxDescrRing,
  1233. pAC->TxPort[i][0].VTxDescrRing,
  1234. (RXD**)&pAC->TxPort[i][0].pTxdRingHead,
  1235. (RXD**)&pAC->TxPort[i][0].pTxdRingTail,
  1236. (RXD**)&pAC->TxPort[i][0].pTxdRingPrev,
  1237. &pAC->TxPort[i][0].TxdRingFree,
  1238. SK_TRUE);
  1239. SetupRing(
  1240. pAC,
  1241. pAC->RxPort[i].pRxDescrRing,
  1242. pAC->RxPort[i].VRxDescrRing,
  1243. &pAC->RxPort[i].pRxdRingHead,
  1244. &pAC->RxPort[i].pRxdRingTail,
  1245. &pAC->RxPort[i].pRxdRingPrev,
  1246. &pAC->RxPort[i].RxdRingFree,
  1247. SK_FALSE);
  1248. }
  1249. } /* BoardInitMem */
  1250. /*****************************************************************************
  1251. *
  1252. * SetupRing - create one descriptor ring
  1253. *
  1254. * Description:
  1255. * This function creates one descriptor ring in the given memory area.
  1256. * The head, tail and number of free descriptors in the ring are set.
  1257. *
  1258. * Returns:
  1259. * none
  1260. */
  1261. static void SetupRing(
  1262. SK_AC *pAC,
  1263. void *pMemArea, /* a pointer to the memory area for the ring */
  1264. uintptr_t VMemArea, /* the virtual bus address of the memory area */
  1265. RXD **ppRingHead, /* address where the head should be written */
  1266. RXD **ppRingTail, /* address where the tail should be written */
  1267. RXD **ppRingPrev, /* address where the tail should be written */
  1268. int *pRingFree, /* address where the # of free descr. goes */
  1269. SK_BOOL IsTx) /* flag: is this a tx ring */
  1270. {
  1271. int i; /* loop counter */
  1272. int DescrSize; /* the size of a descriptor rounded up to alignment*/
  1273. int DescrNum; /* number of descriptors per ring */
  1274. RXD *pDescr; /* pointer to a descriptor (receive or transmit) */
  1275. RXD *pNextDescr; /* pointer to the next descriptor */
  1276. RXD *pPrevDescr; /* pointer to the previous descriptor */
  1277. uintptr_t VNextDescr; /* the virtual bus address of the next descriptor */
  1278. if (IsTx == SK_TRUE) {
  1279. DescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) *
  1280. DESCR_ALIGN;
  1281. DescrNum = TX_RING_SIZE / DescrSize;
  1282. } else {
  1283. DescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) *
  1284. DESCR_ALIGN;
  1285. DescrNum = RX_RING_SIZE / DescrSize;
  1286. }
  1287. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  1288. ("Descriptor size: %d Descriptor Number: %d\n",
  1289. DescrSize,DescrNum));
  1290. pDescr = (RXD*) pMemArea;
  1291. pPrevDescr = NULL;
  1292. pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
  1293. VNextDescr = VMemArea + DescrSize;
  1294. for(i=0; i<DescrNum; i++) {
  1295. /* set the pointers right */
  1296. pDescr->VNextRxd = VNextDescr & 0xffffffffULL;
  1297. pDescr->pNextRxd = pNextDescr;
  1298. pDescr->TcpSumStarts = pAC->CsOfs;
  1299. /* advance one step */
  1300. pPrevDescr = pDescr;
  1301. pDescr = pNextDescr;
  1302. pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
  1303. VNextDescr += DescrSize;
  1304. }
  1305. pPrevDescr->pNextRxd = (RXD*) pMemArea;
  1306. pPrevDescr->VNextRxd = VMemArea;
  1307. pDescr = (RXD*) pMemArea;
  1308. *ppRingHead = (RXD*) pMemArea;
  1309. *ppRingTail = *ppRingHead;
  1310. *ppRingPrev = pPrevDescr;
  1311. *pRingFree = DescrNum;
  1312. } /* SetupRing */
  1313. /*****************************************************************************
  1314. *
  1315. * PortReInitBmu - re-initiate the descriptor rings for one port
  1316. *
  1317. * Description:
  1318. * This function reinitializes the descriptor rings of one port
  1319. * in memory. The port must be stopped before.
  1320. * The HW is initialized with the descriptor start addresses.
  1321. *
  1322. * Returns:
  1323. * none
  1324. */
  1325. static void PortReInitBmu(
  1326. SK_AC *pAC, /* pointer to adapter context */
  1327. int PortIndex) /* index of the port for which to re-init */
  1328. {
  1329. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1330. ("PortReInitBmu "));
  1331. /* set address of first descriptor of ring in BMU */
  1332. SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
  1333. TX_Q_CUR_DESCR_LOW,
  1334. (uint32_t)(((caddr_t)
  1335. (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
  1336. pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
  1337. pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) &
  1338. 0xFFFFFFFF));
  1339. SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
  1340. TX_Q_DESCR_HIGH,
  1341. (uint32_t)(((caddr_t)
  1342. (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
  1343. pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
  1344. pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) >> 32));
  1345. SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CUR_DESCR_LOW,
  1346. (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
  1347. pAC->RxPort[PortIndex].pRxDescrRing +
  1348. pAC->RxPort[PortIndex].VRxDescrRing) & 0xFFFFFFFF));
  1349. SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_DESCR_HIGH,
  1350. (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
  1351. pAC->RxPort[PortIndex].pRxDescrRing +
  1352. pAC->RxPort[PortIndex].VRxDescrRing) >> 32));
  1353. } /* PortReInitBmu */
  1354. /****************************************************************************
  1355. *
  1356. * SkGeIsr - handle adapter interrupts
  1357. *
  1358. * Description:
  1359. * The interrupt routine is called when the network adapter
  1360. * generates an interrupt. It may also be called if another device
  1361. * shares this interrupt vector with the driver.
  1362. *
  1363. * Returns: N/A
  1364. *
  1365. */
  1366. #if 0
  1367. static void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
  1368. #else
  1369. void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
  1370. #endif
  1371. {
  1372. struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
  1373. DEV_NET *pNet;
  1374. SK_AC *pAC;
  1375. SK_U32 IntSrc; /* interrupts source register contents */
  1376. pNet = (DEV_NET*) dev->priv;
  1377. pAC = pNet->pAC;
  1378. /*
  1379. * Check and process if its our interrupt
  1380. */
  1381. SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
  1382. if (IntSrc == 0) {
  1383. return;
  1384. }
  1385. while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
  1386. #if 0 /* software irq currently not used */
  1387. if (IntSrc & IRQ_SW) {
  1388. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1389. SK_DBGCAT_DRV_INT_SRC,
  1390. ("Software IRQ\n"));
  1391. }
  1392. #endif
  1393. if (IntSrc & IRQ_EOF_RX1) {
  1394. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1395. SK_DBGCAT_DRV_INT_SRC,
  1396. ("EOF RX1 IRQ\n"));
  1397. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  1398. SK_PNMI_CNT_RX_INTR(pAC, 0);
  1399. }
  1400. if (IntSrc & IRQ_EOF_RX2) {
  1401. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1402. SK_DBGCAT_DRV_INT_SRC,
  1403. ("EOF RX2 IRQ\n"));
  1404. ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
  1405. SK_PNMI_CNT_RX_INTR(pAC, 1);
  1406. }
  1407. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  1408. if (IntSrc & IRQ_EOF_AS_TX1) {
  1409. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1410. SK_DBGCAT_DRV_INT_SRC,
  1411. ("EOF AS TX1 IRQ\n"));
  1412. SK_PNMI_CNT_TX_INTR(pAC, 0);
  1413. spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  1414. FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
  1415. spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  1416. }
  1417. if (IntSrc & IRQ_EOF_AS_TX2) {
  1418. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1419. SK_DBGCAT_DRV_INT_SRC,
  1420. ("EOF AS TX2 IRQ\n"));
  1421. SK_PNMI_CNT_TX_INTR(pAC, 1);
  1422. spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
  1423. FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
  1424. spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
  1425. }
  1426. #if 0 /* only if sync. queues used */
  1427. if (IntSrc & IRQ_EOF_SY_TX1) {
  1428. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1429. SK_DBGCAT_DRV_INT_SRC,
  1430. ("EOF SY TX1 IRQ\n"));
  1431. SK_PNMI_CNT_TX_INTR(pAC, 1);
  1432. spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  1433. FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
  1434. spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  1435. ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
  1436. }
  1437. if (IntSrc & IRQ_EOF_SY_TX2) {
  1438. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1439. SK_DBGCAT_DRV_INT_SRC,
  1440. ("EOF SY TX2 IRQ\n"));
  1441. SK_PNMI_CNT_TX_INTR(pAC, 1);
  1442. spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
  1443. FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
  1444. spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
  1445. ClearTxIrq(pAC, 1, TX_PRIO_HIGH);
  1446. }
  1447. #endif
  1448. #endif
  1449. /* do all IO at once */
  1450. if (IntSrc & IRQ_EOF_RX1)
  1451. ClearAndStartRx(pAC, 0);
  1452. if (IntSrc & IRQ_EOF_RX2)
  1453. ClearAndStartRx(pAC, 1);
  1454. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  1455. if (IntSrc & IRQ_EOF_AS_TX1)
  1456. ClearTxIrq(pAC, 0, TX_PRIO_LOW);
  1457. if (IntSrc & IRQ_EOF_AS_TX2)
  1458. ClearTxIrq(pAC, 1, TX_PRIO_LOW);
  1459. #endif
  1460. SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
  1461. } /* while (IntSrc & IRQ_MASK != 0) */
  1462. if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
  1463. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
  1464. ("SPECIAL IRQ DP-Cards => %x\n", IntSrc));
  1465. pAC->CheckQueue = SK_FALSE;
  1466. spin_lock(&pAC->SlowPathLock);
  1467. if (IntSrc & SPECIAL_IRQS)
  1468. SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
  1469. SkEventDispatcher(pAC, pAC->IoBase);
  1470. spin_unlock(&pAC->SlowPathLock);
  1471. }
  1472. /*
  1473. * do it all again is case we cleared an interrupt that
  1474. * came in after handling the ring (OUTs may be delayed
  1475. * in hardware buffers, but are through after IN)
  1476. */
  1477. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  1478. ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
  1479. if (pAC->CheckQueue) {
  1480. pAC->CheckQueue = SK_FALSE;
  1481. spin_lock(&pAC->SlowPathLock);
  1482. SkEventDispatcher(pAC, pAC->IoBase);
  1483. spin_unlock(&pAC->SlowPathLock);
  1484. }
  1485. /* IRQ is processed - Enable IRQs again*/
  1486. SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
  1487. return;
  1488. } /* SkGeIsr */
  1489. /****************************************************************************
  1490. *
  1491. * SkGeIsrOnePort - handle adapter interrupts for single port adapter
  1492. *
  1493. * Description:
  1494. * The interrupt routine is called when the network adapter
  1495. * generates an interrupt. It may also be called if another device
  1496. * shares this interrupt vector with the driver.
  1497. * This is the same as above, but handles only one port.
  1498. *
  1499. * Returns: N/A
  1500. *
  1501. */
  1502. #if 0
  1503. static void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
  1504. #else
  1505. void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
  1506. #endif
  1507. {
  1508. struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
  1509. DEV_NET *pNet;
  1510. SK_AC *pAC;
  1511. SK_U32 IntSrc; /* interrupts source register contents */
  1512. pNet = (DEV_NET*) dev->priv;
  1513. pAC = pNet->pAC;
  1514. /*
  1515. * Check and process if its our interrupt
  1516. */
  1517. SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
  1518. if (IntSrc == 0) {
  1519. return;
  1520. }
  1521. while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
  1522. #if 0 /* software irq currently not used */
  1523. if (IntSrc & IRQ_SW) {
  1524. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1525. SK_DBGCAT_DRV_INT_SRC,
  1526. ("Software IRQ\n"));
  1527. }
  1528. #endif
  1529. if (IntSrc & IRQ_EOF_RX1) {
  1530. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1531. SK_DBGCAT_DRV_INT_SRC,
  1532. ("EOF RX1 IRQ\n"));
  1533. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  1534. SK_PNMI_CNT_RX_INTR(pAC, 0);
  1535. }
  1536. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  1537. if (IntSrc & IRQ_EOF_AS_TX1) {
  1538. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1539. SK_DBGCAT_DRV_INT_SRC,
  1540. ("EOF AS TX1 IRQ\n"));
  1541. SK_PNMI_CNT_TX_INTR(pAC, 0);
  1542. spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  1543. FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
  1544. spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  1545. }
  1546. #if 0 /* only if sync. queues used */
  1547. if (IntSrc & IRQ_EOF_SY_TX1) {
  1548. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1549. SK_DBGCAT_DRV_INT_SRC,
  1550. ("EOF SY TX1 IRQ\n"));
  1551. SK_PNMI_CNT_TX_INTR(pAC, 0);
  1552. spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  1553. FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
  1554. spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  1555. ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
  1556. }
  1557. #endif
  1558. #endif
  1559. /* do all IO at once */
  1560. if (IntSrc & IRQ_EOF_RX1)
  1561. ClearAndStartRx(pAC, 0);
  1562. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  1563. if (IntSrc & IRQ_EOF_AS_TX1)
  1564. ClearTxIrq(pAC, 0, TX_PRIO_LOW);
  1565. #endif
  1566. SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
  1567. } /* while (IntSrc & IRQ_MASK != 0) */
  1568. if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
  1569. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
  1570. ("SPECIAL IRQ SP-Cards => %x\n", IntSrc));
  1571. pAC->CheckQueue = SK_FALSE;
  1572. spin_lock(&pAC->SlowPathLock);
  1573. if (IntSrc & SPECIAL_IRQS)
  1574. SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
  1575. SkEventDispatcher(pAC, pAC->IoBase);
  1576. spin_unlock(&pAC->SlowPathLock);
  1577. }
  1578. /*
  1579. * do it all again is case we cleared an interrupt that
  1580. * came in after handling the ring (OUTs may be delayed
  1581. * in hardware buffers, but are through after IN)
  1582. */
  1583. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  1584. /* IRQ is processed - Enable IRQs again*/
  1585. SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
  1586. return;
  1587. } /* SkGeIsrOnePort */
  1588. /****************************************************************************
  1589. *
  1590. * SkGeOpen - handle start of initialized adapter
  1591. *
  1592. * Description:
  1593. * This function starts the initialized adapter.
  1594. * The board level variable is set and the adapter is
  1595. * brought to full functionality.
  1596. * The device flags are set for operation.
  1597. * Do all necessary level 2 initialization, enable interrupts and
  1598. * give start command to RLMT.
  1599. *
  1600. * Returns:
  1601. * 0 on success
  1602. * != 0 on error
  1603. */
  1604. #if 0
  1605. static int SkGeOpen(
  1606. #else
  1607. int SkGeOpen(
  1608. #endif
  1609. struct SK_NET_DEVICE *dev)
  1610. {
  1611. DEV_NET *pNet;
  1612. SK_AC *pAC;
  1613. unsigned long Flags; /* for spin lock */
  1614. int i;
  1615. SK_EVPARA EvPara; /* an event parameter union */
  1616. pNet = (DEV_NET*) dev->priv;
  1617. pAC = pNet->pAC;
  1618. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1619. ("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
  1620. if (pAC->BoardLevel == 0) {
  1621. /* level 1 init common modules here */
  1622. if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
  1623. printk("%s: HWInit (1) failed.\n", pAC->dev[pNet->PortNr]->name);
  1624. return (-1);
  1625. }
  1626. SkI2cInit (pAC, pAC->IoBase, 1);
  1627. SkEventInit (pAC, pAC->IoBase, 1);
  1628. SkPnmiInit (pAC, pAC->IoBase, 1);
  1629. SkAddrInit (pAC, pAC->IoBase, 1);
  1630. SkRlmtInit (pAC, pAC->IoBase, 1);
  1631. SkTimerInit (pAC, pAC->IoBase, 1);
  1632. pAC->BoardLevel = 1;
  1633. }
  1634. if (pAC->BoardLevel != 2) {
  1635. /* tschilling: Level 2 init modules here, check return value. */
  1636. if (SkGeInit(pAC, pAC->IoBase, 2) != 0) {
  1637. printk("%s: HWInit (2) failed.\n", pAC->dev[pNet->PortNr]->name);
  1638. return (-1);
  1639. }
  1640. SkI2cInit (pAC, pAC->IoBase, 2);
  1641. SkEventInit (pAC, pAC->IoBase, 2);
  1642. SkPnmiInit (pAC, pAC->IoBase, 2);
  1643. SkAddrInit (pAC, pAC->IoBase, 2);
  1644. SkRlmtInit (pAC, pAC->IoBase, 2);
  1645. SkTimerInit (pAC, pAC->IoBase, 2);
  1646. pAC->BoardLevel = 2;
  1647. }
  1648. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  1649. /* Enable transmit descriptor polling. */
  1650. SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
  1651. FillRxRing(pAC, &pAC->RxPort[i]);
  1652. }
  1653. SkGeYellowLED(pAC, pAC->IoBase, 1);
  1654. #ifdef USE_INT_MOD
  1655. /* moderate only TX complete interrupts (these are not time critical) */
  1656. #define IRQ_MOD_MASK (IRQ_EOF_AS_TX1 | IRQ_EOF_AS_TX2)
  1657. {
  1658. unsigned long ModBase;
  1659. ModBase = 53125000 / INTS_PER_SEC;
  1660. SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
  1661. SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
  1662. SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
  1663. }
  1664. #endif
  1665. /* enable Interrupts */
  1666. SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
  1667. SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
  1668. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1669. if ((pAC->RlmtMode != 0) && (pAC->MaxPorts == 0)) {
  1670. EvPara.Para32[0] = pAC->RlmtNets;
  1671. EvPara.Para32[1] = -1;
  1672. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
  1673. EvPara);
  1674. EvPara.Para32[0] = pAC->RlmtMode;
  1675. EvPara.Para32[1] = 0;
  1676. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_MODE_CHANGE,
  1677. EvPara);
  1678. }
  1679. EvPara.Para32[0] = pNet->NetNr;
  1680. EvPara.Para32[1] = -1;
  1681. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  1682. SkEventDispatcher(pAC, pAC->IoBase);
  1683. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1684. pAC->MaxPorts++;
  1685. pNet->Up = 1;
  1686. MOD_INC_USE_COUNT;
  1687. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1688. ("SkGeOpen suceeded\n"));
  1689. return (0);
  1690. } /* SkGeOpen */
  1691. /****************************************************************************
  1692. *
  1693. * SkGeClose - Stop initialized adapter
  1694. *
  1695. * Description:
  1696. * Close initialized adapter.
  1697. *
  1698. * Returns:
  1699. * 0 - on success
  1700. * error code - on error
  1701. */
  1702. #if 0
  1703. static int SkGeClose(
  1704. #else
  1705. int SkGeClose(
  1706. #endif
  1707. struct SK_NET_DEVICE *dev)
  1708. {
  1709. DEV_NET *pNet;
  1710. SK_AC *pAC;
  1711. unsigned long Flags; /* for spin lock */
  1712. int i;
  1713. int PortIdx;
  1714. SK_EVPARA EvPara;
  1715. netif_stop_queue(dev);
  1716. pNet = (DEV_NET*) dev->priv;
  1717. pAC = pNet->pAC;
  1718. if (pAC->RlmtNets == 1)
  1719. PortIdx = pAC->ActivePort;
  1720. else
  1721. PortIdx = pNet->NetNr;
  1722. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1723. ("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
  1724. /*
  1725. * Clear multicast table, promiscuous mode ....
  1726. */
  1727. SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
  1728. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  1729. SK_PROM_MODE_NONE);
  1730. if (pAC->MaxPorts == 1) {
  1731. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1732. /* disable interrupts */
  1733. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  1734. EvPara.Para32[0] = pNet->NetNr;
  1735. EvPara.Para32[1] = -1;
  1736. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  1737. SkEventDispatcher(pAC, pAC->IoBase);
  1738. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  1739. /* stop the hardware */
  1740. SkGeDeInit(pAC, pAC->IoBase);
  1741. pAC->BoardLevel = 0;
  1742. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1743. } else {
  1744. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1745. EvPara.Para32[0] = pNet->NetNr;
  1746. EvPara.Para32[1] = -1;
  1747. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  1748. SkEventDispatcher(pAC, pAC->IoBase);
  1749. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1750. /* Stop port */
  1751. spin_lock_irqsave(&pAC->TxPort[pNet->PortNr]
  1752. [TX_PRIO_LOW].TxDesRingLock, Flags);
  1753. SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
  1754. SK_STOP_ALL, SK_HARD_RST);
  1755. spin_unlock_irqrestore(&pAC->TxPort[pNet->PortNr]
  1756. [TX_PRIO_LOW].TxDesRingLock, Flags);
  1757. }
  1758. if (pAC->RlmtNets == 1) {
  1759. /* clear all descriptor rings */
  1760. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  1761. ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
  1762. ClearRxRing(pAC, &pAC->RxPort[i]);
  1763. ClearTxRing(pAC, &pAC->TxPort[i][TX_PRIO_LOW]);
  1764. }
  1765. } else {
  1766. /* clear port descriptor rings */
  1767. ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
  1768. ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
  1769. ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
  1770. }
  1771. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1772. ("SkGeClose: done "));
  1773. pAC->MaxPorts--;
  1774. pNet->Up = 0;
  1775. MOD_DEC_USE_COUNT;
  1776. return (0);
  1777. } /* SkGeClose */
  1778. /*****************************************************************************
  1779. *
  1780. * SkGeXmit - Linux frame transmit function
  1781. *
  1782. * Description:
  1783. * The system calls this function to send frames onto the wire.
  1784. * It puts the frame in the tx descriptor ring. If the ring is
  1785. * full then, the 'tbusy' flag is set.
  1786. *
  1787. * Returns:
  1788. * 0, if everything is ok
  1789. * !=0, on error
  1790. * WARNING: returning 1 in 'tbusy' case caused system crashes (double
  1791. * allocated skb's) !!!
  1792. */
  1793. #if 0
  1794. static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
  1795. #else
  1796. int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
  1797. #endif
  1798. {
  1799. DEV_NET *pNet;
  1800. SK_AC *pAC;
  1801. int Rc; /* return code of XmitFrame */
  1802. pNet = (DEV_NET*) dev->priv;
  1803. pAC = pNet->pAC;
  1804. #if 0
  1805. if ((!skb_shinfo(skb)->nr_frags) ||
  1806. #else
  1807. if (1 ||
  1808. #endif
  1809. (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) {
  1810. /* Don't activate scatter-gather and hardware checksum */
  1811. if (pAC->RlmtNets == 2)
  1812. Rc = XmitFrame(
  1813. pAC,
  1814. &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
  1815. skb);
  1816. else
  1817. Rc = XmitFrame(
  1818. pAC,
  1819. &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
  1820. skb);
  1821. } else {
  1822. #if 0
  1823. /* scatter-gather and hardware TCP checksumming anabled*/
  1824. if (pAC->RlmtNets == 2)
  1825. Rc = XmitFrameSG(
  1826. pAC,
  1827. &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
  1828. skb);
  1829. else
  1830. Rc = XmitFrameSG(
  1831. pAC,
  1832. &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
  1833. skb);
  1834. #endif
  1835. }
  1836. /* Transmitter out of resources? */
  1837. if (Rc <= 0) {
  1838. netif_stop_queue(dev);
  1839. }
  1840. /* If not taken, give buffer ownership back to the
  1841. * queueing layer.
  1842. */
  1843. if (Rc < 0)
  1844. return (1);
  1845. #if 0
  1846. dev->trans_start = jiffies;
  1847. #endif
  1848. return (0);
  1849. } /* SkGeXmit */
  1850. /*****************************************************************************
  1851. *
  1852. * XmitFrame - fill one socket buffer into the transmit ring
  1853. *
  1854. * Description:
  1855. * This function puts a message into the transmit descriptor ring
  1856. * if there is a descriptors left.
  1857. * Linux skb's consist of only one continuous buffer.
  1858. * The first step locks the ring. It is held locked
  1859. * all time to avoid problems with SWITCH_../PORT_RESET.
  1860. * Then the descriptoris allocated.
  1861. * The second part is linking the buffer to the descriptor.
  1862. * At the very last, the Control field of the descriptor
  1863. * is made valid for the BMU and a start TX command is given
  1864. * if necessary.
  1865. *
  1866. * Returns:
  1867. * > 0 - on succes: the number of bytes in the message
  1868. * = 0 - on resource shortage: this frame sent or dropped, now
  1869. * the ring is full ( -> set tbusy)
  1870. * < 0 - on failure: other problems ( -> return failure to upper layers)
  1871. */
  1872. static int XmitFrame(
  1873. SK_AC *pAC, /* pointer to adapter context */
  1874. TX_PORT *pTxPort, /* pointer to struct of port to send to */
  1875. struct sk_buff *pMessage) /* pointer to send-message */
  1876. {
  1877. TXD *pTxd; /* the rxd to fill */
  1878. unsigned long Flags;
  1879. SK_U64 PhysAddr;
  1880. int BytesSend;
  1881. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  1882. ("X"));
  1883. spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
  1884. #ifndef USE_TX_COMPLETE
  1885. FreeTxDescriptors(pAC, pTxPort);
  1886. #endif
  1887. if (pTxPort->TxdRingFree == 0) {
  1888. /* no enough free descriptors in ring at the moment */
  1889. FreeTxDescriptors(pAC, pTxPort);
  1890. if (pTxPort->TxdRingFree == 0) {
  1891. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1892. SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
  1893. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1894. SK_DBGCAT_DRV_TX_PROGRESS,
  1895. ("XmitFrame failed\n"));
  1896. /* this message can not be sent now */
  1897. /* Because tbusy seems to be set, the message should not be freed here */
  1898. /* It will be used by the scheduler of the ethernet handler */
  1899. return (-1);
  1900. }
  1901. }
  1902. /* advance head counter behind descriptor needed for this frame */
  1903. pTxd = pTxPort->pTxdRingHead;
  1904. pTxPort->pTxdRingHead = pTxd->pNextTxd;
  1905. pTxPort->TxdRingFree--;
  1906. /* the needed descriptor is reserved now */
  1907. /*
  1908. * everything allocated ok, so add buffer to descriptor
  1909. */
  1910. #ifdef SK_DUMP_TX
  1911. DumpMsg(pMessage, "XmitFrame");
  1912. #endif
  1913. /* set up descriptor and CONTROL dword */
  1914. #if 0
  1915. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  1916. virt_to_page(pMessage->data),
  1917. ((unsigned long) pMessage->data &
  1918. ~PAGE_MASK),
  1919. pMessage->len,
  1920. PCI_DMA_TODEVICE);
  1921. #else
  1922. PhysAddr = (SK_U64) pci_phys_to_mem(pAC->PciDev, (u32) pMessage->data);
  1923. #endif
  1924. pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  1925. pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  1926. pTxd->pMBuf = pMessage;
  1927. pTxd->TBControl = TX_CTRL_OWN_BMU | TX_CTRL_STF |
  1928. TX_CTRL_CHECK_DEFAULT | TX_CTRL_SOFTWARE |
  1929. #ifdef USE_TX_COMPLETE
  1930. TX_CTRL_EOF | TX_CTRL_EOF_IRQ | pMessage->len;
  1931. #else
  1932. TX_CTRL_EOF | pMessage->len;
  1933. #endif
  1934. if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
  1935. /* previous descriptor already done, so give tx start cmd */
  1936. /* StartTx(pAC, pTxPort->HwAddr); */
  1937. SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
  1938. }
  1939. pTxPort->pTxdRingPrev = pTxd;
  1940. BytesSend = pMessage->len;
  1941. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1942. /* after releasing the lock, the skb may be immidiately freed */
  1943. if (pTxPort->TxdRingFree != 0)
  1944. return (BytesSend);
  1945. else
  1946. return (0);
  1947. } /* XmitFrame */
  1948. /*****************************************************************************
  1949. *
  1950. * XmitFrameSG - fill one socket buffer into the transmit ring
  1951. * (use SG and TCP/UDP hardware checksumming)
  1952. *
  1953. * Description:
  1954. * This function puts a message into the transmit descriptor ring
  1955. * if there is a descriptors left.
  1956. *
  1957. * Returns:
  1958. * > 0 - on succes: the number of bytes in the message
  1959. * = 0 - on resource shortage: this frame sent or dropped, now
  1960. * the ring is full ( -> set tbusy)
  1961. * < 0 - on failure: other problems ( -> return failure to upper layers)
  1962. */
  1963. #if 0
  1964. static int XmitFrameSG(
  1965. SK_AC *pAC, /* pointer to adapter context */
  1966. TX_PORT *pTxPort, /* pointer to struct of port to send to */
  1967. struct sk_buff *pMessage) /* pointer to send-message */
  1968. {
  1969. int i;
  1970. int BytesSend;
  1971. int hlength;
  1972. int protocol;
  1973. skb_frag_t *sk_frag;
  1974. TXD *pTxd;
  1975. TXD *pTxdFst;
  1976. TXD *pTxdLst;
  1977. SK_U64 PhysAddr;
  1978. unsigned long Flags;
  1979. spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
  1980. #ifndef USE_TX_COMPLETE
  1981. FreeTxDescriptors(pAC, pTxPort);
  1982. #endif
  1983. if ((skb_shinfo(pMessage)->nr_frags +1) > pTxPort->TxdRingFree) {
  1984. FreeTxDescriptors(pAC, pTxPort);
  1985. if ((skb_shinfo(pMessage)->nr_frags + 1) > pTxPort->TxdRingFree) {
  1986. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1987. SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
  1988. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1989. SK_DBGCAT_DRV_TX_PROGRESS,
  1990. ("XmitFrameSG failed - Ring full\n"));
  1991. /* this message can not be sent now */
  1992. return(-1);
  1993. }
  1994. }
  1995. pTxd = pTxPort->pTxdRingHead;
  1996. pTxdFst = pTxd;
  1997. pTxdLst = pTxd;
  1998. BytesSend = 0;
  1999. protocol = 0;
  2000. /* map first fragment (header) */
  2001. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  2002. virt_to_page(pMessage->data),
  2003. ((unsigned long) pMessage->data & ~PAGE_MASK),
  2004. skb_headlen(pMessage),
  2005. PCI_DMA_TODEVICE);
  2006. pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  2007. pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  2008. /* HW checksum? */
  2009. if (pMessage->ip_summed == CHECKSUM_HW) {
  2010. pTxd->TBControl = TX_CTRL_STF |
  2011. TX_CTRL_ST_FWD |
  2012. skb_headlen(pMessage);
  2013. /* We have to use the opcode for tcp here because the opcode for
  2014. udp is not working in the hardware yet (revision 2.0)*/
  2015. protocol = ((SK_U8)pMessage->data[23] & 0xf);
  2016. if ((protocol == 17) && (pAC->GIni.GIChipRev != 0))
  2017. pTxd->TBControl |= BMU_UDP_CHECK;
  2018. else
  2019. pTxd->TBControl |= BMU_TCP_CHECK ;
  2020. hlength = ((SK_U8)pMessage->data[14] & 0xf) * 4;
  2021. pTxd->TcpSumOfs = 0; /* PH-Checksum already claculated */
  2022. pTxd->TcpSumSt = 14+hlength+16;
  2023. pTxd->TcpSumWr = 14+hlength;
  2024. } else {
  2025. pTxd->TBControl = TX_CTRL_CHECK_DEFAULT |
  2026. TX_CTRL_SOFTWARE |
  2027. TX_CTRL_STF |
  2028. skb_headlen(pMessage);
  2029. }
  2030. pTxd = pTxd->pNextTxd;
  2031. pTxPort->TxdRingFree--;
  2032. BytesSend += skb_headlen(pMessage);
  2033. /* Map SG fragments */
  2034. for (i = 0; i < skb_shinfo(pMessage)->nr_frags; i++) {
  2035. sk_frag = &skb_shinfo(pMessage)->frags[i];
  2036. /* we already have the proper value in entry */
  2037. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  2038. sk_frag->page,
  2039. sk_frag->page_offset,
  2040. sk_frag->size,
  2041. PCI_DMA_TODEVICE);
  2042. pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  2043. pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  2044. pTxd->pMBuf = pMessage;
  2045. /* HW checksum */
  2046. if (pMessage->ip_summed == CHECKSUM_HW) {
  2047. pTxd->TBControl = TX_CTRL_OWN_BMU |
  2048. TX_CTRL_SOFTWARE |
  2049. TX_CTRL_ST_FWD;
  2050. /* We have to use the opcode for tcp here because the opcode for
  2051. udp is not working in the hardware yet (revision 2.0)*/
  2052. if ((protocol == 17) && (pAC->GIni.GIChipRev != 0))
  2053. pTxd->TBControl |= BMU_UDP_CHECK ;
  2054. else
  2055. pTxd->TBControl |= BMU_TCP_CHECK ;
  2056. } else {
  2057. pTxd->TBControl = TX_CTRL_CHECK_DEFAULT |
  2058. TX_CTRL_SOFTWARE |
  2059. TX_CTRL_OWN_BMU;
  2060. }
  2061. /* Last fragment */
  2062. if( (i+1) == skb_shinfo(pMessage)->nr_frags ) {
  2063. #ifdef USE_TX_COMPLETE
  2064. pTxd->TBControl |= TX_CTRL_EOF |
  2065. TX_CTRL_EOF_IRQ |
  2066. sk_frag->size;
  2067. #else
  2068. pTxd->TBControl |= TX_CTRL_EOF |
  2069. sk_frag->size;
  2070. #endif
  2071. pTxdFst->TBControl |= TX_CTRL_OWN_BMU |
  2072. TX_CTRL_SOFTWARE;
  2073. } else {
  2074. pTxd->TBControl |= sk_frag->size;
  2075. }
  2076. pTxdLst = pTxd;
  2077. pTxd = pTxd->pNextTxd;
  2078. pTxPort->TxdRingFree--;
  2079. BytesSend += sk_frag->size;
  2080. }
  2081. if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
  2082. /* previous descriptor already done, so give tx start cmd */
  2083. /* StartTx(pAC, pTxPort->HwAddr); */
  2084. SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
  2085. }
  2086. pTxPort->pTxdRingPrev = pTxdLst;
  2087. pTxPort->pTxdRingHead = pTxd;
  2088. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  2089. if (pTxPort->TxdRingFree > 0)
  2090. return (BytesSend);
  2091. else
  2092. return (0);
  2093. }
  2094. #endif
  2095. void dump_frag( SK_U8 *data, int length)
  2096. {
  2097. int i;
  2098. printk("Length: %d\n", length);
  2099. for( i=0; i < length; i++ ) {
  2100. printk(" %02x", (SK_U8)*(data + i) );
  2101. if( !((i+1) % 20) )
  2102. printk("\n");
  2103. }
  2104. printk("\n\n");
  2105. }
  2106. /*****************************************************************************
  2107. *
  2108. * FreeTxDescriptors - release descriptors from the descriptor ring
  2109. *
  2110. * Description:
  2111. * This function releases descriptors from a transmit ring if they
  2112. * have been sent by the BMU.
  2113. * If a descriptors is sent, it can be freed and the message can
  2114. * be freed, too.
  2115. * The SOFTWARE controllable bit is used to prevent running around a
  2116. * completely free ring for ever. If this bit is no set in the
  2117. * frame (by XmitFrame), this frame has never been sent or is
  2118. * already freed.
  2119. * The Tx descriptor ring lock must be held while calling this function !!!
  2120. *
  2121. * Returns:
  2122. * none
  2123. */
  2124. static void FreeTxDescriptors(
  2125. SK_AC *pAC, /* pointer to the adapter context */
  2126. TX_PORT *pTxPort) /* pointer to destination port structure */
  2127. {
  2128. TXD *pTxd; /* pointer to the checked descriptor */
  2129. TXD *pNewTail; /* pointer to 'end' of the ring */
  2130. SK_U32 Control; /* TBControl field of descriptor */
  2131. SK_U64 PhysAddr; /* address of DMA mapping */
  2132. pNewTail = pTxPort->pTxdRingTail;
  2133. pTxd = pNewTail;
  2134. /*
  2135. * loop forever; exits if TX_CTRL_SOFTWARE bit not set in start frame
  2136. * or TX_CTRL_OWN_BMU bit set in any frame
  2137. */
  2138. while (1) {
  2139. Control = pTxd->TBControl;
  2140. if ((Control & TX_CTRL_SOFTWARE) == 0) {
  2141. /*
  2142. * software controllable bit is set in first
  2143. * fragment when given to BMU. Not set means that
  2144. * this fragment was never sent or is already
  2145. * freed ( -> ring completely free now).
  2146. */
  2147. pTxPort->pTxdRingTail = pTxd;
  2148. netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
  2149. return;
  2150. }
  2151. if (Control & TX_CTRL_OWN_BMU) {
  2152. pTxPort->pTxdRingTail = pTxd;
  2153. if (pTxPort->TxdRingFree > 0) {
  2154. netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
  2155. }
  2156. return;
  2157. }
  2158. /* release the DMA mapping */
  2159. PhysAddr = ((SK_U64) pTxd->VDataHigh) << (SK_U64) 32;
  2160. PhysAddr |= (SK_U64) pTxd->VDataLow;
  2161. pci_unmap_page(pAC->PciDev, PhysAddr,
  2162. pTxd->pMBuf->len,
  2163. PCI_DMA_TODEVICE);
  2164. if (Control & TX_CTRL_EOF)
  2165. DEV_KFREE_SKB_ANY(pTxd->pMBuf); /* free message */
  2166. pTxPort->TxdRingFree++;
  2167. pTxd->TBControl &= ~TX_CTRL_SOFTWARE;
  2168. pTxd = pTxd->pNextTxd; /* point behind fragment with EOF */
  2169. } /* while(forever) */
  2170. } /* FreeTxDescriptors */
  2171. /*****************************************************************************
  2172. *
  2173. * FillRxRing - fill the receive ring with valid descriptors
  2174. *
  2175. * Description:
  2176. * This function fills the receive ring descriptors with data
  2177. * segments and makes them valid for the BMU.
  2178. * The active ring is filled completely, if possible.
  2179. * The non-active ring is filled only partial to save memory.
  2180. *
  2181. * Description of rx ring structure:
  2182. * head - points to the descriptor which will be used next by the BMU
  2183. * tail - points to the next descriptor to give to the BMU
  2184. *
  2185. * Returns: N/A
  2186. */
  2187. static void FillRxRing(
  2188. SK_AC *pAC, /* pointer to the adapter context */
  2189. RX_PORT *pRxPort) /* ptr to port struct for which the ring
  2190. should be filled */
  2191. {
  2192. unsigned long Flags;
  2193. spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
  2194. while (pRxPort->RxdRingFree > pRxPort->RxFillLimit) {
  2195. if(!FillRxDescriptor(pAC, pRxPort))
  2196. break;
  2197. }
  2198. spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
  2199. } /* FillRxRing */
  2200. /*****************************************************************************
  2201. *
  2202. * FillRxDescriptor - fill one buffer into the receive ring
  2203. *
  2204. * Description:
  2205. * The function allocates a new receive buffer and
  2206. * puts it into the next descriptor.
  2207. *
  2208. * Returns:
  2209. * SK_TRUE - a buffer was added to the ring
  2210. * SK_FALSE - a buffer could not be added
  2211. */
  2212. static SK_BOOL FillRxDescriptor(
  2213. SK_AC *pAC, /* pointer to the adapter context struct */
  2214. RX_PORT *pRxPort) /* ptr to port struct of ring to fill */
  2215. {
  2216. struct sk_buff *pMsgBlock; /* pointer to a new message block */
  2217. RXD *pRxd; /* the rxd to fill */
  2218. SK_U16 Length; /* data fragment length */
  2219. SK_U64 PhysAddr; /* physical address of a rx buffer */
  2220. pMsgBlock = alloc_skb(pAC->RxBufSize, GFP_ATOMIC);
  2221. if (pMsgBlock == NULL) {
  2222. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2223. SK_DBGCAT_DRV_ENTRY,
  2224. ("%s: Allocation of rx buffer failed !\n",
  2225. pAC->dev[pRxPort->PortIndex]->name));
  2226. SK_PNMI_CNT_NO_RX_BUF(pAC, pRxPort->PortIndex);
  2227. return(SK_FALSE);
  2228. }
  2229. skb_reserve(pMsgBlock, 2); /* to align IP frames */
  2230. /* skb allocated ok, so add buffer */
  2231. pRxd = pRxPort->pRxdRingTail;
  2232. pRxPort->pRxdRingTail = pRxd->pNextRxd;
  2233. pRxPort->RxdRingFree--;
  2234. Length = pAC->RxBufSize;
  2235. #if 0
  2236. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  2237. virt_to_page(pMsgBlock->data),
  2238. ((unsigned long) pMsgBlock->data &
  2239. ~PAGE_MASK),
  2240. pAC->RxBufSize - 2,
  2241. PCI_DMA_FROMDEVICE);
  2242. #else
  2243. PhysAddr = (SK_U64) pci_phys_to_mem(pAC->PciDev, (u32)pMsgBlock->data);
  2244. #endif
  2245. pRxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  2246. pRxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  2247. pRxd->pMBuf = pMsgBlock;
  2248. pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
  2249. RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
  2250. return (SK_TRUE);
  2251. } /* FillRxDescriptor */
  2252. /*****************************************************************************
  2253. *
  2254. * ReQueueRxBuffer - fill one buffer back into the receive ring
  2255. *
  2256. * Description:
  2257. * Fill a given buffer back into the rx ring. The buffer
  2258. * has been previously allocated and aligned, and its phys.
  2259. * address calculated, so this is no more necessary.
  2260. *
  2261. * Returns: N/A
  2262. */
  2263. static void ReQueueRxBuffer(
  2264. SK_AC *pAC, /* pointer to the adapter context struct */
  2265. RX_PORT *pRxPort, /* ptr to port struct of ring to fill */
  2266. struct sk_buff *pMsg, /* pointer to the buffer */
  2267. SK_U32 PhysHigh, /* phys address high dword */
  2268. SK_U32 PhysLow) /* phys address low dword */
  2269. {
  2270. RXD *pRxd; /* the rxd to fill */
  2271. SK_U16 Length; /* data fragment length */
  2272. pRxd = pRxPort->pRxdRingTail;
  2273. pRxPort->pRxdRingTail = pRxd->pNextRxd;
  2274. pRxPort->RxdRingFree--;
  2275. Length = pAC->RxBufSize;
  2276. pRxd->VDataLow = PhysLow;
  2277. pRxd->VDataHigh = PhysHigh;
  2278. pRxd->pMBuf = pMsg;
  2279. pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
  2280. RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
  2281. return;
  2282. } /* ReQueueRxBuffer */
  2283. /*****************************************************************************
  2284. *
  2285. * ReceiveIrq - handle a receive IRQ
  2286. *
  2287. * Description:
  2288. * This function is called when a receive IRQ is set.
  2289. * It walks the receive descriptor ring and sends up all
  2290. * frames that are complete.
  2291. *
  2292. * Returns: N/A
  2293. */
  2294. #if 0
  2295. static void ReceiveIrq(
  2296. #else
  2297. void ReceiveIrq(
  2298. #endif
  2299. SK_AC *pAC, /* pointer to adapter context */
  2300. RX_PORT *pRxPort, /* pointer to receive port struct */
  2301. SK_BOOL SlowPathLock) /* indicates if SlowPathLock is needed */
  2302. {
  2303. RXD *pRxd; /* pointer to receive descriptors */
  2304. SK_U32 Control; /* control field of descriptor */
  2305. struct sk_buff *pMsg; /* pointer to message holding frame */
  2306. struct sk_buff *pNewMsg; /* pointer to a new message for copying frame */
  2307. int FrameLength; /* total length of received frame */
  2308. SK_MBUF *pRlmtMbuf; /* ptr to a buffer for giving a frame to rlmt */
  2309. SK_EVPARA EvPara; /* an event parameter union */
  2310. unsigned long Flags; /* for spin lock */
  2311. int PortIndex = pRxPort->PortIndex;
  2312. unsigned int Offset;
  2313. unsigned int NumBytes;
  2314. unsigned int ForRlmt;
  2315. SK_BOOL IsBc;
  2316. SK_BOOL IsMc;
  2317. SK_BOOL IsBadFrame; /* Bad frame */
  2318. SK_U32 FrameStat;
  2319. unsigned short Csum1;
  2320. unsigned short Csum2;
  2321. unsigned short Type;
  2322. #if 0
  2323. int Result;
  2324. #endif
  2325. SK_U64 PhysAddr;
  2326. rx_start:
  2327. /* do forever; exit if RX_CTRL_OWN_BMU found */
  2328. for ( pRxd = pRxPort->pRxdRingHead ;
  2329. pRxPort->RxdRingFree < pAC->RxDescrPerRing ;
  2330. pRxd = pRxd->pNextRxd,
  2331. pRxPort->pRxdRingHead = pRxd,
  2332. pRxPort->RxdRingFree ++) {
  2333. /*
  2334. * For a better understanding of this loop
  2335. * Go through every descriptor beginning at the head
  2336. * Please note: the ring might be completely received so the OWN bit
  2337. * set is not a good crirteria to leave that loop.
  2338. * Therefore the RingFree counter is used.
  2339. * On entry of this loop pRxd is a pointer to the Rxd that needs
  2340. * to be checked next.
  2341. */
  2342. Control = pRxd->RBControl;
  2343. /* check if this descriptor is ready */
  2344. if ((Control & RX_CTRL_OWN_BMU) != 0) {
  2345. /* this descriptor is not yet ready */
  2346. /* This is the usual end of the loop */
  2347. /* We don't need to start the ring again */
  2348. FillRxRing(pAC, pRxPort);
  2349. return;
  2350. }
  2351. /* get length of frame and check it */
  2352. FrameLength = Control & RX_CTRL_LEN_MASK;
  2353. if (FrameLength > pAC->RxBufSize) {
  2354. goto rx_failed;
  2355. }
  2356. /* check for STF and EOF */
  2357. if ((Control & (RX_CTRL_STF | RX_CTRL_EOF)) !=
  2358. (RX_CTRL_STF | RX_CTRL_EOF)) {
  2359. goto rx_failed;
  2360. }
  2361. /* here we have a complete frame in the ring */
  2362. pMsg = pRxd->pMBuf;
  2363. FrameStat = pRxd->FrameStat;
  2364. /* check for frame length mismatch */
  2365. #define XMR_FS_LEN_SHIFT 18
  2366. #define GMR_FS_LEN_SHIFT 16
  2367. if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
  2368. if (FrameLength != (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)) {
  2369. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2370. SK_DBGCAT_DRV_RX_PROGRESS,
  2371. ("skge: Frame length mismatch (%u/%u).\n",
  2372. FrameLength,
  2373. (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
  2374. goto rx_failed;
  2375. }
  2376. }
  2377. else {
  2378. if (FrameLength != (SK_U32) (FrameStat >> GMR_FS_LEN_SHIFT)) {
  2379. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2380. SK_DBGCAT_DRV_RX_PROGRESS,
  2381. ("skge: Frame length mismatch (%u/%u).\n",
  2382. FrameLength,
  2383. (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
  2384. goto rx_failed;
  2385. }
  2386. }
  2387. /* Set Rx Status */
  2388. if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
  2389. IsBc = (FrameStat & XMR_FS_BC) != 0;
  2390. IsMc = (FrameStat & XMR_FS_MC) != 0;
  2391. IsBadFrame = (FrameStat &
  2392. (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0;
  2393. } else {
  2394. IsBc = (FrameStat & GMR_FS_BC) != 0;
  2395. IsMc = (FrameStat & GMR_FS_MC) != 0;
  2396. IsBadFrame = (((FrameStat & GMR_FS_ANY_ERR) != 0) ||
  2397. ((FrameStat & GMR_FS_RX_OK) == 0));
  2398. }
  2399. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
  2400. ("Received frame of length %d on port %d\n",
  2401. FrameLength, PortIndex));
  2402. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
  2403. ("Number of free rx descriptors: %d\n",
  2404. pRxPort->RxdRingFree));
  2405. /* DumpMsg(pMsg, "Rx"); */
  2406. if ((Control & RX_CTRL_STAT_VALID) != RX_CTRL_STAT_VALID ||
  2407. (IsBadFrame)) {
  2408. #if 0
  2409. (FrameStat & (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0) {
  2410. #endif
  2411. /* there is a receive error in this frame */
  2412. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2413. SK_DBGCAT_DRV_RX_PROGRESS,
  2414. ("skge: Error in received frame, dropped!\n"
  2415. "Control: %x\nRxStat: %x\n",
  2416. Control, FrameStat));
  2417. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2418. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2419. pci_dma_sync_single(pAC->PciDev,
  2420. (dma_addr_t) PhysAddr,
  2421. FrameLength,
  2422. PCI_DMA_FROMDEVICE);
  2423. ReQueueRxBuffer(pAC, pRxPort, pMsg,
  2424. pRxd->VDataHigh, pRxd->VDataLow);
  2425. continue;
  2426. }
  2427. /*
  2428. * if short frame then copy data to reduce memory waste
  2429. */
  2430. if ((FrameLength < SK_COPY_THRESHOLD) &&
  2431. ((pNewMsg = alloc_skb(FrameLength+2, GFP_ATOMIC)) != NULL)) {
  2432. /*
  2433. * Short frame detected and allocation successfull
  2434. */
  2435. /* use new skb and copy data */
  2436. skb_reserve(pNewMsg, 2);
  2437. skb_put(pNewMsg, FrameLength);
  2438. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2439. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2440. pci_dma_sync_single(pAC->PciDev,
  2441. (dma_addr_t) PhysAddr,
  2442. FrameLength,
  2443. PCI_DMA_FROMDEVICE);
  2444. eth_copy_and_sum(pNewMsg, pMsg->data,
  2445. FrameLength, 0);
  2446. ReQueueRxBuffer(pAC, pRxPort, pMsg,
  2447. pRxd->VDataHigh, pRxd->VDataLow);
  2448. pMsg = pNewMsg;
  2449. }
  2450. else {
  2451. /*
  2452. * if large frame, or SKB allocation failed, pass
  2453. * the SKB directly to the networking
  2454. */
  2455. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2456. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2457. /* release the DMA mapping */
  2458. pci_unmap_single(pAC->PciDev,
  2459. PhysAddr,
  2460. pAC->RxBufSize - 2,
  2461. PCI_DMA_FROMDEVICE);
  2462. /* set length in message */
  2463. skb_put(pMsg, FrameLength);
  2464. /* hardware checksum */
  2465. Type = ntohs(*((short*)&pMsg->data[12]));
  2466. if (Type == 0x800) {
  2467. Csum1=le16_to_cpu(pRxd->TcpSums & 0xffff);
  2468. Csum2=le16_to_cpu((pRxd->TcpSums >> 16) & 0xffff);
  2469. #if 0
  2470. if ((((Csum1 & 0xfffe) && (Csum2 & 0xfffe)) &&
  2471. (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) ||
  2472. (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
  2473. Result = SkCsGetReceiveInfo(pAC,
  2474. &pMsg->data[14],
  2475. Csum1, Csum2, pRxPort->PortIndex);
  2476. if (Result ==
  2477. SKCS_STATUS_IP_FRAGMENT ||
  2478. Result ==
  2479. SKCS_STATUS_IP_CSUM_OK ||
  2480. Result ==
  2481. SKCS_STATUS_TCP_CSUM_OK ||
  2482. Result ==
  2483. SKCS_STATUS_UDP_CSUM_OK) {
  2484. pMsg->ip_summed =
  2485. CHECKSUM_UNNECESSARY;
  2486. } else {
  2487. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2488. SK_DBGCAT_DRV_RX_PROGRESS,
  2489. ("skge: CRC error. Frame dropped!\n"));
  2490. goto rx_failed;
  2491. }
  2492. }/* checksumControl calculation valid */
  2493. #endif
  2494. } /* IP frame */
  2495. } /* frame > SK_COPY_TRESHOLD */
  2496. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("V"));
  2497. ForRlmt = SK_RLMT_RX_PROTOCOL;
  2498. #if 0
  2499. IsBc = (FrameStat & XMR_FS_BC)==XMR_FS_BC;
  2500. #endif
  2501. SK_RLMT_PRE_LOOKAHEAD(pAC, PortIndex, FrameLength,
  2502. IsBc, &Offset, &NumBytes);
  2503. if (NumBytes != 0) {
  2504. #if 0
  2505. IsMc = (FrameStat & XMR_FS_MC)==XMR_FS_MC;
  2506. #endif
  2507. SK_RLMT_LOOKAHEAD(pAC, PortIndex,
  2508. &pMsg->data[Offset],
  2509. IsBc, IsMc, &ForRlmt);
  2510. }
  2511. if (ForRlmt == SK_RLMT_RX_PROTOCOL) {
  2512. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("W"));
  2513. /* send up only frames from active port */
  2514. if ((PortIndex == pAC->ActivePort) ||
  2515. (pAC->RlmtNets == 2)) {
  2516. /* frame for upper layer */
  2517. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("U"));
  2518. #ifdef xDEBUG
  2519. DumpMsg(pMsg, "Rx");
  2520. #endif
  2521. SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,
  2522. FrameLength, pRxPort->PortIndex);
  2523. #if 0
  2524. pMsg->dev = pAC->dev[pRxPort->PortIndex];
  2525. pMsg->protocol = eth_type_trans(pMsg,
  2526. pAC->dev[pRxPort->PortIndex]);
  2527. netif_rx(pMsg);
  2528. pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
  2529. #else
  2530. NetReceive(pMsg->data, pMsg->len);
  2531. dev_kfree_skb_any(pMsg);
  2532. #endif
  2533. }
  2534. else {
  2535. /* drop frame */
  2536. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2537. SK_DBGCAT_DRV_RX_PROGRESS,
  2538. ("D"));
  2539. DEV_KFREE_SKB(pMsg);
  2540. }
  2541. } /* if not for rlmt */
  2542. else {
  2543. /* packet for rlmt */
  2544. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2545. SK_DBGCAT_DRV_RX_PROGRESS, ("R"));
  2546. pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
  2547. pAC->IoBase, FrameLength);
  2548. if (pRlmtMbuf != NULL) {
  2549. pRlmtMbuf->pNext = NULL;
  2550. pRlmtMbuf->Length = FrameLength;
  2551. pRlmtMbuf->PortIdx = PortIndex;
  2552. EvPara.pParaPtr = pRlmtMbuf;
  2553. memcpy((char*)(pRlmtMbuf->pData),
  2554. (char*)(pMsg->data),
  2555. FrameLength);
  2556. /* SlowPathLock needed? */
  2557. if (SlowPathLock == SK_TRUE) {
  2558. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2559. SkEventQueue(pAC, SKGE_RLMT,
  2560. SK_RLMT_PACKET_RECEIVED,
  2561. EvPara);
  2562. pAC->CheckQueue = SK_TRUE;
  2563. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2564. } else {
  2565. SkEventQueue(pAC, SKGE_RLMT,
  2566. SK_RLMT_PACKET_RECEIVED,
  2567. EvPara);
  2568. pAC->CheckQueue = SK_TRUE;
  2569. }
  2570. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  2571. SK_DBGCAT_DRV_RX_PROGRESS,
  2572. ("Q"));
  2573. }
  2574. #if 0
  2575. if ((pAC->dev[pRxPort->PortIndex]->flags &
  2576. (IFF_PROMISC | IFF_ALLMULTI)) != 0 ||
  2577. (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
  2578. SK_RLMT_RX_PROTOCOL) {
  2579. pMsg->dev = pAC->dev[pRxPort->PortIndex];
  2580. pMsg->protocol = eth_type_trans(pMsg,
  2581. pAC->dev[pRxPort->PortIndex]);
  2582. netif_rx(pMsg);
  2583. pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
  2584. }
  2585. #else
  2586. if (0) {
  2587. }
  2588. #endif
  2589. else {
  2590. DEV_KFREE_SKB(pMsg);
  2591. }
  2592. } /* if packet for rlmt */
  2593. } /* for ... scanning the RXD ring */
  2594. /* RXD ring is empty -> fill and restart */
  2595. FillRxRing(pAC, pRxPort);
  2596. /* do not start if called from Close */
  2597. if (pAC->BoardLevel > 0) {
  2598. ClearAndStartRx(pAC, PortIndex);
  2599. }
  2600. return;
  2601. rx_failed:
  2602. /* remove error frame */
  2603. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
  2604. ("Schrottdescriptor, length: 0x%x\n", FrameLength));
  2605. /* release the DMA mapping */
  2606. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2607. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2608. pci_unmap_page(pAC->PciDev,
  2609. PhysAddr,
  2610. pAC->RxBufSize - 2,
  2611. PCI_DMA_FROMDEVICE);
  2612. DEV_KFREE_SKB_IRQ(pRxd->pMBuf);
  2613. pRxd->pMBuf = NULL;
  2614. pRxPort->RxdRingFree++;
  2615. pRxPort->pRxdRingHead = pRxd->pNextRxd;
  2616. goto rx_start;
  2617. } /* ReceiveIrq */
  2618. /*****************************************************************************
  2619. *
  2620. * ClearAndStartRx - give a start receive command to BMU, clear IRQ
  2621. *
  2622. * Description:
  2623. * This function sends a start command and a clear interrupt
  2624. * command for one receive queue to the BMU.
  2625. *
  2626. * Returns: N/A
  2627. * none
  2628. */
  2629. static void ClearAndStartRx(
  2630. SK_AC *pAC, /* pointer to the adapter context */
  2631. int PortIndex) /* index of the receive port (XMAC) */
  2632. {
  2633. SK_OUT8(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CTRL,
  2634. RX_Q_CTRL_START | RX_Q_CTRL_CLR_I_EOF);
  2635. } /* ClearAndStartRx */
  2636. /*****************************************************************************
  2637. *
  2638. * ClearTxIrq - give a clear transmit IRQ command to BMU
  2639. *
  2640. * Description:
  2641. * This function sends a clear tx IRQ command for one
  2642. * transmit queue to the BMU.
  2643. *
  2644. * Returns: N/A
  2645. */
  2646. static void ClearTxIrq(
  2647. SK_AC *pAC, /* pointer to the adapter context */
  2648. int PortIndex, /* index of the transmit port (XMAC) */
  2649. int Prio) /* priority or normal queue */
  2650. {
  2651. SK_OUT8(pAC->IoBase, TxQueueAddr[PortIndex][Prio]+TX_Q_CTRL,
  2652. TX_Q_CTRL_CLR_I_EOF);
  2653. } /* ClearTxIrq */
  2654. /*****************************************************************************
  2655. *
  2656. * ClearRxRing - remove all buffers from the receive ring
  2657. *
  2658. * Description:
  2659. * This function removes all receive buffers from the ring.
  2660. * The receive BMU must be stopped before calling this function.
  2661. *
  2662. * Returns: N/A
  2663. */
  2664. static void ClearRxRing(
  2665. SK_AC *pAC, /* pointer to adapter context */
  2666. RX_PORT *pRxPort) /* pointer to rx port struct */
  2667. {
  2668. RXD *pRxd; /* pointer to the current descriptor */
  2669. unsigned long Flags;
  2670. SK_U64 PhysAddr;
  2671. if (pRxPort->RxdRingFree == pAC->RxDescrPerRing) {
  2672. return;
  2673. }
  2674. spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
  2675. pRxd = pRxPort->pRxdRingHead;
  2676. do {
  2677. if (pRxd->pMBuf != NULL) {
  2678. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2679. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2680. pci_unmap_page(pAC->PciDev,
  2681. PhysAddr,
  2682. pAC->RxBufSize - 2,
  2683. PCI_DMA_FROMDEVICE);
  2684. DEV_KFREE_SKB(pRxd->pMBuf);
  2685. pRxd->pMBuf = NULL;
  2686. }
  2687. pRxd->RBControl &= RX_CTRL_OWN_BMU;
  2688. pRxd = pRxd->pNextRxd;
  2689. pRxPort->RxdRingFree++;
  2690. } while (pRxd != pRxPort->pRxdRingTail);
  2691. pRxPort->pRxdRingTail = pRxPort->pRxdRingHead;
  2692. spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
  2693. } /* ClearRxRing */
  2694. /*****************************************************************************
  2695. *
  2696. * ClearTxRing - remove all buffers from the transmit ring
  2697. *
  2698. * Description:
  2699. * This function removes all transmit buffers from the ring.
  2700. * The transmit BMU must be stopped before calling this function
  2701. * and transmitting at the upper level must be disabled.
  2702. * The BMU own bit of all descriptors is cleared, the rest is
  2703. * done by calling FreeTxDescriptors.
  2704. *
  2705. * Returns: N/A
  2706. */
  2707. static void ClearTxRing(
  2708. SK_AC *pAC, /* pointer to adapter context */
  2709. TX_PORT *pTxPort) /* pointer to tx prt struct */
  2710. {
  2711. TXD *pTxd; /* pointer to the current descriptor */
  2712. int i;
  2713. unsigned long Flags;
  2714. spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
  2715. pTxd = pTxPort->pTxdRingHead;
  2716. for (i=0; i<pAC->TxDescrPerRing; i++) {
  2717. pTxd->TBControl &= ~TX_CTRL_OWN_BMU;
  2718. pTxd = pTxd->pNextTxd;
  2719. }
  2720. FreeTxDescriptors(pAC, pTxPort);
  2721. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  2722. } /* ClearTxRing */
  2723. #if 0
  2724. /*****************************************************************************
  2725. *
  2726. * SetQueueSizes - configure the sizes of rx and tx queues
  2727. *
  2728. * Description:
  2729. * This function assigns the sizes for active and passive port
  2730. * to the appropriate HWinit structure variables.
  2731. * The passive port(s) get standard values, all remaining RAM
  2732. * is given to the active port.
  2733. * The queue sizes are in kbyte and must be multiple of 8.
  2734. * The limits for the number of buffers filled into the rx rings
  2735. * is also set in this routine.
  2736. *
  2737. * Returns:
  2738. * none
  2739. */
  2740. static void SetQueueSizes(
  2741. SK_AC *pAC) /* pointer to the adapter context */
  2742. {
  2743. int StandbyRam; /* adapter RAM used for a standby port */
  2744. int RemainingRam; /* adapter RAM available for the active port */
  2745. int RxRam; /* RAM used for the active port receive queue */
  2746. int i; /* loop counter */
  2747. if (pAC->RlmtNets == 1) {
  2748. StandbyRam = SK_RLMT_STANDBY_QRXSIZE + SK_RLMT_STANDBY_QXASIZE +
  2749. SK_RLMT_STANDBY_QXSSIZE;
  2750. RemainingRam = pAC->GIni.GIRamSize -
  2751. (pAC->GIni.GIMacsFound-1) * StandbyRam;
  2752. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2753. pAC->GIni.GP[i].PRxQSize = SK_RLMT_STANDBY_QRXSIZE;
  2754. pAC->GIni.GP[i].PXSQSize = SK_RLMT_STANDBY_QXSSIZE;
  2755. pAC->GIni.GP[i].PXAQSize = SK_RLMT_STANDBY_QXASIZE;
  2756. }
  2757. RxRam = (RemainingRam * 8 / 10) & ~7;
  2758. pAC->GIni.GP[pAC->ActivePort].PRxQSize = RxRam;
  2759. pAC->GIni.GP[pAC->ActivePort].PXSQSize = 0;
  2760. pAC->GIni.GP[pAC->ActivePort].PXAQSize =
  2761. (RemainingRam - RxRam) & ~7;
  2762. pAC->RxQueueSize = RxRam;
  2763. pAC->TxSQueueSize = 0;
  2764. pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
  2765. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2766. ("queue sizes settings - rx:%d txA:%d txS:%d\n",
  2767. pAC->RxQueueSize,pAC->TxAQueueSize, pAC->TxSQueueSize));
  2768. } else {
  2769. RemainingRam = pAC->GIni.GIRamSize/pAC->GIni.GIMacsFound;
  2770. RxRam = (RemainingRam * 8 / 10) & ~7;
  2771. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2772. pAC->GIni.GP[i].PRxQSize = RxRam;
  2773. pAC->GIni.GP[i].PXSQSize = 0;
  2774. pAC->GIni.GP[i].PXAQSize = (RemainingRam - RxRam) & ~7;
  2775. }
  2776. pAC->RxQueueSize = RxRam;
  2777. pAC->TxSQueueSize = 0;
  2778. pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
  2779. }
  2780. for (i=0; i<SK_MAX_MACS; i++) {
  2781. pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing;
  2782. }
  2783. if (pAC->RlmtNets == 2) {
  2784. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2785. pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
  2786. }
  2787. } else {
  2788. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2789. pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
  2790. }
  2791. /*
  2792. * Do not set the Limit to 0, because this could cause
  2793. * wrap around with ReQueue'ed buffers (a buffer could
  2794. * be requeued in the same position, made accessable to
  2795. * the hardware, and the hardware could change its
  2796. * contents!
  2797. */
  2798. pAC->RxPort[pAC->ActivePort].RxFillLimit = 1;
  2799. }
  2800. #ifdef DEBUG
  2801. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2802. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  2803. ("i: %d, RxQSize: %d, PXSQsize: %d, PXAQSize: %d\n",
  2804. i,
  2805. pAC->GIni.GP[i].PRxQSize,
  2806. pAC->GIni.GP[i].PXSQSize,
  2807. pAC->GIni.GP[i].PXAQSize));
  2808. }
  2809. #endif
  2810. } /* SetQueueSizes */
  2811. /*****************************************************************************
  2812. *
  2813. * SkGeSetMacAddr - Set the hardware MAC address
  2814. *
  2815. * Description:
  2816. * This function sets the MAC address used by the adapter.
  2817. *
  2818. * Returns:
  2819. * 0, if everything is ok
  2820. * !=0, on error
  2821. */
  2822. static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p)
  2823. {
  2824. DEV_NET *pNet = (DEV_NET*) dev->priv;
  2825. SK_AC *pAC = pNet->pAC;
  2826. struct sockaddr *addr = p;
  2827. unsigned long Flags;
  2828. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2829. ("SkGeSetMacAddr starts now...\n"));
  2830. if(netif_running(dev))
  2831. return -EBUSY;
  2832. memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
  2833. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2834. if (pAC->RlmtNets == 2)
  2835. SkAddrOverride(pAC, pAC->IoBase, pNet->NetNr,
  2836. (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
  2837. else
  2838. SkAddrOverride(pAC, pAC->IoBase, pAC->ActivePort,
  2839. (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
  2840. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2841. return 0;
  2842. } /* SkGeSetMacAddr */
  2843. #endif
  2844. /*****************************************************************************
  2845. *
  2846. * SkGeSetRxMode - set receive mode
  2847. *
  2848. * Description:
  2849. * This function sets the receive mode of an adapter. The adapter
  2850. * supports promiscuous mode, allmulticast mode and a number of
  2851. * multicast addresses. If more multicast addresses the available
  2852. * are selected, a hash function in the hardware is used.
  2853. *
  2854. * Returns:
  2855. * 0, if everything is ok
  2856. * !=0, on error
  2857. */
  2858. #if 0
  2859. static void SkGeSetRxMode(struct SK_NET_DEVICE *dev)
  2860. {
  2861. DEV_NET *pNet;
  2862. SK_AC *pAC;
  2863. struct dev_mc_list *pMcList;
  2864. int i;
  2865. int PortIdx;
  2866. unsigned long Flags;
  2867. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2868. ("SkGeSetRxMode starts now... "));
  2869. pNet = (DEV_NET*) dev->priv;
  2870. pAC = pNet->pAC;
  2871. if (pAC->RlmtNets == 1)
  2872. PortIdx = pAC->ActivePort;
  2873. else
  2874. PortIdx = pNet->NetNr;
  2875. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2876. if (dev->flags & IFF_PROMISC) {
  2877. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2878. ("PROMISCUOUS mode\n"));
  2879. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  2880. SK_PROM_MODE_LLC);
  2881. } else if (dev->flags & IFF_ALLMULTI) {
  2882. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2883. ("ALLMULTI mode\n"));
  2884. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  2885. SK_PROM_MODE_ALL_MC);
  2886. } else {
  2887. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  2888. SK_PROM_MODE_NONE);
  2889. SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
  2890. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2891. ("Number of MC entries: %d ", dev->mc_count));
  2892. pMcList = dev->mc_list;
  2893. for (i=0; i<dev->mc_count; i++, pMcList = pMcList->next) {
  2894. SkAddrMcAdd(pAC, pAC->IoBase, PortIdx,
  2895. (SK_MAC_ADDR*)pMcList->dmi_addr, 0);
  2896. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MCA,
  2897. ("%02x:%02x:%02x:%02x:%02x:%02x\n",
  2898. pMcList->dmi_addr[0],
  2899. pMcList->dmi_addr[1],
  2900. pMcList->dmi_addr[2],
  2901. pMcList->dmi_addr[3],
  2902. pMcList->dmi_addr[4],
  2903. pMcList->dmi_addr[5]));
  2904. }
  2905. SkAddrMcUpdate(pAC, pAC->IoBase, PortIdx);
  2906. }
  2907. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2908. return;
  2909. } /* SkGeSetRxMode */
  2910. /*****************************************************************************
  2911. *
  2912. * SkGeChangeMtu - set the MTU to another value
  2913. *
  2914. * Description:
  2915. * This function sets is called whenever the MTU size is changed
  2916. * (ifconfig mtu xxx dev ethX). If the MTU is bigger than standard
  2917. * ethernet MTU size, long frame support is activated.
  2918. *
  2919. * Returns:
  2920. * 0, if everything is ok
  2921. * !=0, on error
  2922. */
  2923. static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int NewMtu)
  2924. {
  2925. DEV_NET *pNet;
  2926. DEV_NET *pOtherNet;
  2927. SK_AC *pAC;
  2928. unsigned long Flags;
  2929. int i;
  2930. SK_EVPARA EvPara;
  2931. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2932. ("SkGeChangeMtu starts now...\n"));
  2933. pNet = (DEV_NET*) dev->priv;
  2934. pAC = pNet->pAC;
  2935. if ((NewMtu < 68) || (NewMtu > SK_JUMBO_MTU)) {
  2936. return -EINVAL;
  2937. }
  2938. if(pAC->BoardLevel != 2) {
  2939. return -EINVAL;
  2940. }
  2941. pNet->Mtu = NewMtu;
  2942. pOtherNet = (DEV_NET*)pAC->dev[1 - pNet->NetNr]->priv;
  2943. if ((pOtherNet->Mtu > 1500) && (NewMtu <= 1500) && (pOtherNet->Up==1)) {
  2944. return(0);
  2945. }
  2946. EvPara.Para32[0] = pNet->NetNr;
  2947. EvPara.Para32[1] = -1;
  2948. pAC->RxBufSize = NewMtu + 32;
  2949. dev->mtu = NewMtu;
  2950. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2951. ("New MTU: %d\n", NewMtu));
  2952. /* prevent reconfiguration while changing the MTU */
  2953. /* disable interrupts */
  2954. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  2955. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2956. /* Found more than one port */
  2957. if ((pAC->GIni.GIMacsFound == 2 ) &&
  2958. (pAC->RlmtNets == 2)) {
  2959. /* Stop both ports */
  2960. EvPara.Para32[0] = 0;
  2961. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  2962. EvPara.Para32[0] = 1;
  2963. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  2964. } else {
  2965. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  2966. }
  2967. SkEventDispatcher(pAC, pAC->IoBase);
  2968. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2969. spin_lock_irqsave(
  2970. &pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock, Flags);
  2971. netif_stop_queue(pAC->dev[i]);
  2972. }
  2973. /*
  2974. * adjust number of rx buffers allocated
  2975. */
  2976. if (NewMtu > 1500) {
  2977. /* use less rx buffers */
  2978. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2979. /* Found more than one port */
  2980. if ((pAC->GIni.GIMacsFound == 2 ) &&
  2981. (pAC->RlmtNets == 2)) {
  2982. pAC->RxPort[i].RxFillLimit =
  2983. pAC->RxDescrPerRing - 100;
  2984. } else {
  2985. if (i == pAC->ActivePort)
  2986. pAC->RxPort[i].RxFillLimit =
  2987. pAC->RxDescrPerRing - 100;
  2988. else
  2989. pAC->RxPort[i].RxFillLimit =
  2990. pAC->RxDescrPerRing - 10;
  2991. }
  2992. }
  2993. }
  2994. else {
  2995. /* use normal amount of rx buffers */
  2996. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2997. /* Found more than one port */
  2998. if ((pAC->GIni.GIMacsFound == 2 ) &&
  2999. (pAC->RlmtNets == 2)) {
  3000. pAC->RxPort[i].RxFillLimit = 1;
  3001. } else {
  3002. if (i == pAC->ActivePort)
  3003. pAC->RxPort[i].RxFillLimit = 1;
  3004. else
  3005. pAC->RxPort[i].RxFillLimit =
  3006. pAC->RxDescrPerRing - 100;
  3007. }
  3008. }
  3009. }
  3010. SkGeDeInit(pAC, pAC->IoBase);
  3011. /*
  3012. * enable/disable hardware support for long frames
  3013. */
  3014. if (NewMtu > 1500) {
  3015. /* pAC->JumboActivated = SK_TRUE; /#* is never set back !!! */
  3016. pAC->GIni.GIPortUsage = SK_JUMBO_LINK;
  3017. }
  3018. else {
  3019. if ((pAC->GIni.GIMacsFound == 2 ) &&
  3020. (pAC->RlmtNets == 2)) {
  3021. pAC->GIni.GIPortUsage = SK_MUL_LINK;
  3022. } else {
  3023. pAC->GIni.GIPortUsage = SK_RED_LINK;
  3024. }
  3025. }
  3026. SkGeInit( pAC, pAC->IoBase, 1);
  3027. SkI2cInit( pAC, pAC->IoBase, 1);
  3028. SkEventInit(pAC, pAC->IoBase, 1);
  3029. SkPnmiInit( pAC, pAC->IoBase, 1);
  3030. SkAddrInit( pAC, pAC->IoBase, 1);
  3031. SkRlmtInit( pAC, pAC->IoBase, 1);
  3032. SkTimerInit(pAC, pAC->IoBase, 1);
  3033. /*
  3034. * tschilling:
  3035. * Speed and others are set back to default in level 1 init!
  3036. */
  3037. GetConfiguration(pAC);
  3038. SkGeInit( pAC, pAC->IoBase, 2);
  3039. SkI2cInit( pAC, pAC->IoBase, 2);
  3040. SkEventInit(pAC, pAC->IoBase, 2);
  3041. SkPnmiInit( pAC, pAC->IoBase, 2);
  3042. SkAddrInit( pAC, pAC->IoBase, 2);
  3043. SkRlmtInit( pAC, pAC->IoBase, 2);
  3044. SkTimerInit(pAC, pAC->IoBase, 2);
  3045. /*
  3046. * clear and reinit the rx rings here
  3047. */
  3048. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  3049. ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
  3050. ClearRxRing(pAC, &pAC->RxPort[i]);
  3051. FillRxRing(pAC, &pAC->RxPort[i]);
  3052. /* Enable transmit descriptor polling. */
  3053. SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
  3054. FillRxRing(pAC, &pAC->RxPort[i]);
  3055. };
  3056. SkGeYellowLED(pAC, pAC->IoBase, 1);
  3057. #ifdef USE_INT_MOD
  3058. {
  3059. unsigned long ModBase;
  3060. ModBase = 53125000 / INTS_PER_SEC;
  3061. SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
  3062. SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
  3063. SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
  3064. }
  3065. #endif
  3066. netif_start_queue(pAC->dev[pNet->PortNr]);
  3067. for (i=pAC->GIni.GIMacsFound-1; i>=0; i--) {
  3068. spin_unlock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
  3069. }
  3070. /* enable Interrupts */
  3071. SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
  3072. SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
  3073. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  3074. SkEventDispatcher(pAC, pAC->IoBase);
  3075. /* Found more than one port */
  3076. if ((pAC->GIni.GIMacsFound == 2 ) &&
  3077. (pAC->RlmtNets == 2)) {
  3078. /* Start both ports */
  3079. EvPara.Para32[0] = pAC->RlmtNets;
  3080. EvPara.Para32[1] = -1;
  3081. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
  3082. EvPara);
  3083. EvPara.Para32[1] = -1;
  3084. EvPara.Para32[0] = pNet->PortNr;
  3085. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  3086. if (pOtherNet->Up) {
  3087. EvPara.Para32[0] = pOtherNet->PortNr;
  3088. SkEventQueue(pAC, SKGE_RLMT,
  3089. SK_RLMT_START, EvPara);
  3090. }
  3091. } else {
  3092. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  3093. }
  3094. SkEventDispatcher(pAC, pAC->IoBase);
  3095. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  3096. return 0;
  3097. } /* SkGeChangeMtu */
  3098. /*****************************************************************************
  3099. *
  3100. * SkGeStats - return ethernet device statistics
  3101. *
  3102. * Description:
  3103. * This function return statistic data about the ethernet device
  3104. * to the operating system.
  3105. *
  3106. * Returns:
  3107. * pointer to the statistic structure.
  3108. */
  3109. static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev)
  3110. {
  3111. DEV_NET *pNet = (DEV_NET*) dev->priv;
  3112. SK_AC *pAC = pNet->pAC;
  3113. SK_PNMI_STRUCT_DATA *pPnmiStruct; /* structure for all Pnmi-Data */
  3114. SK_PNMI_STAT *pPnmiStat; /* pointer to virtual XMAC stat. data */
  3115. SK_PNMI_CONF *pPnmiConf; /* pointer to virtual link config. */
  3116. unsigned int Size; /* size of pnmi struct */
  3117. unsigned long Flags; /* for spin lock */
  3118. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  3119. ("SkGeStats starts now...\n"));
  3120. pPnmiStruct = &pAC->PnmiStruct;
  3121. memset(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
  3122. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  3123. Size = SK_PNMI_STRUCT_SIZE;
  3124. SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
  3125. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  3126. pPnmiStat = &pPnmiStruct->Stat[0];
  3127. pPnmiConf = &pPnmiStruct->Conf[0];
  3128. pAC->stats.rx_packets = (SK_U32) pPnmiStruct->RxDeliveredCts & 0xFFFFFFFF;
  3129. pAC->stats.tx_packets = (SK_U32) pPnmiStat->StatTxOkCts & 0xFFFFFFFF;
  3130. pAC->stats.rx_bytes = (SK_U32) pPnmiStruct->RxOctetsDeliveredCts;
  3131. pAC->stats.tx_bytes = (SK_U32) pPnmiStat->StatTxOctetsOkCts;
  3132. if (pNet->Mtu <= 1500) {
  3133. pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
  3134. } else {
  3135. pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
  3136. pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
  3137. }
  3138. if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC && pAC->HWRevision < 12)
  3139. pAC->stats.rx_errors = pAC->stats.rx_errors - pPnmiStat->StatRxShortsCts;
  3140. pAC->stats.tx_errors = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
  3141. pAC->stats.rx_dropped = (SK_U32) pPnmiStruct->RxNoBufCts & 0xFFFFFFFF;
  3142. pAC->stats.tx_dropped = (SK_U32) pPnmiStruct->TxNoBufCts & 0xFFFFFFFF;
  3143. pAC->stats.multicast = (SK_U32) pPnmiStat->StatRxMulticastOkCts & 0xFFFFFFFF;
  3144. pAC->stats.collisions = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
  3145. /* detailed rx_errors: */
  3146. pAC->stats.rx_length_errors = (SK_U32) pPnmiStat->StatRxRuntCts & 0xFFFFFFFF;
  3147. pAC->stats.rx_over_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
  3148. pAC->stats.rx_crc_errors = (SK_U32) pPnmiStat->StatRxFcsCts & 0xFFFFFFFF;
  3149. pAC->stats.rx_frame_errors = (SK_U32) pPnmiStat->StatRxFramingCts & 0xFFFFFFFF;
  3150. pAC->stats.rx_fifo_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
  3151. pAC->stats.rx_missed_errors = (SK_U32) pPnmiStat->StatRxMissedCts & 0xFFFFFFFF;
  3152. /* detailed tx_errors */
  3153. pAC->stats.tx_aborted_errors = (SK_U32) 0;
  3154. pAC->stats.tx_carrier_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
  3155. pAC->stats.tx_fifo_errors = (SK_U32) pPnmiStat->StatTxFifoUnderrunCts & 0xFFFFFFFF;
  3156. pAC->stats.tx_heartbeat_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
  3157. pAC->stats.tx_window_errors = (SK_U32) 0;
  3158. return(&pAC->stats);
  3159. } /* SkGeStats */
  3160. /*****************************************************************************
  3161. *
  3162. * SkGeIoctl - IO-control function
  3163. *
  3164. * Description:
  3165. * This function is called if an ioctl is issued on the device.
  3166. * There are three subfunction for reading, writing and test-writing
  3167. * the private MIB data structure (usefull for SysKonnect-internal tools).
  3168. *
  3169. * Returns:
  3170. * 0, if everything is ok
  3171. * !=0, on error
  3172. */
  3173. static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
  3174. {
  3175. DEV_NET *pNet;
  3176. SK_AC *pAC;
  3177. SK_GE_IOCTL Ioctl;
  3178. unsigned int Err = 0;
  3179. int Size;
  3180. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  3181. ("SkGeIoctl starts now...\n"));
  3182. pNet = (DEV_NET*) dev->priv;
  3183. pAC = pNet->pAC;
  3184. if(copy_from_user(&Ioctl, rq->ifr_data, sizeof(SK_GE_IOCTL))) {
  3185. return -EFAULT;
  3186. }
  3187. switch(cmd) {
  3188. case SK_IOCTL_SETMIB:
  3189. case SK_IOCTL_PRESETMIB:
  3190. if (!capable(CAP_NET_ADMIN)) return -EPERM;
  3191. case SK_IOCTL_GETMIB:
  3192. if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
  3193. Ioctl.Len<sizeof(pAC->PnmiStruct)?
  3194. Ioctl.Len : sizeof(pAC->PnmiStruct))) {
  3195. return -EFAULT;
  3196. }
  3197. Size = SkGeIocMib(pNet, Ioctl.Len, cmd);
  3198. if(copy_to_user(Ioctl.pData, &pAC->PnmiStruct,
  3199. Ioctl.Len<Size? Ioctl.Len : Size)) {
  3200. return -EFAULT;
  3201. }
  3202. Ioctl.Len = Size;
  3203. if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
  3204. return -EFAULT;
  3205. }
  3206. break;
  3207. default:
  3208. Err = -EOPNOTSUPP;
  3209. }
  3210. return(Err);
  3211. } /* SkGeIoctl */
  3212. /*****************************************************************************
  3213. *
  3214. * SkGeIocMib - handle a GetMib, SetMib- or PresetMib-ioctl message
  3215. *
  3216. * Description:
  3217. * This function reads/writes the MIB data using PNMI (Private Network
  3218. * Management Interface).
  3219. * The destination for the data must be provided with the
  3220. * ioctl call and is given to the driver in the form of
  3221. * a user space address.
  3222. * Copying from the user-provided data area into kernel messages
  3223. * and back is done by copy_from_user and copy_to_user calls in
  3224. * SkGeIoctl.
  3225. *
  3226. * Returns:
  3227. * returned size from PNMI call
  3228. */
  3229. static int SkGeIocMib(
  3230. DEV_NET *pNet, /* pointer to the adapter context */
  3231. unsigned int Size, /* length of ioctl data */
  3232. int mode) /* flag for set/preset */
  3233. {
  3234. unsigned long Flags; /* for spin lock */
  3235. SK_AC *pAC;
  3236. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  3237. ("SkGeIocMib starts now...\n"));
  3238. pAC = pNet->pAC;
  3239. /* access MIB */
  3240. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  3241. switch(mode) {
  3242. case SK_IOCTL_GETMIB:
  3243. SkPnmiGetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
  3244. pNet->NetNr);
  3245. break;
  3246. case SK_IOCTL_PRESETMIB:
  3247. SkPnmiPreSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
  3248. pNet->NetNr);
  3249. break;
  3250. case SK_IOCTL_SETMIB:
  3251. SkPnmiSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
  3252. pNet->NetNr);
  3253. break;
  3254. default:
  3255. break;
  3256. }
  3257. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  3258. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  3259. ("MIB data access succeeded\n"));
  3260. return (Size);
  3261. } /* SkGeIocMib */
  3262. #endif
  3263. /*****************************************************************************
  3264. *
  3265. * GetConfiguration - read configuration information
  3266. *
  3267. * Description:
  3268. * This function reads per-adapter configuration information from
  3269. * the options provided on the command line.
  3270. *
  3271. * Returns:
  3272. * none
  3273. */
  3274. static void GetConfiguration(
  3275. SK_AC *pAC) /* pointer to the adapter context structure */
  3276. {
  3277. SK_I32 Port; /* preferred port */
  3278. int LinkSpeed; /* Link speed */
  3279. int AutoNeg; /* auto negotiation off (0) or on (1) */
  3280. int DuplexCap; /* duplex capabilities (0=both, 1=full, 2=half */
  3281. int MSMode; /* master / slave mode selection */
  3282. SK_BOOL AutoSet;
  3283. SK_BOOL DupSet;
  3284. /*
  3285. * The two parameters AutoNeg. and DuplexCap. map to one configuration
  3286. * parameter. The mapping is described by this table:
  3287. * DuplexCap -> | both | full | half |
  3288. * AutoNeg | | | |
  3289. * -----------------------------------------------------------------
  3290. * Off | illegal | Full | Half |
  3291. * -----------------------------------------------------------------
  3292. * On | AutoBoth | AutoFull | AutoHalf |
  3293. * -----------------------------------------------------------------
  3294. * Sense | AutoSense | AutoSense | AutoSense |
  3295. */
  3296. int Capabilities[3][3] =
  3297. { { -1, SK_LMODE_FULL, SK_LMODE_HALF},
  3298. {SK_LMODE_AUTOBOTH, SK_LMODE_AUTOFULL, SK_LMODE_AUTOHALF},
  3299. {SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE} };
  3300. #define DC_BOTH 0
  3301. #define DC_FULL 1
  3302. #define DC_HALF 2
  3303. #define AN_OFF 0
  3304. #define AN_ON 1
  3305. #define AN_SENS 2
  3306. /* settings for port A */
  3307. /* settings link speed */
  3308. LinkSpeed = SK_LSPEED_AUTO; /* default: do auto select */
  3309. if (Speed_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3310. Speed_A[pAC->Index] != NULL) {
  3311. if (strcmp(Speed_A[pAC->Index],"")==0) {
  3312. LinkSpeed = SK_LSPEED_AUTO;
  3313. }
  3314. else if (strcmp(Speed_A[pAC->Index],"Auto")==0) {
  3315. LinkSpeed = SK_LSPEED_AUTO;
  3316. }
  3317. else if (strcmp(Speed_A[pAC->Index],"10")==0) {
  3318. LinkSpeed = SK_LSPEED_10MBPS;
  3319. }
  3320. else if (strcmp(Speed_A[pAC->Index],"100")==0) {
  3321. LinkSpeed = SK_LSPEED_100MBPS;
  3322. }
  3323. else if (strcmp(Speed_A[pAC->Index],"1000")==0) {
  3324. LinkSpeed = SK_LSPEED_1000MBPS;
  3325. }
  3326. else printk("%s: Illegal value for Speed_A\n",
  3327. pAC->dev[0]->name);
  3328. }
  3329. /* Check speed parameter */
  3330. /* Only copper type adapter and GE V2 cards */
  3331. if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
  3332. (pAC->GIni.GICopperType != SK_TRUE)) &&
  3333. ((LinkSpeed != SK_LSPEED_AUTO) &&
  3334. (LinkSpeed != SK_LSPEED_1000MBPS))) {
  3335. printk("%s: Illegal value for Speed_A. "
  3336. "Not a copper card or GE V2 card\n Using "
  3337. "speed 1000\n", pAC->dev[0]->name);
  3338. LinkSpeed = SK_LSPEED_1000MBPS;
  3339. }
  3340. pAC->GIni.GP[0].PLinkSpeed = LinkSpeed;
  3341. /* Autonegotiation */
  3342. AutoNeg = AN_ON; /* tschilling: Default: Autonegotiation on! */
  3343. AutoSet = SK_FALSE;
  3344. if (AutoNeg_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3345. AutoNeg_A[pAC->Index] != NULL) {
  3346. AutoSet = SK_TRUE;
  3347. if (strcmp(AutoNeg_A[pAC->Index],"")==0) {
  3348. AutoSet = SK_FALSE;
  3349. }
  3350. else if (strcmp(AutoNeg_A[pAC->Index],"On")==0) {
  3351. AutoNeg = AN_ON;
  3352. }
  3353. else if (strcmp(AutoNeg_A[pAC->Index],"Off")==0) {
  3354. AutoNeg = AN_OFF;
  3355. }
  3356. else if (strcmp(AutoNeg_A[pAC->Index],"Sense")==0) {
  3357. AutoNeg = AN_SENS;
  3358. }
  3359. else printk("%s: Illegal value for AutoNeg_A\n",
  3360. pAC->dev[0]->name);
  3361. }
  3362. DuplexCap = DC_BOTH;
  3363. DupSet = SK_FALSE;
  3364. if (DupCap_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3365. DupCap_A[pAC->Index] != NULL) {
  3366. DupSet = SK_TRUE;
  3367. if (strcmp(DupCap_A[pAC->Index],"")==0) {
  3368. DupSet = SK_FALSE;
  3369. }
  3370. else if (strcmp(DupCap_A[pAC->Index],"Both")==0) {
  3371. DuplexCap = DC_BOTH;
  3372. }
  3373. else if (strcmp(DupCap_A[pAC->Index],"Full")==0) {
  3374. DuplexCap = DC_FULL;
  3375. }
  3376. else if (strcmp(DupCap_A[pAC->Index],"Half")==0) {
  3377. DuplexCap = DC_HALF;
  3378. }
  3379. else printk("%s: Illegal value for DupCap_A\n",
  3380. pAC->dev[0]->name);
  3381. }
  3382. /* check for illegal combinations */
  3383. if (AutoSet && AutoNeg==AN_SENS && DupSet) {
  3384. printk("%s, Port A: DuplexCapabilities"
  3385. " ignored using Sense mode\n", pAC->dev[0]->name);
  3386. }
  3387. if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
  3388. printk("%s, Port A: Illegal combination"
  3389. " of values AutoNeg. and DuplexCap.\n Using "
  3390. "Full Duplex\n", pAC->dev[0]->name);
  3391. DuplexCap = DC_FULL;
  3392. }
  3393. if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
  3394. DuplexCap = DC_FULL;
  3395. }
  3396. if (!AutoSet && DupSet) {
  3397. printk("%s, Port A: Duplex setting not"
  3398. " possible in\n default AutoNegotiation mode"
  3399. " (Sense).\n Using AutoNegotiation On\n",
  3400. pAC->dev[0]->name);
  3401. AutoNeg = AN_ON;
  3402. }
  3403. /* set the desired mode */
  3404. pAC->GIni.GP[0].PLinkModeConf =
  3405. Capabilities[AutoNeg][DuplexCap];
  3406. pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
  3407. if (FlowCtrl_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3408. FlowCtrl_A[pAC->Index] != NULL) {
  3409. if (strcmp(FlowCtrl_A[pAC->Index],"") == 0) {
  3410. }
  3411. else if (strcmp(FlowCtrl_A[pAC->Index],"SymOrRem") == 0) {
  3412. pAC->GIni.GP[0].PFlowCtrlMode =
  3413. SK_FLOW_MODE_SYM_OR_REM;
  3414. }
  3415. else if (strcmp(FlowCtrl_A[pAC->Index],"Sym")==0) {
  3416. pAC->GIni.GP[0].PFlowCtrlMode =
  3417. SK_FLOW_MODE_SYMMETRIC;
  3418. }
  3419. else if (strcmp(FlowCtrl_A[pAC->Index],"LocSend")==0) {
  3420. pAC->GIni.GP[0].PFlowCtrlMode =
  3421. SK_FLOW_MODE_LOC_SEND;
  3422. }
  3423. else if (strcmp(FlowCtrl_A[pAC->Index],"None")==0) {
  3424. pAC->GIni.GP[0].PFlowCtrlMode =
  3425. SK_FLOW_MODE_NONE;
  3426. }
  3427. else printk("Illegal value for FlowCtrl_A\n");
  3428. }
  3429. if (AutoNeg==AN_OFF && pAC->GIni.GP[0].PFlowCtrlMode!=
  3430. SK_FLOW_MODE_NONE) {
  3431. printk("%s, Port A: FlowControl"
  3432. " impossible without AutoNegotiation,"
  3433. " disabled\n", pAC->dev[0]->name);
  3434. pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_NONE;
  3435. }
  3436. MSMode = SK_MS_MODE_AUTO; /* default: do auto select */
  3437. if (Role_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3438. Role_A[pAC->Index] != NULL) {
  3439. if (strcmp(Role_A[pAC->Index],"")==0) {
  3440. }
  3441. else if (strcmp(Role_A[pAC->Index],"Auto")==0) {
  3442. MSMode = SK_MS_MODE_AUTO;
  3443. }
  3444. else if (strcmp(Role_A[pAC->Index],"Master")==0) {
  3445. MSMode = SK_MS_MODE_MASTER;
  3446. }
  3447. else if (strcmp(Role_A[pAC->Index],"Slave")==0) {
  3448. MSMode = SK_MS_MODE_SLAVE;
  3449. }
  3450. else printk("%s: Illegal value for Role_A\n",
  3451. pAC->dev[0]->name);
  3452. }
  3453. pAC->GIni.GP[0].PMSMode = MSMode;
  3454. /* settings for port B */
  3455. /* settings link speed */
  3456. LinkSpeed = SK_LSPEED_AUTO; /* default: do auto select */
  3457. if (Speed_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3458. Speed_B[pAC->Index] != NULL) {
  3459. if (strcmp(Speed_B[pAC->Index],"")==0) {
  3460. LinkSpeed = SK_LSPEED_AUTO;
  3461. }
  3462. else if (strcmp(Speed_B[pAC->Index],"Auto")==0) {
  3463. LinkSpeed = SK_LSPEED_AUTO;
  3464. }
  3465. else if (strcmp(Speed_B[pAC->Index],"10")==0) {
  3466. LinkSpeed = SK_LSPEED_10MBPS;
  3467. }
  3468. else if (strcmp(Speed_B[pAC->Index],"100")==0) {
  3469. LinkSpeed = SK_LSPEED_100MBPS;
  3470. }
  3471. else if (strcmp(Speed_B[pAC->Index],"1000")==0) {
  3472. LinkSpeed = SK_LSPEED_1000MBPS;
  3473. }
  3474. else printk("%s: Illegal value for Speed_B\n",
  3475. pAC->dev[1]->name);
  3476. }
  3477. /* Check speed parameter */
  3478. /* Only copper type adapter and GE V2 cards */
  3479. if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
  3480. (pAC->GIni.GICopperType != SK_TRUE)) &&
  3481. ((LinkSpeed != SK_LSPEED_AUTO) &&
  3482. (LinkSpeed != SK_LSPEED_1000MBPS))) {
  3483. printk("%s: Illegal value for Speed_B. "
  3484. "Not a copper card or GE V2 card\n Using "
  3485. "speed 1000\n", pAC->dev[1]->name);
  3486. LinkSpeed = SK_LSPEED_1000MBPS;
  3487. }
  3488. pAC->GIni.GP[1].PLinkSpeed = LinkSpeed;
  3489. /* Auto negotiation */
  3490. AutoNeg = AN_SENS; /* default: do auto Sense */
  3491. AutoSet = SK_FALSE;
  3492. if (AutoNeg_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3493. AutoNeg_B[pAC->Index] != NULL) {
  3494. AutoSet = SK_TRUE;
  3495. if (strcmp(AutoNeg_B[pAC->Index],"")==0) {
  3496. AutoSet = SK_FALSE;
  3497. }
  3498. else if (strcmp(AutoNeg_B[pAC->Index],"On")==0) {
  3499. AutoNeg = AN_ON;
  3500. }
  3501. else if (strcmp(AutoNeg_B[pAC->Index],"Off")==0) {
  3502. AutoNeg = AN_OFF;
  3503. }
  3504. else if (strcmp(AutoNeg_B[pAC->Index],"Sense")==0) {
  3505. AutoNeg = AN_SENS;
  3506. }
  3507. else printk("Illegal value for AutoNeg_B\n");
  3508. }
  3509. DuplexCap = DC_BOTH;
  3510. DupSet = SK_FALSE;
  3511. if (DupCap_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3512. DupCap_B[pAC->Index] != NULL) {
  3513. DupSet = SK_TRUE;
  3514. if (strcmp(DupCap_B[pAC->Index],"")==0) {
  3515. DupSet = SK_FALSE;
  3516. }
  3517. else if (strcmp(DupCap_B[pAC->Index],"Both")==0) {
  3518. DuplexCap = DC_BOTH;
  3519. }
  3520. else if (strcmp(DupCap_B[pAC->Index],"Full")==0) {
  3521. DuplexCap = DC_FULL;
  3522. }
  3523. else if (strcmp(DupCap_B[pAC->Index],"Half")==0) {
  3524. DuplexCap = DC_HALF;
  3525. }
  3526. else printk("Illegal value for DupCap_B\n");
  3527. }
  3528. /* check for illegal combinations */
  3529. if (AutoSet && AutoNeg==AN_SENS && DupSet) {
  3530. printk("%s, Port B: DuplexCapabilities"
  3531. " ignored using Sense mode\n", pAC->dev[1]->name);
  3532. }
  3533. if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
  3534. printk("%s, Port B: Illegal combination"
  3535. " of values AutoNeg. and DuplexCap.\n Using "
  3536. "Full Duplex\n", pAC->dev[1]->name);
  3537. DuplexCap = DC_FULL;
  3538. }
  3539. if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
  3540. DuplexCap = DC_FULL;
  3541. }
  3542. if (!AutoSet && DupSet) {
  3543. printk("%s, Port B: Duplex setting not"
  3544. " possible in\n default AutoNegotiation mode"
  3545. " (Sense).\n Using AutoNegotiation On\n",
  3546. pAC->dev[1]->name);
  3547. AutoNeg = AN_ON;
  3548. }
  3549. /* set the desired mode */
  3550. pAC->GIni.GP[1].PLinkModeConf =
  3551. Capabilities[AutoNeg][DuplexCap];
  3552. pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
  3553. if (FlowCtrl_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3554. FlowCtrl_B[pAC->Index] != NULL) {
  3555. if (strcmp(FlowCtrl_B[pAC->Index],"") == 0) {
  3556. }
  3557. else if (strcmp(FlowCtrl_B[pAC->Index],"SymOrRem") == 0) {
  3558. pAC->GIni.GP[1].PFlowCtrlMode =
  3559. SK_FLOW_MODE_SYM_OR_REM;
  3560. }
  3561. else if (strcmp(FlowCtrl_B[pAC->Index],"Sym")==0) {
  3562. pAC->GIni.GP[1].PFlowCtrlMode =
  3563. SK_FLOW_MODE_SYMMETRIC;
  3564. }
  3565. else if (strcmp(FlowCtrl_B[pAC->Index],"LocSend")==0) {
  3566. pAC->GIni.GP[1].PFlowCtrlMode =
  3567. SK_FLOW_MODE_LOC_SEND;
  3568. }
  3569. else if (strcmp(FlowCtrl_B[pAC->Index],"None")==0) {
  3570. pAC->GIni.GP[1].PFlowCtrlMode =
  3571. SK_FLOW_MODE_NONE;
  3572. }
  3573. else printk("Illegal value for FlowCtrl_B\n");
  3574. }
  3575. if (AutoNeg==AN_OFF && pAC->GIni.GP[1].PFlowCtrlMode!=
  3576. SK_FLOW_MODE_NONE) {
  3577. printk("%s, Port B: FlowControl"
  3578. " impossible without AutoNegotiation,"
  3579. " disabled\n", pAC->dev[1]->name);
  3580. pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_NONE;
  3581. }
  3582. MSMode = SK_MS_MODE_AUTO; /* default: do auto select */
  3583. if (Role_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3584. Role_B[pAC->Index] != NULL) {
  3585. if (strcmp(Role_B[pAC->Index],"")==0) {
  3586. }
  3587. else if (strcmp(Role_B[pAC->Index],"Auto")==0) {
  3588. MSMode = SK_MS_MODE_AUTO;
  3589. }
  3590. else if (strcmp(Role_B[pAC->Index],"Master")==0) {
  3591. MSMode = SK_MS_MODE_MASTER;
  3592. }
  3593. else if (strcmp(Role_B[pAC->Index],"Slave")==0) {
  3594. MSMode = SK_MS_MODE_SLAVE;
  3595. }
  3596. else printk("%s: Illegal value for Role_B\n",
  3597. pAC->dev[1]->name);
  3598. }
  3599. pAC->GIni.GP[1].PMSMode = MSMode;
  3600. /* settings for both ports */
  3601. pAC->ActivePort = 0;
  3602. if (PrefPort != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3603. PrefPort[pAC->Index] != NULL) {
  3604. if (strcmp(PrefPort[pAC->Index],"") == 0) { /* Auto */
  3605. pAC->ActivePort = 0;
  3606. pAC->Rlmt.Net[0].Preference = -1; /* auto */
  3607. pAC->Rlmt.Net[0].PrefPort = 0;
  3608. }
  3609. else if (strcmp(PrefPort[pAC->Index],"A") == 0) {
  3610. /*
  3611. * do not set ActivePort here, thus a port
  3612. * switch is issued after net up.
  3613. */
  3614. Port = 0;
  3615. pAC->Rlmt.Net[0].Preference = Port;
  3616. pAC->Rlmt.Net[0].PrefPort = Port;
  3617. }
  3618. else if (strcmp(PrefPort[pAC->Index],"B") == 0) {
  3619. /*
  3620. * do not set ActivePort here, thus a port
  3621. * switch is issued after net up.
  3622. */
  3623. Port = 1;
  3624. pAC->Rlmt.Net[0].Preference = Port;
  3625. pAC->Rlmt.Net[0].PrefPort = Port;
  3626. }
  3627. else printk("%s: Illegal value for PrefPort\n",
  3628. pAC->dev[0]->name);
  3629. }
  3630. pAC->RlmtNets = 1;
  3631. if (RlmtMode != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3632. RlmtMode[pAC->Index] != NULL) {
  3633. if (strcmp(RlmtMode[pAC->Index], "") == 0) {
  3634. pAC->RlmtMode = 0;
  3635. }
  3636. else if (strcmp(RlmtMode[pAC->Index], "CheckLinkState") == 0) {
  3637. pAC->RlmtMode = SK_RLMT_CHECK_LINK;
  3638. }
  3639. else if (strcmp(RlmtMode[pAC->Index], "CheckLocalPort") == 0) {
  3640. pAC->RlmtMode = SK_RLMT_CHECK_LINK |
  3641. SK_RLMT_CHECK_LOC_LINK;
  3642. }
  3643. else if (strcmp(RlmtMode[pAC->Index], "CheckSeg") == 0) {
  3644. pAC->RlmtMode = SK_RLMT_CHECK_LINK |
  3645. SK_RLMT_CHECK_LOC_LINK |
  3646. SK_RLMT_CHECK_SEG;
  3647. }
  3648. else if ((strcmp(RlmtMode[pAC->Index], "DualNet") == 0) &&
  3649. (pAC->GIni.GIMacsFound == 2)) {
  3650. pAC->RlmtMode = SK_RLMT_CHECK_LINK;
  3651. pAC->RlmtNets = 2;
  3652. }
  3653. else {
  3654. printk("%s: Illegal value for"
  3655. " RlmtMode, using default\n", pAC->dev[0]->name);
  3656. pAC->RlmtMode = 0;
  3657. }
  3658. }
  3659. else {
  3660. pAC->RlmtMode = 0;
  3661. }
  3662. } /* GetConfiguration */
  3663. /*****************************************************************************
  3664. *
  3665. * ProductStr - return a adapter identification string from vpd
  3666. *
  3667. * Description:
  3668. * This function reads the product name string from the vpd area
  3669. * and puts it the field pAC->DeviceString.
  3670. *
  3671. * Returns: N/A
  3672. */
  3673. static void ProductStr(
  3674. SK_AC *pAC /* pointer to adapter context */
  3675. )
  3676. {
  3677. int StrLen = 80; /* length of the string, defined in SK_AC */
  3678. char Keyword[] = VPD_NAME; /* vpd productname identifier */
  3679. int ReturnCode; /* return code from vpd_read */
  3680. unsigned long Flags;
  3681. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  3682. ReturnCode = VpdRead(pAC, pAC->IoBase, Keyword, pAC->DeviceStr,
  3683. &StrLen);
  3684. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  3685. if (ReturnCode != 0) {
  3686. /* there was an error reading the vpd data */
  3687. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
  3688. ("Error reading VPD data: %d\n", ReturnCode));
  3689. pAC->DeviceStr[0] = '\0';
  3690. }
  3691. } /* ProductStr */
  3692. /****************************************************************************/
  3693. /* functions for common modules *********************************************/
  3694. /****************************************************************************/
  3695. /*****************************************************************************
  3696. *
  3697. * SkDrvAllocRlmtMbuf - allocate an RLMT mbuf
  3698. *
  3699. * Description:
  3700. * This routine returns an RLMT mbuf or NULL. The RLMT Mbuf structure
  3701. * is embedded into a socket buff data area.
  3702. *
  3703. * Context:
  3704. * runtime
  3705. *
  3706. * Returns:
  3707. * NULL or pointer to Mbuf.
  3708. */
  3709. SK_MBUF *SkDrvAllocRlmtMbuf(
  3710. SK_AC *pAC, /* pointer to adapter context */
  3711. SK_IOC IoC, /* the IO-context */
  3712. unsigned BufferSize) /* size of the requested buffer */
  3713. {
  3714. SK_MBUF *pRlmtMbuf; /* pointer to a new rlmt-mbuf structure */
  3715. struct sk_buff *pMsgBlock; /* pointer to a new message block */
  3716. pMsgBlock = alloc_skb(BufferSize + sizeof(SK_MBUF), GFP_ATOMIC);
  3717. if (pMsgBlock == NULL) {
  3718. return (NULL);
  3719. }
  3720. pRlmtMbuf = (SK_MBUF*) pMsgBlock->data;
  3721. skb_reserve(pMsgBlock, sizeof(SK_MBUF));
  3722. pRlmtMbuf->pNext = NULL;
  3723. pRlmtMbuf->pOs = pMsgBlock;
  3724. pRlmtMbuf->pData = pMsgBlock->data; /* Data buffer. */
  3725. pRlmtMbuf->Size = BufferSize; /* Data buffer size. */
  3726. pRlmtMbuf->Length = 0; /* Length of packet (<= Size). */
  3727. return (pRlmtMbuf);
  3728. } /* SkDrvAllocRlmtMbuf */
  3729. /*****************************************************************************
  3730. *
  3731. * SkDrvFreeRlmtMbuf - free an RLMT mbuf
  3732. *
  3733. * Description:
  3734. * This routine frees one or more RLMT mbuf(s).
  3735. *
  3736. * Context:
  3737. * runtime
  3738. *
  3739. * Returns:
  3740. * Nothing
  3741. */
  3742. void SkDrvFreeRlmtMbuf(
  3743. SK_AC *pAC, /* pointer to adapter context */
  3744. SK_IOC IoC, /* the IO-context */
  3745. SK_MBUF *pMbuf) /* size of the requested buffer */
  3746. {
  3747. SK_MBUF *pFreeMbuf;
  3748. SK_MBUF *pNextMbuf;
  3749. pFreeMbuf = pMbuf;
  3750. do {
  3751. pNextMbuf = pFreeMbuf->pNext;
  3752. DEV_KFREE_SKB_ANY(pFreeMbuf->pOs);
  3753. pFreeMbuf = pNextMbuf;
  3754. } while ( pFreeMbuf != NULL );
  3755. } /* SkDrvFreeRlmtMbuf */
  3756. /*****************************************************************************
  3757. *
  3758. * SkOsGetTime - provide a time value
  3759. *
  3760. * Description:
  3761. * This routine provides a time value. The unit is 1/HZ (defined by Linux).
  3762. * It is not used for absolute time, but only for time differences.
  3763. *
  3764. *
  3765. * Returns:
  3766. * Time value
  3767. */
  3768. SK_U64 SkOsGetTime(SK_AC *pAC)
  3769. {
  3770. #if 0
  3771. return jiffies;
  3772. #else
  3773. return get_timer(0);
  3774. #endif
  3775. } /* SkOsGetTime */
  3776. /*****************************************************************************
  3777. *
  3778. * SkPciReadCfgDWord - read a 32 bit value from pci config space
  3779. *
  3780. * Description:
  3781. * This routine reads a 32 bit value from the pci configuration
  3782. * space.
  3783. *
  3784. * Returns:
  3785. * 0 - indicate everything worked ok.
  3786. * != 0 - error indication
  3787. */
  3788. int SkPciReadCfgDWord(
  3789. SK_AC *pAC, /* Adapter Control structure pointer */
  3790. int PciAddr, /* PCI register address */
  3791. SK_U32 *pVal) /* pointer to store the read value */
  3792. {
  3793. pci_read_config_dword(pAC->PciDev, PciAddr, pVal);
  3794. return(0);
  3795. } /* SkPciReadCfgDWord */
  3796. /*****************************************************************************
  3797. *
  3798. * SkPciReadCfgWord - read a 16 bit value from pci config space
  3799. *
  3800. * Description:
  3801. * This routine reads a 16 bit value from the pci configuration
  3802. * space.
  3803. *
  3804. * Returns:
  3805. * 0 - indicate everything worked ok.
  3806. * != 0 - error indication
  3807. */
  3808. int SkPciReadCfgWord(
  3809. SK_AC *pAC, /* Adapter Control structure pointer */
  3810. int PciAddr, /* PCI register address */
  3811. SK_U16 *pVal) /* pointer to store the read value */
  3812. {
  3813. pci_read_config_word(pAC->PciDev, PciAddr, pVal);
  3814. return(0);
  3815. } /* SkPciReadCfgWord */
  3816. /*****************************************************************************
  3817. *
  3818. * SkPciReadCfgByte - read a 8 bit value from pci config space
  3819. *
  3820. * Description:
  3821. * This routine reads a 8 bit value from the pci configuration
  3822. * space.
  3823. *
  3824. * Returns:
  3825. * 0 - indicate everything worked ok.
  3826. * != 0 - error indication
  3827. */
  3828. int SkPciReadCfgByte(
  3829. SK_AC *pAC, /* Adapter Control structure pointer */
  3830. int PciAddr, /* PCI register address */
  3831. SK_U8 *pVal) /* pointer to store the read value */
  3832. {
  3833. pci_read_config_byte(pAC->PciDev, PciAddr, pVal);
  3834. return(0);
  3835. } /* SkPciReadCfgByte */
  3836. /*****************************************************************************
  3837. *
  3838. * SkPciWriteCfgDWord - write a 32 bit value to pci config space
  3839. *
  3840. * Description:
  3841. * This routine writes a 32 bit value to the pci configuration
  3842. * space.
  3843. *
  3844. * Returns:
  3845. * 0 - indicate everything worked ok.
  3846. * != 0 - error indication
  3847. */
  3848. int SkPciWriteCfgDWord(
  3849. SK_AC *pAC, /* Adapter Control structure pointer */
  3850. int PciAddr, /* PCI register address */
  3851. SK_U32 Val) /* pointer to store the read value */
  3852. {
  3853. pci_write_config_dword(pAC->PciDev, PciAddr, Val);
  3854. return(0);
  3855. } /* SkPciWriteCfgDWord */
  3856. /*****************************************************************************
  3857. *
  3858. * SkPciWriteCfgWord - write a 16 bit value to pci config space
  3859. *
  3860. * Description:
  3861. * This routine writes a 16 bit value to the pci configuration
  3862. * space. The flag PciConfigUp indicates whether the config space
  3863. * is accesible or must be set up first.
  3864. *
  3865. * Returns:
  3866. * 0 - indicate everything worked ok.
  3867. * != 0 - error indication
  3868. */
  3869. int SkPciWriteCfgWord(
  3870. SK_AC *pAC, /* Adapter Control structure pointer */
  3871. int PciAddr, /* PCI register address */
  3872. SK_U16 Val) /* pointer to store the read value */
  3873. {
  3874. pci_write_config_word(pAC->PciDev, PciAddr, Val);
  3875. return(0);
  3876. } /* SkPciWriteCfgWord */
  3877. /*****************************************************************************
  3878. *
  3879. * SkPciWriteCfgWord - write a 8 bit value to pci config space
  3880. *
  3881. * Description:
  3882. * This routine writes a 8 bit value to the pci configuration
  3883. * space. The flag PciConfigUp indicates whether the config space
  3884. * is accesible or must be set up first.
  3885. *
  3886. * Returns:
  3887. * 0 - indicate everything worked ok.
  3888. * != 0 - error indication
  3889. */
  3890. int SkPciWriteCfgByte(
  3891. SK_AC *pAC, /* Adapter Control structure pointer */
  3892. int PciAddr, /* PCI register address */
  3893. SK_U8 Val) /* pointer to store the read value */
  3894. {
  3895. pci_write_config_byte(pAC->PciDev, PciAddr, Val);
  3896. return(0);
  3897. } /* SkPciWriteCfgByte */
  3898. /*****************************************************************************
  3899. *
  3900. * SkDrvEvent - handle driver events
  3901. *
  3902. * Description:
  3903. * This function handles events from all modules directed to the driver
  3904. *
  3905. * Context:
  3906. * Is called under protection of slow path lock.
  3907. *
  3908. * Returns:
  3909. * 0 if everything ok
  3910. * < 0 on error
  3911. *
  3912. */
  3913. int SkDrvEvent(
  3914. SK_AC *pAC, /* pointer to adapter context */
  3915. SK_IOC IoC, /* io-context */
  3916. SK_U32 Event, /* event-id */
  3917. SK_EVPARA Param) /* event-parameter */
  3918. {
  3919. SK_MBUF *pRlmtMbuf; /* pointer to a rlmt-mbuf structure */
  3920. struct sk_buff *pMsg; /* pointer to a message block */
  3921. int FromPort; /* the port from which we switch away */
  3922. int ToPort; /* the port we switch to */
  3923. SK_EVPARA NewPara; /* parameter for further events */
  3924. #if 0
  3925. int Stat;
  3926. #endif
  3927. unsigned long Flags;
  3928. SK_BOOL DualNet;
  3929. switch (Event) {
  3930. case SK_DRV_ADAP_FAIL:
  3931. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3932. ("ADAPTER FAIL EVENT\n"));
  3933. printk("%s: Adapter failed.\n", pAC->dev[0]->name);
  3934. /* disable interrupts */
  3935. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  3936. /* cgoos */
  3937. break;
  3938. case SK_DRV_PORT_FAIL:
  3939. FromPort = Param.Para32[0];
  3940. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3941. ("PORT FAIL EVENT, Port: %d\n", FromPort));
  3942. if (FromPort == 0) {
  3943. printk("%s: Port A failed.\n", pAC->dev[0]->name);
  3944. } else {
  3945. printk("%s: Port B failed.\n", pAC->dev[1]->name);
  3946. }
  3947. /* cgoos */
  3948. break;
  3949. case SK_DRV_PORT_RESET: /* SK_U32 PortIdx */
  3950. /* action list 4 */
  3951. FromPort = Param.Para32[0];
  3952. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3953. ("PORT RESET EVENT, Port: %d ", FromPort));
  3954. NewPara.Para64 = FromPort;
  3955. SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
  3956. spin_lock_irqsave(
  3957. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3958. Flags);
  3959. SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST);
  3960. #if 0
  3961. pAC->dev[Param.Para32[0]]->flags &= ~IFF_RUNNING;
  3962. #endif
  3963. spin_unlock_irqrestore(
  3964. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3965. Flags);
  3966. /* clear rx ring from received frames */
  3967. ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
  3968. ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
  3969. spin_lock_irqsave(
  3970. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3971. Flags);
  3972. /* tschilling: Handling of return value inserted. */
  3973. if (SkGeInitPort(pAC, IoC, FromPort)) {
  3974. if (FromPort == 0) {
  3975. printk("%s: SkGeInitPort A failed.\n", pAC->dev[0]->name);
  3976. } else {
  3977. printk("%s: SkGeInitPort B failed.\n", pAC->dev[1]->name);
  3978. }
  3979. }
  3980. SkAddrMcUpdate(pAC,IoC, FromPort);
  3981. PortReInitBmu(pAC, FromPort);
  3982. SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
  3983. ClearAndStartRx(pAC, FromPort);
  3984. spin_unlock_irqrestore(
  3985. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3986. Flags);
  3987. break;
  3988. case SK_DRV_NET_UP: /* SK_U32 PortIdx */
  3989. /* action list 5 */
  3990. FromPort = Param.Para32[0];
  3991. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3992. ("NET UP EVENT, Port: %d ", Param.Para32[0]));
  3993. #ifdef SK98_INFO
  3994. printk("%s: network connection up using"
  3995. " port %c\n", pAC->dev[Param.Para32[0]]->name, 'A'+Param.Para32[0]);
  3996. /* tschilling: Values changed according to LinkSpeedUsed. */
  3997. Stat = pAC->GIni.GP[FromPort].PLinkSpeedUsed;
  3998. if (Stat == SK_LSPEED_STAT_10MBPS) {
  3999. printk(" speed: 10\n");
  4000. } else if (Stat == SK_LSPEED_STAT_100MBPS) {
  4001. printk(" speed: 100\n");
  4002. } else if (Stat == SK_LSPEED_STAT_1000MBPS) {
  4003. printk(" speed: 1000\n");
  4004. } else {
  4005. printk(" speed: unknown\n");
  4006. }
  4007. Stat = pAC->GIni.GP[FromPort].PLinkModeStatus;
  4008. if (Stat == SK_LMODE_STAT_AUTOHALF ||
  4009. Stat == SK_LMODE_STAT_AUTOFULL) {
  4010. printk(" autonegotiation: yes\n");
  4011. }
  4012. else {
  4013. printk(" autonegotiation: no\n");
  4014. }
  4015. if (Stat == SK_LMODE_STAT_AUTOHALF ||
  4016. Stat == SK_LMODE_STAT_HALF) {
  4017. printk(" duplex mode: half\n");
  4018. }
  4019. else {
  4020. printk(" duplex mode: full\n");
  4021. }
  4022. Stat = pAC->GIni.GP[FromPort].PFlowCtrlStatus;
  4023. if (Stat == SK_FLOW_STAT_REM_SEND ) {
  4024. printk(" flowctrl: remote send\n");
  4025. }
  4026. else if (Stat == SK_FLOW_STAT_LOC_SEND ){
  4027. printk(" flowctrl: local send\n");
  4028. }
  4029. else if (Stat == SK_FLOW_STAT_SYMMETRIC ){
  4030. printk(" flowctrl: symmetric\n");
  4031. }
  4032. else {
  4033. printk(" flowctrl: none\n");
  4034. }
  4035. /* tschilling: Check against CopperType now. */
  4036. if ((pAC->GIni.GICopperType == SK_TRUE) &&
  4037. (pAC->GIni.GP[FromPort].PLinkSpeedUsed ==
  4038. SK_LSPEED_STAT_1000MBPS)) {
  4039. Stat = pAC->GIni.GP[FromPort].PMSStatus;
  4040. if (Stat == SK_MS_STAT_MASTER ) {
  4041. printk(" role: master\n");
  4042. }
  4043. else if (Stat == SK_MS_STAT_SLAVE ) {
  4044. printk(" role: slave\n");
  4045. }
  4046. else {
  4047. printk(" role: ???\n");
  4048. }
  4049. }
  4050. #ifdef SK_ZEROCOPY
  4051. if (pAC->GIni.GIChipId == CHIP_ID_YUKON)
  4052. printk(" scatter-gather: enabled\n");
  4053. else
  4054. printk(" scatter-gather: disabled\n");
  4055. #else
  4056. printk(" scatter-gather: disabled\n");
  4057. #endif
  4058. #endif /* SK98_INFO */
  4059. if ((Param.Para32[0] != pAC->ActivePort) &&
  4060. (pAC->RlmtNets == 1)) {
  4061. NewPara.Para32[0] = pAC->ActivePort;
  4062. NewPara.Para32[1] = Param.Para32[0];
  4063. SkEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_INTERN,
  4064. NewPara);
  4065. }
  4066. /* Inform the world that link protocol is up. */
  4067. #if 0
  4068. pAC->dev[Param.Para32[0]]->flags |= IFF_RUNNING;
  4069. #endif
  4070. break;
  4071. case SK_DRV_NET_DOWN: /* SK_U32 Reason */
  4072. /* action list 7 */
  4073. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  4074. ("NET DOWN EVENT "));
  4075. #ifdef SK98_INFO
  4076. printk("%s: network connection down\n", pAC->dev[Param.Para32[1]]->name);
  4077. #endif
  4078. #if 0
  4079. pAC->dev[Param.Para32[1]]->flags &= ~IFF_RUNNING;
  4080. #endif
  4081. break;
  4082. case SK_DRV_SWITCH_HARD: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
  4083. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  4084. ("PORT SWITCH HARD "));
  4085. case SK_DRV_SWITCH_SOFT: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
  4086. /* action list 6 */
  4087. printk("%s: switching to port %c\n", pAC->dev[0]->name,
  4088. 'A'+Param.Para32[1]);
  4089. case SK_DRV_SWITCH_INTERN: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
  4090. FromPort = Param.Para32[0];
  4091. ToPort = Param.Para32[1];
  4092. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  4093. ("PORT SWITCH EVENT, From: %d To: %d (Pref %d) ",
  4094. FromPort, ToPort, pAC->Rlmt.Net[0].PrefPort));
  4095. NewPara.Para64 = FromPort;
  4096. SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
  4097. NewPara.Para64 = ToPort;
  4098. SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
  4099. spin_lock_irqsave(
  4100. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  4101. Flags);
  4102. spin_lock_irqsave(
  4103. &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
  4104. SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
  4105. SkGeStopPort(pAC, IoC, ToPort, SK_STOP_ALL, SK_SOFT_RST);
  4106. spin_unlock_irqrestore(
  4107. &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
  4108. spin_unlock_irqrestore(
  4109. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  4110. Flags);
  4111. ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE); /* clears rx ring */
  4112. ReceiveIrq(pAC, &pAC->RxPort[ToPort], SK_FALSE); /* clears rx ring */
  4113. ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
  4114. ClearTxRing(pAC, &pAC->TxPort[ToPort][TX_PRIO_LOW]);
  4115. spin_lock_irqsave(
  4116. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  4117. Flags);
  4118. spin_lock_irqsave(
  4119. &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
  4120. pAC->ActivePort = ToPort;
  4121. #if 0
  4122. SetQueueSizes(pAC);
  4123. #else
  4124. /* tschilling: New common function with minimum size check. */
  4125. DualNet = SK_FALSE;
  4126. if (pAC->RlmtNets == 2) {
  4127. DualNet = SK_TRUE;
  4128. }
  4129. if (SkGeInitAssignRamToQueues(
  4130. pAC,
  4131. pAC->ActivePort,
  4132. DualNet)) {
  4133. spin_unlock_irqrestore(
  4134. &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
  4135. spin_unlock_irqrestore(
  4136. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  4137. Flags);
  4138. printk("SkGeInitAssignRamToQueues failed.\n");
  4139. break;
  4140. }
  4141. #endif
  4142. /* tschilling: Handling of return values inserted. */
  4143. if (SkGeInitPort(pAC, IoC, FromPort) ||
  4144. SkGeInitPort(pAC, IoC, ToPort)) {
  4145. printk("%s: SkGeInitPort failed.\n", pAC->dev[0]->name);
  4146. }
  4147. if (Event == SK_DRV_SWITCH_SOFT) {
  4148. SkMacRxTxEnable(pAC, IoC, FromPort);
  4149. }
  4150. SkMacRxTxEnable(pAC, IoC, ToPort);
  4151. SkAddrSwap(pAC, IoC, FromPort, ToPort);
  4152. SkAddrMcUpdate(pAC, IoC, FromPort);
  4153. SkAddrMcUpdate(pAC, IoC, ToPort);
  4154. PortReInitBmu(pAC, FromPort);
  4155. PortReInitBmu(pAC, ToPort);
  4156. SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
  4157. SkGePollTxD(pAC, IoC, ToPort, SK_TRUE);
  4158. ClearAndStartRx(pAC, FromPort);
  4159. ClearAndStartRx(pAC, ToPort);
  4160. spin_unlock_irqrestore(
  4161. &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
  4162. spin_unlock_irqrestore(
  4163. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  4164. Flags);
  4165. break;
  4166. case SK_DRV_RLMT_SEND: /* SK_MBUF *pMb */
  4167. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  4168. ("RLS "));
  4169. pRlmtMbuf = (SK_MBUF*) Param.pParaPtr;
  4170. pMsg = (struct sk_buff*) pRlmtMbuf->pOs;
  4171. skb_put(pMsg, pRlmtMbuf->Length);
  4172. if (XmitFrame(pAC, &pAC->TxPort[pRlmtMbuf->PortIdx][TX_PRIO_LOW],
  4173. pMsg) < 0)
  4174. DEV_KFREE_SKB_ANY(pMsg);
  4175. break;
  4176. default:
  4177. break;
  4178. }
  4179. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  4180. ("END EVENT "));
  4181. return (0);
  4182. } /* SkDrvEvent */
  4183. /*****************************************************************************
  4184. *
  4185. * SkErrorLog - log errors
  4186. *
  4187. * Description:
  4188. * This function logs errors to the system buffer and to the console
  4189. *
  4190. * Returns:
  4191. * 0 if everything ok
  4192. * < 0 on error
  4193. *
  4194. */
  4195. void SkErrorLog(
  4196. SK_AC *pAC,
  4197. int ErrClass,
  4198. int ErrNum,
  4199. char *pErrorMsg)
  4200. {
  4201. char ClassStr[80];
  4202. switch (ErrClass) {
  4203. case SK_ERRCL_OTHER:
  4204. strcpy(ClassStr, "Other error");
  4205. break;
  4206. case SK_ERRCL_CONFIG:
  4207. strcpy(ClassStr, "Configuration error");
  4208. break;
  4209. case SK_ERRCL_INIT:
  4210. strcpy(ClassStr, "Initialization error");
  4211. break;
  4212. case SK_ERRCL_NORES:
  4213. strcpy(ClassStr, "Out of resources error");
  4214. break;
  4215. case SK_ERRCL_SW:
  4216. strcpy(ClassStr, "internal Software error");
  4217. break;
  4218. case SK_ERRCL_HW:
  4219. strcpy(ClassStr, "Hardware failure");
  4220. break;
  4221. case SK_ERRCL_COMM:
  4222. strcpy(ClassStr, "Communication error");
  4223. break;
  4224. }
  4225. printk(KERN_INFO "%s: -- ERROR --\n Class: %s\n"
  4226. " Nr: 0x%x\n Msg: %s\n", pAC->dev[0]->name,
  4227. ClassStr, ErrNum, pErrorMsg);
  4228. } /* SkErrorLog */
  4229. #ifdef DEBUG
  4230. /****************************************************************************/
  4231. /* "debug only" section *****************************************************/
  4232. /****************************************************************************/
  4233. /*****************************************************************************
  4234. *
  4235. * DumpMsg - print a frame
  4236. *
  4237. * Description:
  4238. * This function prints frames to the system logfile/to the console.
  4239. *
  4240. * Returns: N/A
  4241. *
  4242. */
  4243. static void DumpMsg(struct sk_buff *skb, char *str)
  4244. {
  4245. int msglen;
  4246. if (skb == NULL) {
  4247. printk("DumpMsg(): NULL-Message\n");
  4248. return;
  4249. }
  4250. if (skb->data == NULL) {
  4251. printk("DumpMsg(): Message empty\n");
  4252. return;
  4253. }
  4254. msglen = skb->len;
  4255. if (msglen > 64)
  4256. msglen = 64;
  4257. printk("--- Begin of message from %s , len %d (from %d) ----\n", str, msglen, skb->len);
  4258. DumpData((char *)skb->data, msglen);
  4259. printk("------- End of message ---------\n");
  4260. } /* DumpMsg */
  4261. /*****************************************************************************
  4262. *
  4263. * DumpData - print a data area
  4264. *
  4265. * Description:
  4266. * This function prints a area of data to the system logfile/to the
  4267. * console.
  4268. *
  4269. * Returns: N/A
  4270. *
  4271. */
  4272. static void DumpData(char *p, int size)
  4273. {
  4274. register int i;
  4275. int haddr, addr;
  4276. char hex_buffer[180];
  4277. char asc_buffer[180];
  4278. char HEXCHAR[] = "0123456789ABCDEF";
  4279. addr = 0;
  4280. haddr = 0;
  4281. hex_buffer[0] = 0;
  4282. asc_buffer[0] = 0;
  4283. for (i=0; i < size; ) {
  4284. if (*p >= '0' && *p <='z')
  4285. asc_buffer[addr] = *p;
  4286. else
  4287. asc_buffer[addr] = '.';
  4288. addr++;
  4289. asc_buffer[addr] = 0;
  4290. hex_buffer[haddr] = HEXCHAR[(*p & 0xf0) >> 4];
  4291. haddr++;
  4292. hex_buffer[haddr] = HEXCHAR[*p & 0x0f];
  4293. haddr++;
  4294. hex_buffer[haddr] = ' ';
  4295. haddr++;
  4296. hex_buffer[haddr] = 0;
  4297. p++;
  4298. i++;
  4299. if (i%16 == 0) {
  4300. printk("%s %s\n", hex_buffer, asc_buffer);
  4301. addr = 0;
  4302. haddr = 0;
  4303. }
  4304. }
  4305. } /* DumpData */
  4306. /*****************************************************************************
  4307. *
  4308. * DumpLong - print a data area as long values
  4309. *
  4310. * Description:
  4311. * This function prints a area of data to the system logfile/to the
  4312. * console.
  4313. *
  4314. * Returns: N/A
  4315. *
  4316. */
  4317. static void DumpLong(char *pc, int size)
  4318. {
  4319. register int i;
  4320. int haddr, addr;
  4321. char hex_buffer[180];
  4322. char asc_buffer[180];
  4323. char HEXCHAR[] = "0123456789ABCDEF";
  4324. long *p;
  4325. int l;
  4326. addr = 0;
  4327. haddr = 0;
  4328. hex_buffer[0] = 0;
  4329. asc_buffer[0] = 0;
  4330. p = (long*) pc;
  4331. for (i=0; i < size; ) {
  4332. l = (long) *p;
  4333. hex_buffer[haddr] = HEXCHAR[(l >> 28) & 0xf];
  4334. haddr++;
  4335. hex_buffer[haddr] = HEXCHAR[(l >> 24) & 0xf];
  4336. haddr++;
  4337. hex_buffer[haddr] = HEXCHAR[(l >> 20) & 0xf];
  4338. haddr++;
  4339. hex_buffer[haddr] = HEXCHAR[(l >> 16) & 0xf];
  4340. haddr++;
  4341. hex_buffer[haddr] = HEXCHAR[(l >> 12) & 0xf];
  4342. haddr++;
  4343. hex_buffer[haddr] = HEXCHAR[(l >> 8) & 0xf];
  4344. haddr++;
  4345. hex_buffer[haddr] = HEXCHAR[(l >> 4) & 0xf];
  4346. haddr++;
  4347. hex_buffer[haddr] = HEXCHAR[l & 0x0f];
  4348. haddr++;
  4349. hex_buffer[haddr] = ' ';
  4350. haddr++;
  4351. hex_buffer[haddr] = 0;
  4352. p++;
  4353. i++;
  4354. if (i%8 == 0) {
  4355. printk("%4x %s\n", (i-8)*4, hex_buffer);
  4356. haddr = 0;
  4357. }
  4358. }
  4359. printk("------------------------\n");
  4360. } /* DumpLong */
  4361. #endif