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Makefile
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c360ceac02
fsl-ddr: add the DDR3 SPD infrastructure
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пре 16 година |
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common_timing_params.h
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58e5e9aff1
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
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пре 16 година |
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ctrl_regs.c
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e7563aff17
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
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пре 16 година |
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ddr.h
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e7563aff17
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
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пре 16 година |
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ddr1_dimm_params.c
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e7563aff17
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
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пре 16 година |
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ddr2_dimm_params.c
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e7563aff17
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
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пре 16 година |
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ddr3_dimm_params.c
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e7563aff17
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
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пре 16 година |
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lc_common_dimm_params.c
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c360ceac02
fsl-ddr: add the DDR3 SPD infrastructure
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пре 16 година |
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main.c
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e7563aff17
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
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пре 16 година |
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options.c
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c360ceac02
fsl-ddr: add the DDR3 SPD infrastructure
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пре 16 година |
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util.c
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e7563aff17
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
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пре 16 година |
Kumar Gala
e7563aff17
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT