i2c.c 8.0 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. DECLARE_GLOBAL_DATA_PTR;
  25. #ifdef CONFIG_HARD_I2C
  26. #include <mpc5xxx.h>
  27. #include <i2c.h>
  28. #if (CONFIG_SYS_I2C_MODULE == 2)
  29. #define I2C_BASE MPC5XXX_I2C2
  30. #elif (CONFIG_SYS_I2C_MODULE == 1)
  31. #define I2C_BASE MPC5XXX_I2C1
  32. #else
  33. #error CONFIG_SYS_I2C_MODULE is not properly configured
  34. #endif
  35. #define I2C_TIMEOUT 6667
  36. #define I2C_RETRIES 3
  37. struct mpc5xxx_i2c_tap {
  38. int scl2tap;
  39. int tap2tap;
  40. };
  41. static int mpc_reg_in (volatile u32 *reg);
  42. static void mpc_reg_out (volatile u32 *reg, int val, int mask);
  43. static int wait_for_bb (void);
  44. static int wait_for_pin (int *status);
  45. static int do_address (uchar chip, char rdwr_flag);
  46. static int send_bytes (uchar chip, char *buf, int len);
  47. static int receive_bytes (uchar chip, char *buf, int len);
  48. static int mpc_get_fdr (int);
  49. static int mpc_reg_in(volatile u32 *reg)
  50. {
  51. int ret = *reg >> 24;
  52. __asm__ __volatile__ ("eieio");
  53. return ret;
  54. }
  55. static void mpc_reg_out(volatile u32 *reg, int val, int mask)
  56. {
  57. int tmp;
  58. if (!mask) {
  59. *reg = val << 24;
  60. } else {
  61. tmp = mpc_reg_in(reg);
  62. *reg = ((tmp & ~mask) | (val & mask)) << 24;
  63. }
  64. __asm__ __volatile__ ("eieio");
  65. return;
  66. }
  67. static int wait_for_bb(void)
  68. {
  69. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  70. int timeout = I2C_TIMEOUT;
  71. int status;
  72. status = mpc_reg_in(&regs->msr);
  73. while (timeout-- && (status & I2C_BB)) {
  74. #if 1
  75. volatile int temp;
  76. mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
  77. temp = mpc_reg_in(&regs->mdr);
  78. mpc_reg_out(&regs->mcr, 0, I2C_STA);
  79. mpc_reg_out(&regs->mcr, 0, 0);
  80. mpc_reg_out(&regs->mcr, I2C_EN, 0);
  81. #endif
  82. udelay(15);
  83. status = mpc_reg_in(&regs->msr);
  84. }
  85. return (status & I2C_BB);
  86. }
  87. static int wait_for_pin(int *status)
  88. {
  89. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  90. int timeout = I2C_TIMEOUT;
  91. *status = mpc_reg_in(&regs->msr);
  92. while (timeout-- && !(*status & I2C_IF)) {
  93. udelay(15);
  94. *status = mpc_reg_in(&regs->msr);
  95. }
  96. if (!(*status & I2C_IF)) {
  97. return -1;
  98. }
  99. mpc_reg_out(&regs->msr, 0, I2C_IF);
  100. return 0;
  101. }
  102. static int do_address(uchar chip, char rdwr_flag)
  103. {
  104. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  105. int status;
  106. chip <<= 1;
  107. if (rdwr_flag) {
  108. chip |= 1;
  109. }
  110. mpc_reg_out(&regs->mcr, I2C_TX, I2C_TX);
  111. mpc_reg_out(&regs->mdr, chip, 0);
  112. if (wait_for_pin(&status)) {
  113. return -2;
  114. }
  115. if (status & I2C_RXAK) {
  116. return -3;
  117. }
  118. return 0;
  119. }
  120. static int send_bytes(uchar chip, char *buf, int len)
  121. {
  122. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  123. int wrcount;
  124. int status;
  125. for (wrcount = 0; wrcount < len; ++wrcount) {
  126. mpc_reg_out(&regs->mdr, buf[wrcount], 0);
  127. if (wait_for_pin(&status)) {
  128. break;
  129. }
  130. if (status & I2C_RXAK) {
  131. break;
  132. }
  133. }
  134. return !(wrcount == len);
  135. }
  136. static int receive_bytes(uchar chip, char *buf, int len)
  137. {
  138. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  139. int dummy = 1;
  140. int rdcount = 0;
  141. int status;
  142. int i;
  143. mpc_reg_out(&regs->mcr, 0, I2C_TX);
  144. for (i = 0; i < len; ++i) {
  145. buf[rdcount] = mpc_reg_in(&regs->mdr);
  146. if (dummy) {
  147. dummy = 0;
  148. } else {
  149. rdcount++;
  150. }
  151. if (wait_for_pin(&status)) {
  152. return -4;
  153. }
  154. }
  155. mpc_reg_out(&regs->mcr, I2C_TXAK, I2C_TXAK);
  156. buf[rdcount++] = mpc_reg_in(&regs->mdr);
  157. if (wait_for_pin(&status)) {
  158. return -5;
  159. }
  160. mpc_reg_out(&regs->mcr, 0, I2C_TXAK);
  161. return 0;
  162. }
  163. /**************** I2C API ****************/
  164. void i2c_init(int speed, int saddr)
  165. {
  166. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  167. mpc_reg_out(&regs->mcr, 0, 0);
  168. mpc_reg_out(&regs->madr, saddr << 1, 0);
  169. /* Set clock
  170. */
  171. mpc_reg_out(&regs->mfdr, mpc_get_fdr(speed), 0);
  172. /* Enable module
  173. */
  174. mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
  175. mpc_reg_out(&regs->msr, 0, I2C_IF);
  176. return;
  177. }
  178. static int mpc_get_fdr(int speed)
  179. {
  180. static int fdr = -1;
  181. if (fdr == -1) {
  182. ulong best_speed = 0;
  183. ulong divider;
  184. ulong ipb, scl;
  185. ulong bestmatch = 0xffffffffUL;
  186. int best_i = 0, best_j = 0, i, j;
  187. int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
  188. struct mpc5xxx_i2c_tap scltap[] = {
  189. {4, 1},
  190. {4, 2},
  191. {6, 4},
  192. {6, 8},
  193. {14, 16},
  194. {30, 32},
  195. {62, 64},
  196. {126, 128}
  197. };
  198. ipb = gd->ipb_clk;
  199. for (i = 7; i >= 0; i--) {
  200. for (j = 7; j >= 0; j--) {
  201. scl = 2 * (scltap[j].scl2tap +
  202. (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2);
  203. if (ipb <= speed*scl) {
  204. if ((speed*scl - ipb) < bestmatch) {
  205. bestmatch = speed*scl - ipb;
  206. best_i = i;
  207. best_j = j;
  208. best_speed = ipb/scl;
  209. }
  210. }
  211. }
  212. }
  213. divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
  214. if (gd->flags & GD_FLG_RELOC) {
  215. fdr = divider;
  216. } else {
  217. if (gd->have_console)
  218. printf("%ld kHz, ", best_speed / 1000);
  219. return divider;
  220. }
  221. }
  222. return fdr;
  223. }
  224. int i2c_probe(uchar chip)
  225. {
  226. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  227. int i;
  228. for (i = 0; i < I2C_RETRIES; i++) {
  229. mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
  230. if (! do_address(chip, 0)) {
  231. mpc_reg_out(&regs->mcr, 0, I2C_STA);
  232. udelay(500);
  233. break;
  234. }
  235. mpc_reg_out(&regs->mcr, 0, I2C_STA);
  236. udelay(500);
  237. }
  238. return (i == I2C_RETRIES);
  239. }
  240. int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
  241. {
  242. char xaddr[4];
  243. struct mpc5xxx_i2c * regs = (struct mpc5xxx_i2c *)I2C_BASE;
  244. int ret = -1;
  245. xaddr[0] = (addr >> 24) & 0xFF;
  246. xaddr[1] = (addr >> 16) & 0xFF;
  247. xaddr[2] = (addr >> 8) & 0xFF;
  248. xaddr[3] = addr & 0xFF;
  249. if (wait_for_bb()) {
  250. if (gd->have_console)
  251. printf("i2c_read: bus is busy\n");
  252. goto Done;
  253. }
  254. mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
  255. if (do_address(chip, 0)) {
  256. if (gd->have_console)
  257. printf("i2c_read: failed to address chip\n");
  258. goto Done;
  259. }
  260. if (send_bytes(chip, &xaddr[4-alen], alen)) {
  261. if (gd->have_console)
  262. printf("i2c_read: send_bytes failed\n");
  263. goto Done;
  264. }
  265. mpc_reg_out(&regs->mcr, I2C_RSTA, I2C_RSTA);
  266. if (do_address(chip, 1)) {
  267. if (gd->have_console)
  268. printf("i2c_read: failed to address chip\n");
  269. goto Done;
  270. }
  271. if (receive_bytes(chip, (char *)buf, len)) {
  272. if (gd->have_console)
  273. printf("i2c_read: receive_bytes failed\n");
  274. goto Done;
  275. }
  276. ret = 0;
  277. Done:
  278. mpc_reg_out(&regs->mcr, 0, I2C_STA);
  279. return ret;
  280. }
  281. int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
  282. {
  283. char xaddr[4];
  284. struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
  285. int ret = -1;
  286. xaddr[0] = (addr >> 24) & 0xFF;
  287. xaddr[1] = (addr >> 16) & 0xFF;
  288. xaddr[2] = (addr >> 8) & 0xFF;
  289. xaddr[3] = addr & 0xFF;
  290. if (wait_for_bb()) {
  291. if (gd->have_console)
  292. printf("i2c_write: bus is busy\n");
  293. goto Done;
  294. }
  295. mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
  296. if (do_address(chip, 0)) {
  297. if (gd->have_console)
  298. printf("i2c_write: failed to address chip\n");
  299. goto Done;
  300. }
  301. if (send_bytes(chip, &xaddr[4-alen], alen)) {
  302. if (gd->have_console)
  303. printf("i2c_write: send_bytes failed\n");
  304. goto Done;
  305. }
  306. if (send_bytes(chip, (char *)buf, len)) {
  307. if (gd->have_console)
  308. printf("i2c_write: send_bytes failed\n");
  309. goto Done;
  310. }
  311. ret = 0;
  312. Done:
  313. mpc_reg_out(&regs->mcr, 0, I2C_STA);
  314. return ret;
  315. }
  316. #endif /* CONFIG_HARD_I2C */