bcm5221.c 6.4 KB

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  1. /*
  2. * Broadcom BCM5221 Ethernet PHY
  3. *
  4. * (C) Copyright 2005 REA Elektronik GmbH <www.rea.de>
  5. * Anders Larsen <alarsen@rea.de>
  6. *
  7. * (C) Copyright 2003
  8. * Author : Hamid Ikdoumi (Atmel)
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #include <at91rm9200_net.h>
  29. #include <net.h>
  30. #include <bcm5221.h>
  31. #ifdef CONFIG_DRIVER_ETHER
  32. #if defined(CONFIG_CMD_NET)
  33. /*
  34. * Name:
  35. * bcm5221_IsPhyConnected
  36. * Description:
  37. * Reads the 2 PHY ID registers
  38. * Arguments:
  39. * p_mac - pointer to AT91S_EMAC struct
  40. * Return value:
  41. * TRUE - if id read successfully
  42. * FALSE- if error
  43. */
  44. unsigned int bcm5221_IsPhyConnected (AT91PS_EMAC p_mac)
  45. {
  46. unsigned short Id1, Id2;
  47. at91rm9200_EmacEnableMDIO (p_mac);
  48. at91rm9200_EmacReadPhy (p_mac, BCM5221_PHYID1, &Id1);
  49. at91rm9200_EmacReadPhy (p_mac, BCM5221_PHYID2, &Id2);
  50. at91rm9200_EmacDisableMDIO (p_mac);
  51. if ((Id1 == (BCM5221_PHYID1_OUI >> 6)) &&
  52. ((Id2 >> 10) == (BCM5221_PHYID1_OUI & BCM5221_LSB_MASK)))
  53. return TRUE;
  54. return FALSE;
  55. }
  56. /*
  57. * Name:
  58. * bcm5221_GetLinkSpeed
  59. * Description:
  60. * Link parallel detection status of MAC is checked and set in the
  61. * MAC configuration registers
  62. * Arguments:
  63. * p_mac - pointer to MAC
  64. * Return value:
  65. * TRUE - if link status set succesfully
  66. * FALSE - if link status not set
  67. */
  68. unsigned char bcm5221_GetLinkSpeed (AT91PS_EMAC p_mac)
  69. {
  70. unsigned short stat1, stat2;
  71. if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_BMSR, &stat1))
  72. return FALSE;
  73. if (!(stat1 & BCM5221_LINK_STATUS)) /* link status up? */
  74. return FALSE;
  75. if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_ACSR, &stat2))
  76. return FALSE;
  77. if ((stat1 & BCM5221_100BASE_TX_FD) && (stat2 & BCM5221_100) && (stat2 & BCM5221_FDX)) {
  78. /*set Emac for 100BaseTX and Full Duplex */
  79. p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
  80. return TRUE;
  81. }
  82. if ((stat1 & BCM5221_10BASE_T_FD) && !(stat2 & BCM5221_100) && (stat2 & BCM5221_FDX)) {
  83. /*set MII for 10BaseT and Full Duplex */
  84. p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
  85. ~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
  86. | AT91C_EMAC_FD;
  87. return TRUE;
  88. }
  89. if ((stat1 & BCM5221_100BASE_TX_HD) && (stat2 & BCM5221_100) && !(stat2 & BCM5221_FDX)) {
  90. /*set MII for 100BaseTX and Half Duplex */
  91. p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
  92. ~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
  93. | AT91C_EMAC_SPD;
  94. return TRUE;
  95. }
  96. if ((stat1 & BCM5221_10BASE_T_HD) && !(stat2 & BCM5221_100) && !(stat2 & BCM5221_FDX)) {
  97. /*set MII for 10BaseT and Half Duplex */
  98. p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
  99. return TRUE;
  100. }
  101. return FALSE;
  102. }
  103. /*
  104. * Name:
  105. * bcm5221_InitPhy
  106. * Description:
  107. * MAC starts checking its link by using parallel detection and
  108. * Autonegotiation and the same is set in the MAC configuration registers
  109. * Arguments:
  110. * p_mac - pointer to struct AT91S_EMAC
  111. * Return value:
  112. * TRUE - if link status set succesfully
  113. * FALSE - if link status not set
  114. */
  115. unsigned char bcm5221_InitPhy (AT91PS_EMAC p_mac)
  116. {
  117. unsigned char ret = TRUE;
  118. unsigned short IntValue;
  119. at91rm9200_EmacEnableMDIO (p_mac);
  120. if (!bcm5221_GetLinkSpeed (p_mac)) {
  121. /* Try another time */
  122. ret = bcm5221_GetLinkSpeed (p_mac);
  123. }
  124. /* Disable PHY Interrupts */
  125. at91rm9200_EmacReadPhy (p_mac, BCM5221_INTR, &IntValue);
  126. /* clear FDX LED and INTR Enable */
  127. IntValue &= ~(BCM5221_FDX_LED | BCM5221_INTR_ENABLE);
  128. /* set FDX, SPD, Link, INTR masks */
  129. IntValue |= (BCM5221_FDX_MASK | BCM5221_SPD_MASK |
  130. BCM5221_LINK_MASK | BCM5221_INTR_MASK);
  131. at91rm9200_EmacWritePhy (p_mac, BCM5221_INTR, &IntValue);
  132. at91rm9200_EmacDisableMDIO (p_mac);
  133. return (ret);
  134. }
  135. /*
  136. * Name:
  137. * bcm5221_AutoNegotiate
  138. * Description:
  139. * MAC Autonegotiates with the partner status of same is set in the
  140. * MAC configuration registers
  141. * Arguments:
  142. * dev - pointer to struct net_device
  143. * Return value:
  144. * TRUE - if link status set successfully
  145. * FALSE - if link status not set
  146. */
  147. unsigned char bcm5221_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
  148. {
  149. unsigned short value;
  150. unsigned short PhyAnar;
  151. unsigned short PhyAnalpar;
  152. /* Set bcm5221 control register */
  153. if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_BMCR, &value))
  154. return FALSE;
  155. value &= ~BCM5221_AUTONEG; /* remove autonegotiation enable */
  156. value |= BCM5221_ISOLATE; /* Electrically isolate PHY */
  157. if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_BMCR, &value))
  158. return FALSE;
  159. /* Set the Auto_negotiation Advertisement Register */
  160. /* MII advertising for 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */
  161. PhyAnar = BCM5221_TX_FDX | BCM5221_TX_HDX |
  162. BCM5221_10_FDX | BCM5221_10_HDX | BCM5221_AN_IEEE_802_3;
  163. if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_ANAR, &PhyAnar))
  164. return FALSE;
  165. /* Read the Control Register */
  166. if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_BMCR, &value))
  167. return FALSE;
  168. value |= BCM5221_SPEED_SELECT | BCM5221_AUTONEG | BCM5221_DUPLEX_MODE;
  169. if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_BMCR, &value))
  170. return FALSE;
  171. /* Restart Auto_negotiation */
  172. value |= BCM5221_RESTART_AUTONEG;
  173. value &= ~BCM5221_ISOLATE;
  174. if (!at91rm9200_EmacWritePhy (p_mac, BCM5221_BMCR, &value))
  175. return FALSE;
  176. /*check AutoNegotiate complete */
  177. udelay (10000);
  178. at91rm9200_EmacReadPhy (p_mac, BCM5221_BMSR, &value);
  179. if (!(value & BCM5221_AUTONEG_COMP))
  180. return FALSE;
  181. /* Get the AutoNeg Link partner base page */
  182. if (!at91rm9200_EmacReadPhy (p_mac, BCM5221_ANLPAR, &PhyAnalpar))
  183. return FALSE;
  184. if ((PhyAnar & BCM5221_TX_FDX) && (PhyAnalpar & BCM5221_TX_FDX)) {
  185. /*set MII for 100BaseTX and Full Duplex */
  186. p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
  187. return TRUE;
  188. }
  189. if ((PhyAnar & BCM5221_10_FDX) && (PhyAnalpar & BCM5221_10_FDX)) {
  190. /*set MII for 10BaseT and Full Duplex */
  191. p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
  192. ~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
  193. | AT91C_EMAC_FD;
  194. return TRUE;
  195. }
  196. return FALSE;
  197. }
  198. #endif
  199. #endif /* CONFIG_DRIVER_ETHER */