| .. |
|
Makefile
|
0e7927db13
FSL DDR: Convert STXSSA to new DDR code.
|
16 years ago |
|
config.mk
|
ee1529838a
Add support for STX GP3SSA (stxssa) Board with 4 MiB flash.
|
18 years ago |
|
ddr.c
|
b4983e16d1
fsl-ddr: use the 1T timing as default configuration
|
16 years ago |
|
law.c
|
6d0f6bcf33
rename CFG_ macros to CONFIG_SYS
|
16 years ago |
|
stxssa.c
|
6d0f6bcf33
rename CFG_ macros to CONFIG_SYS
|
16 years ago |
|
tlb.c
|
6d0f6bcf33
rename CFG_ macros to CONFIG_SYS
|
16 years ago |
|
u-boot.lds
|
f62fb99941
Fix all linker script to handle all rodata sections
|
16 years ago |
Trent Piepho
f62fb99941
Fix all linker script to handle all rodata sections