tlb.c 2.2 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc.
  3. *
  4. * (C) Copyright 2000
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <common.h>
  26. #include <asm/mmu.h>
  27. struct fsl_e_tlb_entry tlb_table[] = {
  28. /* TLB for CCSRBAR (IMMR) */
  29. SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
  30. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  31. 0, 1, BOOKE_PAGESZ_1M, 1),
  32. /* TLB for Local Bus stuff, just map the whole 512M */
  33. /* note that the LBC SDRAM is cache-inhibit and guarded, like everything else */
  34. SET_TLB_ENTRY(1, 0xe0000000, 0xe0000000,
  35. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  36. 0, 2, BOOKE_PAGESZ_256M, 1),
  37. SET_TLB_ENTRY(1, 0xf0000000, 0xf0000000,
  38. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  39. 0, 3, BOOKE_PAGESZ_256M, 1),
  40. #if !defined(CONFIG_SPD_EEPROM)
  41. SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
  42. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  43. 0, 4, BOOKE_PAGESZ_256M, 1),
  44. SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
  45. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  46. 0, 5, BOOKE_PAGESZ_256M, 1),
  47. #endif
  48. SET_TLB_ENTRY(1, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR,
  49. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  50. 0, 6, BOOKE_PAGESZ_16K, 1),
  51. SET_TLB_ENTRY(1, CONFIG_SYS_PCI_MEM_PHYS, CONFIG_SYS_PCI_MEM_PHYS,
  52. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  53. 0, 7, BOOKE_PAGESZ_256M, 1),
  54. };
  55. int num_tlb_entries = ARRAY_SIZE(tlb_table);