sbc405.c 2.9 KB

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  1. /*
  2. * (C) Copyright 2001
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #include <common.h>
  23. #include <asm/processor.h>
  24. #include <command.h>
  25. #include <malloc.h>
  26. #include <spd_sdram.h>
  27. int board_early_init_f (void)
  28. {
  29. /*
  30. * IRQ 0-15 405GP internally generated; active high; level sensitive
  31. * IRQ 16 405GP internally generated; active low; level sensitive
  32. * IRQ 17-24 RESERVED
  33. * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  34. * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
  35. * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
  36. * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
  37. * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
  38. * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
  39. * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
  40. */
  41. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  42. mtdcr(uicer, 0x00000000); /* disable all ints */
  43. mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
  44. mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
  45. mtdcr(uictr, 0x10000000); /* set int trigger levels */
  46. mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
  47. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  48. /*
  49. * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
  50. */
  51. mtebc (epcr, 0xa8400000);
  52. return 0;
  53. }
  54. /* ------------------------------------------------------------------------- */
  55. int misc_init_f (void)
  56. {
  57. return 0; /* dummy implementation */
  58. }
  59. int misc_init_r (void)
  60. {
  61. return (0);
  62. }
  63. /*
  64. * Check Board Identity:
  65. */
  66. int checkboard (void)
  67. {
  68. char str[64];
  69. int i = getenv_r ("serial#", str, sizeof(str));
  70. puts ("Board: ");
  71. if (i == -1) {
  72. puts ("### No HW ID - assuming sbc405");
  73. } else {
  74. puts(str);
  75. }
  76. putc ('\n');
  77. return 0;
  78. }
  79. /* ------------------------------------------------------------------------- */
  80. phys_size_t initdram (int board_type)
  81. {
  82. return spd_sdram ();
  83. }
  84. /* ------------------------------------------------------------------------- */
  85. int testdram (void)
  86. {
  87. /* TODO: XXX XXX XXX */
  88. printf ("test: 64 MB - ok\n");
  89. return (0);
  90. }
  91. /* ------------------------------------------------------------------------- */