pxa_reg_calcs.py 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311
  1. #!/usr/bin/python
  2. # (C) Copyright 2004
  3. # BEC Systems <http://bec-systems.com>
  4. # Cliff Brake <cliff.brake@gmail.com>
  5. # This program is free software; you can redistribute it and/or
  6. # modify it under the terms of the GNU General Public License as
  7. # published by the Free Software Foundation; either version 2 of
  8. # the License, or (at your option) any later version.
  9. #
  10. # This program is distributed in the hope that it will be useful,
  11. # but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. # GNU General Public License for more details.
  14. #
  15. # You should have received a copy of the GNU General Public License
  16. # along with this program; if not, write to the Free Software
  17. # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18. # MA 02111-1307 USA
  19. # calculations for PXA255 registers
  20. class gpio:
  21. dir = '0'
  22. set = '0'
  23. clr = '0'
  24. alt = '0'
  25. desc = ''
  26. def __init__(self, dir=0, set=0, clr=0, alt=0, desc=''):
  27. self.dir = dir
  28. self.set = set
  29. self.clr = clr
  30. self.alt = alt
  31. self.desc = desc
  32. # the following is a dictionary of all GPIOs in the system
  33. # the key is the GPIO number
  34. pxa255_alt_func = {
  35. 0: ['gpio', 'none', 'none', 'none'],
  36. 1: ['gpio', 'gpio reset', 'none', 'none'],
  37. 2: ['gpio', 'none', 'none', 'none'],
  38. 3: ['gpio', 'none', 'none', 'none'],
  39. 4: ['gpio', 'none', 'none', 'none'],
  40. 5: ['gpio', 'none', 'none', 'none'],
  41. 6: ['gpio', 'MMC clk', 'none', 'none'],
  42. 7: ['gpio', '48MHz clock', 'none', 'none'],
  43. 8: ['gpio', 'MMC CS0', 'none', 'none'],
  44. 9: ['gpio', 'MMC CS1', 'none', 'none'],
  45. 10: ['gpio', 'RTC Clock', 'none', 'none'],
  46. 11: ['gpio', '3.6MHz', 'none', 'none'],
  47. 12: ['gpio', '32KHz', 'none', 'none'],
  48. 13: ['gpio', 'none', 'MBGNT', 'none'],
  49. 14: ['gpio', 'MBREQ', 'none', 'none'],
  50. 15: ['gpio', 'none', 'nCS_1', 'none'],
  51. 16: ['gpio', 'none', 'PWM0', 'none'],
  52. 17: ['gpio', 'none', 'PWM1', 'none'],
  53. 18: ['gpio', 'RDY', 'none', 'none'],
  54. 19: ['gpio', 'DREQ[1]', 'none', 'none'],
  55. 20: ['gpio', 'DREQ[0]', 'none', 'none'],
  56. 21: ['gpio', 'none', 'none', 'none'],
  57. 22: ['gpio', 'none', 'none', 'none'],
  58. 23: ['gpio', 'none', 'SSP SCLK', 'none'],
  59. 24: ['gpio', 'none', 'SSP SFRM', 'none'],
  60. 25: ['gpio', 'none', 'SSP TXD', 'none'],
  61. 26: ['gpio', 'SSP RXD', 'none', 'none'],
  62. 27: ['gpio', 'SSP EXTCLK', 'none', 'none'],
  63. 28: ['gpio', 'AC97 bitclk in, I2S bitclock out', 'I2S bitclock in', 'none'],
  64. 29: ['gpio', 'AC97 SDATA_IN0', 'I2S SDATA_IN', 'none'],
  65. 30: ['gpio', 'I2S SDATA_OUT', 'AC97 SDATA_OUT', 'none'],
  66. 31: ['gpio', 'I2S SYNC', 'AC97 SYNC', 'none'],
  67. 32: ['gpio', 'AC97 SDATA_IN1', 'I2S SYSCLK', 'none'],
  68. 33: ['gpio', 'none', 'nCS_5', 'none'],
  69. 34: ['gpio', 'FF RXD', 'MMC CS0', 'none'],
  70. 35: ['gpio', 'FF CTS', 'none', 'none'],
  71. 36: ['gpio', 'FF DCD', 'none', 'none'],
  72. 37: ['gpio', 'FF DSR', 'none', 'none'],
  73. 38: ['gpio', 'FF RI', 'none', 'none'],
  74. 39: ['gpio', 'MMC CS1', 'FF TXD', 'none'],
  75. 40: ['gpio', 'none', 'FF DTR', 'none'],
  76. 41: ['gpio', 'none', 'FF RTS', 'none'],
  77. 42: ['gpio', 'BT RXD', 'none', 'HW RXD'],
  78. 43: ['gpio', 'none', 'BT TXD', 'HW TXD'],
  79. 44: ['gpio', 'BT CTS', 'none', 'HW CTS'],
  80. 45: ['gpio', 'none', 'BT RTS', 'HW RTS'],
  81. 46: ['gpio', 'ICP_RXD', 'STD RXD', 'none'],
  82. 47: ['gpio', 'STD TXD', 'ICP_TXD', 'none'],
  83. 48: ['gpio', 'HW TXD', 'nPOE', 'none'],
  84. 49: ['gpio', 'HW RXD', 'nPWE', 'none'],
  85. 50: ['gpio', 'HW CTS', 'nPIOR', 'none'],
  86. 51: ['gpio', 'nPIOW', 'HW RTS', 'none'],
  87. 52: ['gpio', 'none', 'nPCE[1]', 'none'],
  88. 53: ['gpio', 'MMC CLK', 'nPCE[2]', 'none'],
  89. 54: ['gpio', 'MMC CLK', 'nPSKSEL', 'none'],
  90. 55: ['gpio', 'none', 'nPREG', 'none'],
  91. 56: ['gpio', 'nPWAIT', 'none', 'none'],
  92. 57: ['gpio', 'nIOIS16', 'none', 'none'],
  93. 58: ['gpio', 'none', 'LDD[0]', 'none'],
  94. 59: ['gpio', 'none', 'LDD[1]', 'none'],
  95. 60: ['gpio', 'none', 'LDD[2]', 'none'],
  96. 61: ['gpio', 'none', 'LDD[3]', 'none'],
  97. 62: ['gpio', 'none', 'LDD[4]', 'none'],
  98. 63: ['gpio', 'none', 'LDD[5]', 'none'],
  99. 64: ['gpio', 'none', 'LDD[6]', 'none'],
  100. 65: ['gpio', 'none', 'LDD[7]', 'none'],
  101. 66: ['gpio', 'MBREQ', 'LDD[8]', 'none'],
  102. 67: ['gpio', 'MMC CS0', 'LDD[9]', 'none'],
  103. 68: ['gpio', 'MMC CS1', 'LDD[10]', 'none'],
  104. 69: ['gpio', 'MMC CLK', 'LDD[11]', 'none'],
  105. 70: ['gpio', 'RTC CLK', 'LDD[12]', 'none'],
  106. 71: ['gpio', '3.6 MHz', 'LDD[13]', 'none'],
  107. 72: ['gpio', '32 KHz', 'LDD[14]', 'none'],
  108. 73: ['gpio', 'MBGNT', 'LDD[15]', 'none'],
  109. 74: ['gpio', 'none', 'LCD_FCLK', 'none'],
  110. 75: ['gpio', 'none', 'LCD_LCLK', 'none'],
  111. 76: ['gpio', 'none', 'LCD_PCLK', 'none'],
  112. 77: ['gpio', 'none', 'LCD_ACBIAS', 'none'],
  113. 78: ['gpio', 'none', 'nCS_2', 'none'],
  114. 79: ['gpio', 'none', 'nCS_3', 'none'],
  115. 80: ['gpio', 'none', 'nCS_4', 'none'],
  116. 81: ['gpio', 'NSSPSCLK', 'none', 'none'],
  117. 82: ['gpio', 'NSSPSFRM', 'none', 'none'],
  118. 83: ['gpio', 'NSSPTXD', 'NSSPRXD', 'none'],
  119. 84: ['gpio', 'NSSPTXD', 'NSSPRXD', 'none'],
  120. }
  121. #def __init__(self, dir=0, set=0, clr=0, alt=0, desc=''):
  122. gpio_list = []
  123. for i in range(0,85):
  124. gpio_list.append(gpio())
  125. #chip select GPIOs
  126. gpio_list[18] = gpio(0, 0, 0, 1, 'RDY')
  127. gpio_list[33] = gpio(1, 1, 0, 2, 'CS5#')
  128. gpio_list[80] = gpio(1, 1, 0, 2, 'CS4#')
  129. gpio_list[79] = gpio(1, 1, 0, 2, 'CS3#')
  130. gpio_list[78] = gpio(1, 1, 0, 2, 'CS2#')
  131. gpio_list[15] = gpio(1, 1, 0, 2, 'CS1#')
  132. gpio_list[22] = gpio(0, 0, 0, 0, 'Consumer IR, PCC_S1_IRQ_O#')
  133. gpio_list[21] = gpio(0, 0, 0, 0, 'IRQ_IDE, PFI')
  134. gpio_list[19] = gpio(0, 0, 0, 0, 'XB_DREQ1, PCC_SO_IRQ_O#')
  135. gpio_list[20] = gpio(0, 0, 0, 0, 'XB_DREQ0')
  136. gpio_list[20] = gpio(0, 0, 0, 0, 'XB_DREQ0')
  137. gpio_list[17] = gpio(0, 0, 0, 0, 'IRQ_AXB')
  138. gpio_list[16] = gpio(1, 0, 0, 2, 'PWM0')
  139. # PCMCIA stuff
  140. gpio_list[57] = gpio(0, 0, 0, 1, 'PCC_IOIS16#')
  141. gpio_list[56] = gpio(0, 0, 0, 1, 'PCC_WAIT#')
  142. gpio_list[55] = gpio(1, 0, 0, 2, 'PCC_REG#')
  143. gpio_list[54] = gpio(1, 0, 0, 2, 'PCC_SCKSEL')
  144. gpio_list[53] = gpio(1, 1, 0, 2, 'PCC_CE2#')
  145. gpio_list[52] = gpio(1, 1, 0, 2, 'PCC_CE1#')
  146. gpio_list[51] = gpio(1, 1, 0, 1, 'PCC_IOW#')
  147. gpio_list[50] = gpio(1, 1, 0, 2, 'PCC_IOR#')
  148. gpio_list[49] = gpio(1, 1, 0, 2, 'PCC_WE#')
  149. gpio_list[48] = gpio(1, 1, 0, 2, 'PCC_OE#')
  150. # SSP port
  151. gpio_list[26] = gpio(0, 0, 0, 1, 'SSP_RXD')
  152. gpio_list[25] = gpio(0, 0, 0, 0, 'SSP_TXD')
  153. gpio_list[24] = gpio(1, 0, 1, 2, 'SSP_SFRM')
  154. gpio_list[23] = gpio(1, 0, 1, 2, 'SSP_SCLK')
  155. gpio_list[27] = gpio(0, 0, 0, 0, 'SSP_EXTCLK')
  156. # audio codec
  157. gpio_list[32] = gpio(0, 0, 0, 0, 'AUD_SDIN1')
  158. gpio_list[31] = gpio(1, 0, 0, 2, 'AC_SYNC')
  159. gpio_list[30] = gpio(1, 0, 0, 2, 'AC_SDOUT')
  160. gpio_list[29] = gpio(0, 0, 0, 1, 'AUD_SDIN0')
  161. gpio_list[28] = gpio(0, 0, 0, 1, 'AC_BITCLK')
  162. # serial ports
  163. gpio_list[39] = gpio(1, 0, 0, 2, 'FF_TXD')
  164. gpio_list[34] = gpio(0, 0, 0, 1, 'FF_RXD')
  165. gpio_list[41] = gpio(1, 0, 0, 2, 'FF_RTS')
  166. gpio_list[35] = gpio(0, 0, 0, 1, 'FF_CTS')
  167. gpio_list[40] = gpio(1, 0, 0, 2, 'FF_DTR')
  168. gpio_list[37] = gpio(0, 0, 0, 1, 'FF_DSR')
  169. gpio_list[38] = gpio(0, 0, 0, 1, 'FF_RI')
  170. gpio_list[36] = gpio(0, 0, 0, 1, 'FF_DCD')
  171. gpio_list[43] = gpio(1, 0, 0, 2, 'BT_TXD')
  172. gpio_list[42] = gpio(0, 0, 0, 1, 'BT_RXD')
  173. gpio_list[45] = gpio(1, 0, 0, 2, 'BT_RTS')
  174. gpio_list[44] = gpio(0, 0, 0, 1, 'BT_CTS')
  175. gpio_list[47] = gpio(1, 0, 0, 1, 'IR_TXD')
  176. gpio_list[46] = gpio(0, 0, 0, 2, 'IR_RXD')
  177. # misc GPIO signals
  178. gpio_list[14] = gpio(0, 0, 0, 0, 'MBREQ')
  179. gpio_list[13] = gpio(0, 0, 0, 0, 'MBGNT')
  180. gpio_list[12] = gpio(0, 0, 0, 0, 'GPIO_12/32K_CLK')
  181. gpio_list[11] = gpio(0, 0, 0, 0, '3M6_CLK')
  182. gpio_list[10] = gpio(1, 0, 1, 0, 'GPIO_10/RTC_CLK/debug LED')
  183. gpio_list[9] = gpio(0, 0, 0, 0, 'MMC_CD#')
  184. gpio_list[8] = gpio(0, 0, 0, 0, 'PCC_S1_CD#')
  185. gpio_list[7] = gpio(0, 0, 0, 0, 'PCC_S0_CD#')
  186. gpio_list[6] = gpio(1, 0, 0, 1, 'MMC_CLK')
  187. gpio_list[5] = gpio(0, 0, 0, 0, 'IRQ_TOUCH#')
  188. gpio_list[4] = gpio(0, 0, 0, 0, 'IRQ_ETH')
  189. gpio_list[3] = gpio(0, 0, 0, 0, 'MQ_IRQ#')
  190. gpio_list[2] = gpio(0, 0, 0, 0, 'BAT_DATA')
  191. gpio_list[1] = gpio(0, 0, 0, 1, 'USER_RESET#')
  192. gpio_list[0] = gpio(0, 0, 0, 1, 'USER_RESET#')
  193. # LCD GPIOs
  194. gpio_list[58] = gpio(1, 0, 0, 2, 'LDD0')
  195. gpio_list[59] = gpio(1, 0, 0, 2, 'LDD1')
  196. gpio_list[60] = gpio(1, 0, 0, 2, 'LDD2')
  197. gpio_list[61] = gpio(1, 0, 0, 2, 'LDD3')
  198. gpio_list[62] = gpio(1, 0, 0, 2, 'LDD4')
  199. gpio_list[63] = gpio(1, 0, 0, 2, 'LDD5')
  200. gpio_list[64] = gpio(1, 0, 0, 2, 'LDD6')
  201. gpio_list[65] = gpio(1, 0, 0, 2, 'LDD7')
  202. gpio_list[66] = gpio(1, 0, 0, 2, 'LDD8')
  203. gpio_list[67] = gpio(1, 0, 0, 2, 'LDD9')
  204. gpio_list[68] = gpio(1, 0, 0, 2, 'LDD10')
  205. gpio_list[69] = gpio(1, 0, 0, 2, 'LDD11')
  206. gpio_list[70] = gpio(1, 0, 0, 2, 'LDD12')
  207. gpio_list[71] = gpio(1, 0, 0, 2, 'LDD13')
  208. gpio_list[72] = gpio(1, 0, 0, 2, 'LDD14')
  209. gpio_list[73] = gpio(1, 0, 0, 2, 'LDD15')
  210. gpio_list[74] = gpio(1, 0, 0, 2, 'FCLK')
  211. gpio_list[75] = gpio(1, 0, 0, 2, 'LCLK')
  212. gpio_list[76] = gpio(1, 0, 0, 2, 'PCLK')
  213. gpio_list[77] = gpio(1, 0, 0, 2, 'ACBIAS')
  214. # calculate registers
  215. pxa_regs = {
  216. 'gpdr0':0, 'gpdr1':0, 'gpdr2':0,
  217. 'gpsr0':0, 'gpsr1':0, 'gpsr2':0,
  218. 'gpcr0':0, 'gpcr1':0, 'gpcr2':0,
  219. 'gafr0_l':0, 'gafr0_u':0,
  220. 'gafr1_l':0, 'gafr1_u':0,
  221. 'gafr2_l':0, 'gafr2_u':0,
  222. }
  223. # U-boot define names
  224. uboot_reg_names = {
  225. 'gpdr0':'CONFIG_SYS_GPDR0_VAL', 'gpdr1':'CONFIG_SYS_GPDR1_VAL', 'gpdr2':'CONFIG_SYS_GPDR2_VAL',
  226. 'gpsr0':'CONFIG_SYS_GPSR0_VAL', 'gpsr1':'CONFIG_SYS_GPSR1_VAL', 'gpsr2':'CONFIG_SYS_GPSR2_VAL',
  227. 'gpcr0':'CONFIG_SYS_GPCR0_VAL', 'gpcr1':'CONFIG_SYS_GPCR1_VAL', 'gpcr2':'CONFIG_SYS_GPCR2_VAL',
  228. 'gafr0_l':'CONFIG_SYS_GAFR0_L_VAL', 'gafr0_u':'CONFIG_SYS_GAFR0_U_VAL',
  229. 'gafr1_l':'CONFIG_SYS_GAFR1_L_VAL', 'gafr1_u':'CONFIG_SYS_GAFR1_U_VAL',
  230. 'gafr2_l':'CONFIG_SYS_GAFR2_L_VAL', 'gafr2_u':'CONFIG_SYS_GAFR2_U_VAL',
  231. }
  232. # bit mappings
  233. bit_mappings = [
  234. { 'gpio':(0,32), 'shift':1, 'regs':{'dir':'gpdr0', 'set':'gpsr0', 'clr':'gpcr0'} },
  235. { 'gpio':(32,64), 'shift':1, 'regs':{'dir':'gpdr1', 'set':'gpsr1', 'clr':'gpcr1'} },
  236. { 'gpio':(64,85), 'shift':1, 'regs':{'dir':'gpdr2', 'set':'gpsr2', 'clr':'gpcr2'} },
  237. { 'gpio':(0,16), 'shift':2, 'regs':{'alt':'gafr0_l'} },
  238. { 'gpio':(16,32), 'shift':2, 'regs':{'alt':'gafr0_u'} },
  239. { 'gpio':(32,48), 'shift':2, 'regs':{'alt':'gafr1_l'} },
  240. { 'gpio':(48,64), 'shift':2, 'regs':{'alt':'gafr1_u'} },
  241. { 'gpio':(64,80), 'shift':2, 'regs':{'alt':'gafr2_l'} },
  242. { 'gpio':(80,85), 'shift':2, 'regs':{'alt':'gafr2_u'} },
  243. ]
  244. def stuff_bits(bit_mapping, gpio_list):
  245. gpios = range( bit_mapping['gpio'][0], bit_mapping['gpio'][1])
  246. for gpio in gpios:
  247. for reg in bit_mapping['regs'].keys():
  248. value = eval( 'gpio_list[gpio].%s' % (reg) )
  249. if ( value ):
  250. # we have a high bit
  251. bit_shift = (gpio - bit_mapping['gpio'][0]) * bit_mapping['shift']
  252. bit = value << (bit_shift)
  253. pxa_regs[bit_mapping['regs'][reg]] |= bit
  254. for i in bit_mappings:
  255. stuff_bits(i, gpio_list)
  256. # now print out all regs
  257. registers = pxa_regs.keys()
  258. registers.sort()
  259. for reg in registers:
  260. print '%s: 0x%x' % (reg, pxa_regs[reg])
  261. # print define to past right into U-Boot source code
  262. print
  263. print
  264. for reg in registers:
  265. print '#define %s 0x%x' % (uboot_reg_names[reg], pxa_regs[reg])
  266. # print all GPIOS
  267. print
  268. print
  269. for i in range(len(gpio_list)):
  270. gpio_i = gpio_list[i]
  271. alt_func_desc = pxa255_alt_func[i][gpio_i.alt]
  272. print 'GPIO: %i, dir=%i, set=%i, clr=%i, alt=%s, desc=%s' % (i, gpio_i.dir, gpio_i.set, gpio_i.clr, alt_func_desc, gpio_i.desc)