flash.c 16 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  4. *
  5. * (C) Copyright 2001-2004
  6. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. #include <linux/byteorder/swab.h>
  28. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
  29. /* Board support for 1 or 2 flash devices */
  30. #define FLASH_PORT_WIDTH32
  31. #undef FLASH_PORT_WIDTH16
  32. #ifdef FLASH_PORT_WIDTH16
  33. #define FLASH_PORT_WIDTH ushort
  34. #define FLASH_PORT_WIDTHV vu_short
  35. #define SWAP(x) (x)
  36. #else
  37. #define FLASH_PORT_WIDTH ulong
  38. #define FLASH_PORT_WIDTHV vu_long
  39. #define SWAP(x) (x)
  40. #endif
  41. /* Intel-compatible flash ID */
  42. #define INTEL_COMPAT 0x00890089
  43. #define INTEL_ALT 0x00B000B0
  44. /* Intel-compatible flash commands */
  45. #define INTEL_PROGRAM 0x00100010
  46. #define INTEL_ERASE 0x00200020
  47. #define INTEL_CLEAR 0x00500050
  48. #define INTEL_LOCKBIT 0x00600060
  49. #define INTEL_PROTECT 0x00010001
  50. #define INTEL_STATUS 0x00700070
  51. #define INTEL_READID 0x00900090
  52. #define INTEL_CONFIRM 0x00D000D0
  53. #define INTEL_RESET 0xFFFFFFFF
  54. /* Intel-compatible flash status bits */
  55. #define INTEL_FINISHED 0x00800080
  56. #define INTEL_OK 0x00800080
  57. #define FPW FLASH_PORT_WIDTH
  58. #define FPWV FLASH_PORT_WIDTHV
  59. #define mb() __asm__ __volatile__ ("" : : : "memory")
  60. /*-----------------------------------------------------------------------
  61. * Functions
  62. */
  63. static ulong flash_get_size (FPW *addr, flash_info_t *info);
  64. static int write_data (flash_info_t *info, ulong dest, FPW data);
  65. static void flash_get_offsets (ulong base, flash_info_t *info);
  66. void inline spin_wheel (void);
  67. static void flash_sync_real_protect (flash_info_t * info);
  68. static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
  69. /*-----------------------------------------------------------------------
  70. */
  71. unsigned long flash_init (void)
  72. {
  73. int i;
  74. ulong size = 0;
  75. extern void flash_preinit(void);
  76. extern void flash_afterinit(ulong, ulong);
  77. ulong flashbase = CONFIG_SYS_FLASH_BASE;
  78. flash_preinit();
  79. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  80. switch (i) {
  81. case 0:
  82. memset(&flash_info[i], 0, sizeof(flash_info_t));
  83. flash_get_size ((FPW *) flashbase, &flash_info[i]);
  84. flash_get_offsets (flash_info[i].start[0], &flash_info[i]);
  85. break;
  86. default:
  87. panic ("configured to many flash banks!\n");
  88. break;
  89. }
  90. size += flash_info[i].size;
  91. /* get the h/w and s/w protection status in sync */
  92. flash_sync_real_protect(&flash_info[i]);
  93. }
  94. /* Protect monitor and environment sectors
  95. */
  96. #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
  97. #ifndef CONFIG_BOOT_ROM
  98. flash_protect ( FLAG_PROTECT_SET,
  99. CONFIG_SYS_MONITOR_BASE,
  100. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  101. &flash_info[0] );
  102. #endif
  103. #endif
  104. #ifdef CONFIG_ENV_IS_IN_FLASH
  105. flash_protect ( FLAG_PROTECT_SET,
  106. CONFIG_ENV_ADDR,
  107. CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] );
  108. #endif
  109. flash_afterinit(flash_info[0].start[0], flash_info[0].size);
  110. return size;
  111. }
  112. /*-----------------------------------------------------------------------
  113. */
  114. static void flash_get_offsets (ulong base, flash_info_t *info)
  115. {
  116. int i;
  117. if (info->flash_id == FLASH_UNKNOWN) {
  118. return;
  119. }
  120. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
  121. for (i = 0; i < info->sector_count; i++) {
  122. info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
  123. }
  124. }
  125. }
  126. /*-----------------------------------------------------------------------
  127. */
  128. void flash_print_info (flash_info_t *info)
  129. {
  130. int i;
  131. if (info->flash_id == FLASH_UNKNOWN) {
  132. printf ("missing or unknown FLASH type\n");
  133. return;
  134. }
  135. switch (info->flash_id & FLASH_VENDMASK) {
  136. case FLASH_MAN_INTEL:
  137. printf ("INTEL ");
  138. break;
  139. default:
  140. printf ("Unknown Vendor ");
  141. break;
  142. }
  143. switch (info->flash_id & FLASH_TYPEMASK) {
  144. case FLASH_28F256J3A:
  145. printf ("28F256J3A\n");
  146. break;
  147. case FLASH_28F128J3A:
  148. printf ("28F128J3A\n");
  149. break;
  150. case FLASH_28F640J3A:
  151. printf ("28F640J3A\n");
  152. break;
  153. case FLASH_28F320J3A:
  154. printf ("28F320J3A\n");
  155. break;
  156. default:
  157. printf ("Unknown Chip Type\n");
  158. break;
  159. }
  160. printf (" Size: %ld MB in %d Sectors\n",
  161. info->size >> 20, info->sector_count);
  162. printf (" Sector Start Addresses:");
  163. for (i = 0; i < info->sector_count; ++i) {
  164. if ((i % 5) == 0)
  165. printf ("\n ");
  166. printf (" %08lX%s",
  167. info->start[i],
  168. info->protect[i] ? " (RO)" : " ");
  169. }
  170. printf ("\n");
  171. return;
  172. }
  173. /*
  174. * The following code cannot be run from FLASH!
  175. */
  176. static ulong flash_get_size (FPW *addr, flash_info_t *info)
  177. {
  178. volatile FPW value;
  179. /* Write auto select command: read Manufacturer ID */
  180. addr[0x5555] = (FPW) 0x00AA00AA;
  181. addr[0x2AAA] = (FPW) 0x00550055;
  182. addr[0x5555] = (FPW) 0x00900090;
  183. mb ();
  184. udelay(100);
  185. value = addr[0];
  186. switch (value) {
  187. case (FPW) INTEL_MANUFACT:
  188. info->flash_id = FLASH_MAN_INTEL;
  189. break;
  190. default:
  191. info->flash_id = FLASH_UNKNOWN;
  192. info->sector_count = 0;
  193. info->size = 0;
  194. addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
  195. return (0); /* no or unknown flash */
  196. }
  197. mb ();
  198. value = addr[1]; /* device ID */
  199. switch (value) {
  200. case (FPW) INTEL_ID_28F256J3A:
  201. info->flash_id += FLASH_28F256J3A;
  202. /* In U-Boot we support only 32 MB (no bank-switching) */
  203. info->sector_count = 256 / 2;
  204. info->size = 0x04000000 / 2;
  205. info->start[0] = CONFIG_SYS_FLASH_BASE + 0x02000000;
  206. break; /* => 32 MB */
  207. case (FPW) INTEL_ID_28F128J3A:
  208. info->flash_id += FLASH_28F128J3A;
  209. info->sector_count = 128;
  210. info->size = 0x02000000;
  211. info->start[0] = CONFIG_SYS_FLASH_BASE + 0x02000000;
  212. break; /* => 32 MB */
  213. case (FPW) INTEL_ID_28F640J3A:
  214. info->flash_id += FLASH_28F640J3A;
  215. info->sector_count = 64;
  216. info->size = 0x01000000;
  217. info->start[0] = CONFIG_SYS_FLASH_BASE + 0x03000000;
  218. break; /* => 16 MB */
  219. case (FPW) INTEL_ID_28F320J3A:
  220. info->flash_id += FLASH_28F320J3A;
  221. info->sector_count = 32;
  222. info->size = 0x800000;
  223. info->start[0] = CONFIG_SYS_FLASH_BASE + 0x03800000;
  224. break; /* => 8 MB */
  225. default:
  226. info->flash_id = FLASH_UNKNOWN;
  227. break;
  228. }
  229. if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
  230. printf ("** ERROR: sector count %d > max (%d) **\n",
  231. info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
  232. info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
  233. }
  234. addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
  235. return (info->size);
  236. }
  237. /*
  238. * This function gets the u-boot flash sector protection status
  239. * (flash_info_t.protect[]) in sync with the sector protection
  240. * status stored in hardware.
  241. */
  242. static void flash_sync_real_protect (flash_info_t * info)
  243. {
  244. int i;
  245. switch (info->flash_id & FLASH_TYPEMASK) {
  246. case FLASH_28F256J3A:
  247. case FLASH_28F128J3A:
  248. case FLASH_28F640J3A:
  249. case FLASH_28F320J3A:
  250. for (i = 0; i < info->sector_count; ++i) {
  251. info->protect[i] = intel_sector_protected(info, i);
  252. }
  253. break;
  254. default:
  255. /* no h/w protect support */
  256. break;
  257. }
  258. }
  259. /*
  260. * checks if "sector" in bank "info" is protected. Should work on intel
  261. * strata flash chips 28FxxxJ3x in 8-bit mode.
  262. * Returns 1 if sector is protected (or timed-out while trying to read
  263. * protection status), 0 if it is not.
  264. */
  265. static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
  266. {
  267. FPWV *addr;
  268. FPWV *lock_conf_addr;
  269. ulong start;
  270. unsigned char ret;
  271. /*
  272. * first, wait for the WSM to be finished. The rationale for
  273. * waiting for the WSM to become idle for at most
  274. * CONFIG_SYS_FLASH_ERASE_TOUT is as follows. The WSM can be busy
  275. * because of: (1) erase, (2) program or (3) lock bit
  276. * configuration. So we just wait for the longest timeout of
  277. * the (1)-(3), i.e. the erase timeout.
  278. */
  279. /* wait at least 35ns (W12) before issuing Read Status Register */
  280. udelay(1);
  281. addr = (FPWV *) info->start[sector];
  282. *addr = (FPW) INTEL_STATUS;
  283. start = get_timer (0);
  284. while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
  285. if (get_timer (start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  286. *addr = (FPW) INTEL_RESET; /* restore read mode */
  287. printf("WSM busy too long, can't get prot status\n");
  288. return 1;
  289. }
  290. }
  291. /* issue the Read Identifier Codes command */
  292. *addr = (FPW) INTEL_READID;
  293. /* wait at least 35ns (W12) before reading */
  294. udelay(1);
  295. /* Intel example code uses offset of 2 for 16 bit flash */
  296. lock_conf_addr = (FPWV *) info->start[sector] + 2;
  297. ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
  298. /* put flash back in read mode */
  299. *addr = (FPW) INTEL_RESET;
  300. return ret;
  301. }
  302. /*-----------------------------------------------------------------------
  303. */
  304. int flash_erase (flash_info_t *info, int s_first, int s_last)
  305. {
  306. int flag, prot, sect;
  307. ulong type, start, last;
  308. int rcode = 0;
  309. if ((s_first < 0) || (s_first > s_last)) {
  310. if (info->flash_id == FLASH_UNKNOWN) {
  311. printf ("- missing\n");
  312. } else {
  313. printf ("- no sectors to erase\n");
  314. }
  315. return 1;
  316. }
  317. type = (info->flash_id & FLASH_VENDMASK);
  318. if ((type != FLASH_MAN_INTEL)) {
  319. printf ("Can't erase unknown flash type %08lx - aborted\n",
  320. info->flash_id);
  321. return 1;
  322. }
  323. prot = 0;
  324. for (sect = s_first; sect <= s_last; ++sect) {
  325. if (info->protect[sect]) {
  326. prot++;
  327. }
  328. }
  329. if (prot) {
  330. printf ("- Warning: %d protected sectors will not be erased!\n",
  331. prot);
  332. } else {
  333. printf ("\n");
  334. }
  335. start = get_timer (0);
  336. last = start;
  337. /* Disable interrupts which might cause a timeout here */
  338. flag = disable_interrupts ();
  339. /* Start erase on unprotected sectors */
  340. for (sect = s_first; sect <= s_last; sect++) {
  341. if (info->protect[sect] == 0) { /* not protected */
  342. FPWV *addr = (FPWV *) (info->start[sect]);
  343. FPW status;
  344. printf ("Erasing sector %2d ... ", sect);
  345. /* arm simple, non interrupt dependent timer */
  346. start = get_timer(0);
  347. *addr = (FPW) 0x00500050; /* clear status register */
  348. *addr = (FPW) 0x00200020; /* erase setup */
  349. *addr = (FPW) 0x00D000D0; /* erase confirm */
  350. while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
  351. if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  352. printf ("Timeout\n");
  353. *addr = (FPW) 0x00B000B0; /* suspend erase */
  354. *addr = (FPW) 0x00FF00FF; /* reset to read mode */
  355. rcode = 1;
  356. break;
  357. }
  358. }
  359. *addr = 0x00500050; /* clear status register cmd. */
  360. *addr = 0x00FF00FF; /* resest to read mode */
  361. printf (" done\n");
  362. }
  363. }
  364. return rcode;
  365. }
  366. /*-----------------------------------------------------------------------
  367. * Copy memory to flash, returns:
  368. * 0 - OK
  369. * 1 - write timeout
  370. * 2 - Flash not erased
  371. * 4 - Flash not identified
  372. */
  373. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  374. {
  375. ulong cp, wp;
  376. FPW data;
  377. int count, i, l, rc, port_width;
  378. if (info->flash_id == FLASH_UNKNOWN) {
  379. return 4;
  380. }
  381. /* get lower word aligned address */
  382. #ifdef FLASH_PORT_WIDTH16
  383. wp = (addr & ~1);
  384. port_width = 2;
  385. #else
  386. wp = (addr & ~3);
  387. port_width = 4;
  388. #endif
  389. /*
  390. * handle unaligned start bytes
  391. */
  392. if ((l = addr - wp) != 0) {
  393. data = 0;
  394. for (i = 0, cp = wp; i < l; ++i, ++cp) {
  395. data = (data << 8) | (*(uchar *) cp);
  396. }
  397. for (; i < port_width && cnt > 0; ++i) {
  398. data = (data << 8) | *src++;
  399. --cnt;
  400. ++cp;
  401. }
  402. for (; cnt == 0 && i < port_width; ++i, ++cp) {
  403. data = (data << 8) | (*(uchar *) cp);
  404. }
  405. if ((rc = write_data (info, wp, SWAP (data))) != 0) {
  406. return (rc);
  407. }
  408. wp += port_width;
  409. }
  410. /*
  411. * handle word aligned part
  412. */
  413. count = 0;
  414. while (cnt >= port_width) {
  415. data = 0;
  416. for (i = 0; i < port_width; ++i) {
  417. data = (data << 8) | *src++;
  418. }
  419. if ((rc = write_data (info, wp, SWAP (data))) != 0) {
  420. return (rc);
  421. }
  422. wp += port_width;
  423. cnt -= port_width;
  424. if (count++ > 0x800) {
  425. spin_wheel ();
  426. count = 0;
  427. }
  428. }
  429. if (cnt == 0) {
  430. return (0);
  431. }
  432. /*
  433. * handle unaligned tail bytes
  434. */
  435. data = 0;
  436. for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
  437. data = (data << 8) | *src++;
  438. --cnt;
  439. }
  440. for (; i < port_width; ++i, ++cp) {
  441. data = (data << 8) | (*(uchar *) cp);
  442. }
  443. return (write_data (info, wp, SWAP (data)));
  444. }
  445. /*-----------------------------------------------------------------------
  446. * Write a word or halfword to Flash, returns:
  447. * 0 - OK
  448. * 1 - write timeout
  449. * 2 - Flash not erased
  450. */
  451. static int write_data (flash_info_t *info, ulong dest, FPW data)
  452. {
  453. FPWV *addr = (FPWV *) dest;
  454. ulong status;
  455. ulong start;
  456. int flag;
  457. /* Check if Flash is (sufficiently) erased */
  458. if ((*addr & data) != data) {
  459. printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
  460. return (2);
  461. }
  462. /* Disable interrupts which might cause a timeout here */
  463. flag = disable_interrupts ();
  464. *addr = (FPW) 0x00400040; /* write setup */
  465. *addr = data;
  466. /* arm simple, non interrupt dependent timer */
  467. start = get_timer(0);
  468. /* wait while polling the status register */
  469. while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
  470. if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
  471. *addr = (FPW) 0x00FF00FF; /* restore read mode */
  472. return (1);
  473. }
  474. }
  475. *addr = (FPW) 0x00FF00FF; /* restore read mode */
  476. return (0);
  477. }
  478. void inline spin_wheel (void)
  479. {
  480. static int p = 0;
  481. static char w[] = "\\/-";
  482. printf ("\010%c", w[p]);
  483. (++p == 3) ? (p = 0) : 0;
  484. }
  485. /*-----------------------------------------------------------------------
  486. * Set/Clear sector's lock bit, returns:
  487. * 0 - OK
  488. * 1 - Error (timeout, voltage problems, etc.)
  489. */
  490. int flash_real_protect (flash_info_t *info, long sector, int prot)
  491. {
  492. ulong start;
  493. int i;
  494. int rc = 0;
  495. vu_long *addr = (vu_long *)(info->start[sector]);
  496. int flag = disable_interrupts();
  497. *addr = INTEL_CLEAR; /* Clear status register */
  498. if (prot) { /* Set sector lock bit */
  499. *addr = INTEL_LOCKBIT; /* Sector lock bit */
  500. *addr = INTEL_PROTECT; /* set */
  501. }
  502. else { /* Clear sector lock bit */
  503. *addr = INTEL_LOCKBIT; /* All sectors lock bits */
  504. *addr = INTEL_CONFIRM; /* clear */
  505. }
  506. start = get_timer(0);
  507. while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
  508. if (get_timer(start) > CONFIG_SYS_FLASH_UNLOCK_TOUT) {
  509. printf("Flash lock bit operation timed out\n");
  510. rc = 1;
  511. break;
  512. }
  513. }
  514. if (*addr != INTEL_OK) {
  515. printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
  516. (uint)addr, (uint)*addr);
  517. rc = 1;
  518. }
  519. if (!rc)
  520. info->protect[sector] = prot;
  521. /*
  522. * Clear lock bit command clears all sectors lock bits, so
  523. * we have to restore lock bits of protected sectors.
  524. * WARNING: code below re-locks sectors only for one bank (info).
  525. * This causes problems on boards where several banks share
  526. * the same chip, as sectors in othere banks will be unlocked
  527. * but not re-locked. It works fine on pm520 though, as there
  528. * is only one chip and one bank.
  529. */
  530. if (!prot)
  531. {
  532. for (i = 0; i < info->sector_count; i++)
  533. {
  534. if (info->protect[i])
  535. {
  536. start = get_timer(0);
  537. addr = (vu_long *)(info->start[i]);
  538. *addr = INTEL_LOCKBIT; /* Sector lock bit */
  539. *addr = INTEL_PROTECT; /* set */
  540. while ((*addr & INTEL_FINISHED) != INTEL_FINISHED)
  541. {
  542. if (get_timer(start) > CONFIG_SYS_FLASH_UNLOCK_TOUT)
  543. {
  544. printf("Flash lock bit operation timed out\n");
  545. rc = 1;
  546. break;
  547. }
  548. }
  549. }
  550. }
  551. /*
  552. * get the s/w sector protection status in sync with the h/w,
  553. * in case something went wrong during the re-locking.
  554. */
  555. flash_sync_real_protect(info); /* resets flash to read mode */
  556. }
  557. if (flag)
  558. enable_interrupts();
  559. *addr = INTEL_RESET; /* Reset to read array mode */
  560. return rc;
  561. }