munices.c 4.4 KB

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  1. /*
  2. * (C) Copyright 2007
  3. * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <mpc5xxx.h>
  25. #include <pci.h>
  26. #include "mt48lc16m16a2-75.h"
  27. #ifndef CONFIG_SYS_RAMBOOT
  28. static void sdram_start (int hi_addr)
  29. {
  30. long hi_addr_bit = hi_addr ? 0x01000000 : 0;
  31. /* unlock mode register */
  32. *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
  33. __asm__ volatile ("sync");
  34. /* precharge all banks */
  35. *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
  36. __asm__ volatile ("sync");
  37. #if SDRAM_DDR
  38. /* set mode register: extended mode */
  39. *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
  40. __asm__ volatile ("sync");
  41. /* set mode register: reset DLL */
  42. *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
  43. __asm__ volatile ("sync");
  44. #endif
  45. /* precharge all banks */
  46. *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
  47. __asm__ volatile ("sync");
  48. /* auto refresh */
  49. *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
  50. __asm__ volatile ("sync");
  51. /* set mode register */
  52. *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
  53. __asm__ volatile ("sync");
  54. /* normal operation */
  55. *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
  56. __asm__ volatile ("sync");
  57. }
  58. #endif
  59. /*
  60. * ATTENTION: Although partially referenced initdram does NOT make real use
  61. * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
  62. * is something else than 0x00000000.
  63. */
  64. phys_size_t initdram (int board_type)
  65. {
  66. ulong dramsize = 0;
  67. ulong dramsize2 = 0;
  68. #ifndef CONFIG_SYS_RAMBOOT
  69. ulong test1, test2;
  70. /* setup SDRAM chip selects */
  71. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001b;/* 256MB at 0x0 */
  72. *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x10000000;/* disabled */
  73. __asm__ volatile ("sync");
  74. /* setup config registers */
  75. *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
  76. *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
  77. __asm__ volatile ("sync");
  78. #if SDRAM_DDR && SDRAM_TAPDELAY
  79. /* set tap delay */
  80. *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
  81. __asm__ volatile ("sync");
  82. #endif
  83. /* find RAM size using SDRAM CS0 only */
  84. sdram_start(0);
  85. test1 = (ulong )get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x10000000);
  86. sdram_start(1);
  87. test2 = (ulong )get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x10000000);
  88. if (test1 > test2) {
  89. sdram_start(0);
  90. dramsize = test1;
  91. } else {
  92. dramsize = test2;
  93. }
  94. /* memory smaller than 1MB is impossible */
  95. if (dramsize < (1 << 20)) {
  96. dramsize = 0;
  97. }
  98. /* set SDRAM CS0 size according to the amount of RAM found */
  99. if (dramsize > 0) {
  100. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
  101. } else {
  102. *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
  103. }
  104. #else /* CONFIG_SYS_RAMBOOT */
  105. /* retrieve size of memory connected to SDRAM CS0 */
  106. dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
  107. if (dramsize >= 0x13) {
  108. dramsize = (1 << (dramsize - 0x13)) << 20;
  109. } else {
  110. dramsize = 0;
  111. }
  112. /* retrieve size of memory connected to SDRAM CS1 */
  113. dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
  114. if (dramsize2 >= 0x13) {
  115. dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
  116. } else {
  117. dramsize2 = 0;
  118. }
  119. #endif /* CONFIG_SYS_RAMBOOT */
  120. return dramsize + dramsize2;
  121. }
  122. int checkboard (void)
  123. {
  124. puts ("Board: MUNICes\n");
  125. return 0;
  126. }
  127. #ifdef CONFIG_PCI
  128. static struct pci_controller hose;
  129. extern void pci_mpc5xxx_init(struct pci_controller *);
  130. void pci_init_board(void)
  131. {
  132. pci_mpc5xxx_init(&hose);
  133. }
  134. #endif
  135. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  136. void
  137. ft_board_setup(void *blob, bd_t *bd)
  138. {
  139. ft_cpu_setup(blob, bd);
  140. }
  141. #endif