ehci.c 3.4 KB

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  1. /*
  2. * (C) Copyright 2009 Stefan Roese <sr@denx.de>, DENX Software Engineering
  3. *
  4. * Original Author Guenter Gebhardt
  5. * Copyright (C) 2006 Micronas GmbH
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #include <common.h>
  23. #include "vct.h"
  24. int vct_ehci_hcd_init(u32 *hccr, u32 *hcor)
  25. {
  26. int retval;
  27. u32 val;
  28. u32 addr;
  29. dcgu_set_reset_switch(DCGU_HW_MODULE_USB_24, DCGU_SWITCH_ON);
  30. dcgu_set_reset_switch(DCGU_HW_MODULE_USB_60, DCGU_SWITCH_ON);
  31. dcgu_set_clk_switch(DCGU_HW_MODULE_USB_24, DCGU_SWITCH_ON);
  32. dcgu_set_clk_switch(DCGU_HW_MODULE_USB_PLL, DCGU_SWITCH_ON);
  33. dcgu_set_reset_switch(DCGU_HW_MODULE_USB_24, DCGU_SWITCH_OFF);
  34. /* Wait until (DCGU_USBPHY_STAT == 7) */
  35. addr = DCGU_USBPHY_STAT(DCGU_BASE);
  36. val = reg_read(addr);
  37. while (val != 7)
  38. val = reg_read(addr);
  39. dcgu_set_clk_switch(DCGU_HW_MODULE_USB_60, DCGU_SWITCH_ON);
  40. dcgu_set_reset_switch(DCGU_HW_MODULE_USB_60, DCGU_SWITCH_OFF);
  41. retval = scc_reset(SCC_USB_RW, 0);
  42. if (retval) {
  43. printf("scc_reset(SCC_USB_RW, 0) returned: 0x%x\n", retval);
  44. return retval;
  45. } else {
  46. retval = scc_reset(SCC_CPU1_SPDMA_RW, 0);
  47. if (retval) {
  48. printf("scc_reset(SCC_CPU1_SPDMA_RW, 0) returned: 0x%x\n",
  49. retval);
  50. return retval;
  51. }
  52. }
  53. if (!retval) {
  54. /*
  55. * For the AGU bypass, where the SCC client provides full
  56. * physical address
  57. */
  58. scc_set_usb_address_generation_mode(1);
  59. scc_setup_dma(SCC_USB_RW, BCU_USB_BUFFER_1, DMA_LINEAR,
  60. USE_NO_FH, DMA_READ, 0);
  61. scc_setup_dma(SCC_CPU1_SPDMA_RW, BCU_USB_BUFFER_1, DMA_LINEAR,
  62. USE_NO_FH, DMA_WRITE, 0);
  63. scc_setup_dma(SCC_USB_RW, BCU_USB_BUFFER_0, DMA_LINEAR,
  64. USE_NO_FH, DMA_WRITE, 0);
  65. scc_setup_dma(SCC_CPU1_SPDMA_RW, BCU_USB_BUFFER_0, DMA_LINEAR,
  66. USE_NO_FH, DMA_READ, 0);
  67. /* Enable memory interface */
  68. scc_enable(SCC_USB_RW, 1);
  69. /* Start (start_cmd=0) DMAs */
  70. scc_dma_cmd(SCC_USB_RW, DMA_START, 0, DMA_READ);
  71. scc_dma_cmd(SCC_USB_RW, DMA_START, 0, DMA_WRITE);
  72. } else {
  73. printf("Cannot configure USB memory channel.\n");
  74. printf("USB can not access RAM. SCC configuration failed.\n");
  75. return retval;
  76. }
  77. /* Wait a short while */
  78. udelay(300000);
  79. reg_write(USBH_BURSTSIZE(USBH_BASE), 0x00001c1c);
  80. /* Set EHCI structures and DATA in RAM */
  81. reg_write(USBH_USBHMISC(USBH_BASE), 0x00840003);
  82. /* Set USBMODE to bigendian and set host mode */
  83. reg_write(USBH_USBMODE(USBH_BASE), 0x00000007);
  84. /*
  85. * USBH_BURSTSIZE MUST EQUAL 0x00001c1c in order for
  86. * 512 byte USB transfers on the bulk pipe to work properly.
  87. * Set USBH_BURSTSIZE to 0x00001c1c
  88. */
  89. reg_write(USBH_BURSTSIZE(USBH_BASE), 0x00001c1c);
  90. /* Insert access register addresses */
  91. *hccr = REG_GLOBAL_START_ADDR + USBH_CAPLENGTH(USBH_BASE);
  92. *hcor = REG_GLOBAL_START_ADDR + USBH_USBCMD(USBH_BASE);
  93. return 0;
  94. }