lowlevel_init.S 2.1 KB

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  1. /*
  2. * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of
  7. * the License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17. * MA 02111-1307 USA
  18. */
  19. #include <config.h>
  20. #include <version.h>
  21. #include <asm/arch/hardware.h>
  22. /* some parameters for the board */
  23. /* setting up the memory */
  24. #define SRAM_START 0x40000000
  25. #define SRAM_SIZE 0x00004000
  26. #define BCFG0_VALUE 0x1000ffef
  27. #define BCFG1_VALUE 0x10001C61
  28. _TEXT_BASE:
  29. .word TEXT_BASE
  30. MEMMAP_ADR:
  31. .word MEMMAP
  32. BCFG0_ADR:
  33. .word BCFG0
  34. _BCFG0_VALUE:
  35. .word BCFG0_VALUE
  36. BCFG1_ADR:
  37. .word BCFG1
  38. _BCFG1_VALUE:
  39. .word BCFG1_VALUE
  40. PINSEL2_ADR:
  41. .word PINSEL2
  42. PINSEL2_MASK:
  43. .word 0x00000000
  44. PINSEL2_VALUE:
  45. .word 0x0F800914
  46. .extern _start
  47. .globl lowlevel_init
  48. lowlevel_init:
  49. /* set up memory control register for bank 0 */
  50. ldr r0, _BCFG0_VALUE
  51. ldr r1, BCFG0_ADR
  52. str r0, [r1]
  53. /* set up memory control register for bank 1 */
  54. ldr r0, _BCFG1_VALUE
  55. ldr r1, BCFG1_ADR
  56. str r0, [r1]
  57. /* set up PINSEL2 for bus-pins */
  58. ldr r0, PINSEL2_ADR
  59. ldr r1, [r0]
  60. ldr r2, PINSEL2_MASK
  61. ldr r3, PINSEL2_VALUE
  62. and r1, r1, r2
  63. orr r1, r1, r3
  64. str r1, [r0]
  65. /* move vectors to beginning of SRAM */
  66. mov r2, #SRAM_START
  67. mov r0, #0 /*_start*/
  68. ldmneia r0!, {r3-r10}
  69. stmneia r2!, {r3-r10}
  70. ldmneia r0, {r3-r9}
  71. stmneia r2, {r3-r9}
  72. /* Set-up MEMMAP register, so vectors are taken from SRAM */
  73. ldr r0, MEMMAP_ADR
  74. mov r1, #0x02 /* vectors re-mapped to static RAM */
  75. str r1, [r0]
  76. /* everything is fine now */
  77. mov pc, lr